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A code generator for the Verilog-AMS language https://sourceforge.net/projects/mot-adms/
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RPM Spec 100%
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Silvan Calarco b2b541acb2 remove requirement for unexisting libadms and add build requirements 
add -DBUILD_SHARED_LIBS=OFF because not working well yet (see CMakeLists.txt) [release 2.3.6-2mamba;Sun Dec 10 2017]
2024-01-05 20:12:20 +01:00
adms.spec remove requirement for unexisting libadms and add build requirements 2024-01-05 20:12:20 +01:00
README.md remove requirement for unexisting libadms and add build requirements 2024-01-05 20:12:20 +01:00

README.md

adms

ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile C code for the API of spice simulators. Based on transformations specified in XML language, ADMS transforms Verilog-AMS code into other target languages.