72 lines
3.5 KiB
Diff
72 lines
3.5 KiB
Diff
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From 3f5eb97283e73ca78059be5dd828a87b393a38c7 Mon Sep 17 00:00:00 2001
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From: totaam <antoine@xpra.org>
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Date: Sat, 12 Nov 2022 15:48:54 +0700
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Subject: [PATCH] #3685 clamp clock values to 'unsigned long'
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---
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xpra/x11/bindings/randr_bindings.pyx | 31 +++++++++-------------------
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1 file changed, 10 insertions(+), 21 deletions(-)
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diff --git a/xpra/x11/bindings/randr_bindings.pyx b/xpra/x11/bindings/randr_bindings.pyx
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index f527d594a8..aaebe088f3 100644
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--- a/xpra/x11/bindings/randr_bindings.pyx
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+++ b/xpra/x11/bindings/randr_bindings.pyx
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@@ -19,7 +19,7 @@ from xpra.x11.bindings.xlib cimport (
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)
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from xpra.common import DEFAULT_REFRESH_RATE
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from xpra.util import envint, envbool, csv, first_time, decode_str, prettify_plug_name
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-from xpra.os_util import strtobytes, bytestostr
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+from xpra.os_util import strtobytes, bytestostr, BITS
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TIMESTAMPS = envbool("XPRA_RANDR_TIMESTAMPS", False)
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@@ -597,7 +597,6 @@ cdef class RandRBindingsInstance(X11CoreBindingsInstance):
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cdef XRRModeInfo *calculate_mode(self, name, unsigned int w, unsigned int h, unsigned int vrefresh):
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log("calculate_mode(%s, %i, %i, %i)", name, w, h, vrefresh)
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#monitor settings as set in xorg.conf...
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- cdef unsigned long maxPixelClock = 30*1000*1000*1000 #30,000 MHz
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cdef unsigned int minHSync = 1*1000 #1KHz
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cdef unsigned int maxHSync = 300*1000 #300KHz
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cdef unsigned int minVSync = 1 #1Hz
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@@ -622,31 +621,21 @@ cdef class RandRBindingsInstance(X11CoreBindingsInstance):
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yBack = round(h * timeVBack)
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yTotal = h + yFront + ySync + yBack
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- cdef unsigned long modeMaxClock = maxPixelClock
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- if (maxHSync * xTotal)<maxPixelClock:
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- modeMaxClock = maxHSync * xTotal
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- tmp = maxVSync * xTotal * yTotal * yFactor
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- if tmp<modeMaxClock:
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- modeMaxClock = tmp
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- cdef unsigned long modeMinClock = minHSync * xTotal
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- # Monitor minVSync too low? => increase mode minimum pixel clock
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- tmp = minVSync * xTotal * yTotal * yFactor
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- if tmp > modeMinClock:
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- modeMinClock = tmp
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+ if sizeof(long)<=4:
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+ maxPixelClock = 0xffffffff
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+ else:
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+ maxPixelClock = 30*1000*1000*1000 #30,000 MHz
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+ modeMaxClock = min(maxPixelClock, maxHSync * xTotal, maxVSync * xTotal * yTotal * yFactor)
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+ modeMinClock = max(minHSync * xTotal, minVSync * xTotal * yTotal * yFactor)
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# If minimum clock > maximum clock, the mode is impossible...
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if modeMinClock > modeMaxClock:
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- log.warn("Warning: cannot add mode %s", name)
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- log.warn(" clock %iHz is above maximum value %iHz", modeMinClock, modeMaxClock)
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+ log.warn(f"Warning: cannot add mode {name}")
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+ log.warn(f" clock {modeMinClock}Hz is above maximum value {modeMaxClock}Hz")
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log.warn(" no suitable clocks could be found")
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return NULL
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idealClock = idealVSync * xTotal * yTotal * yFactor
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- cdef unsigned long clock = idealClock
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- if clock < modeMinClock:
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- clock = modeMinClock
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- elif clock > modeMaxClock:
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- clock = modeMaxClock
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-
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+ cdef unsigned long clock = min(modeMaxClock, max(modeMinClock, idealClock))
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log("Modeline %ix%i@%i %s %s %s %s %s %s %s %s %s", w, h, round(vrefresh/1000),
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clock/1000/1000,
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w, w+xFront, w+xFront+xSync, xTotal,
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