From 20b64e82079aa076b2f487f11925665b7309b1f5 Mon Sep 17 00:00:00 2001 From: Silvan Calarco Date: Sun, 4 Aug 2024 22:23:40 +0200 Subject: [PATCH] update to 115.13.0 roll back to stable supported release (epoch bump) [release 115.13.0-1mamba;Sun Jul 28 2024] --- thunderbird-102.3.2-cbindgen-0.24.patch | 17 - ....0-fix-libc++-18-ignore-tuple-harder.patch | 57 + ...variable-does-not-need-to-be-mutable.patch | 108 + thunderbird-115.13.0-rustc-18-1.patch | 3580 +++++++++++++++ thunderbird-115.13.0-rustc-18-2.patch | 199 + ...8.1-fix-passing-system-bzip2-ldflags.patch | 25 - thunderbird-78.8.1-rust-1.48.patch | 3940 ----------------- ...bird-91.4.1-python-setuptools-60.0.4.patch | 10 - thunderbird-91.5.1-libwayland-1.20.0.patch | 28 - thunderbird.spec | 59 +- 10 files changed, 3982 insertions(+), 4041 deletions(-) delete mode 100644 thunderbird-102.3.2-cbindgen-0.24.patch create mode 100644 thunderbird-115.13.0-fix-libc++-18-ignore-tuple-harder.patch create mode 100644 thunderbird-115.13.0-llvm-18-variable-does-not-need-to-be-mutable.patch create mode 100644 thunderbird-115.13.0-rustc-18-1.patch create mode 100644 thunderbird-115.13.0-rustc-18-2.patch delete mode 100644 thunderbird-78.8.1-fix-passing-system-bzip2-ldflags.patch delete mode 100644 thunderbird-78.8.1-rust-1.48.patch delete mode 100644 thunderbird-91.4.1-python-setuptools-60.0.4.patch delete mode 100644 thunderbird-91.5.1-libwayland-1.20.0.patch diff --git a/thunderbird-102.3.2-cbindgen-0.24.patch b/thunderbird-102.3.2-cbindgen-0.24.patch deleted file mode 100644 index 3011e8a..0000000 --- a/thunderbird-102.3.2-cbindgen-0.24.patch +++ /dev/null @@ -1,17 +0,0 @@ -Description: Remove an extra constant definition that is now being generated by newer versions of cbindgen (0.24), and causing build failures because it is defined in several places. -Author: Olivier Tilloy -Bug: https://bugzilla.mozilla.org/show_bug.cgi?id=1773259 -Forwarded: not-needed - ---- a/gfx/webrender_bindings/webrender_ffi.h -+++ b/gfx/webrender_bindings/webrender_ffi.h -@@ -73,8 +73,6 @@ struct WrPipelineInfo; - struct WrPipelineIdAndEpoch; - using WrPipelineIdEpochs = nsTArray; - --const uint64_t ROOT_CLIP_CHAIN = ~0; -- - } // namespace wr - } // namespace mozilla - - diff --git a/thunderbird-115.13.0-fix-libc++-18-ignore-tuple-harder.patch b/thunderbird-115.13.0-fix-libc++-18-ignore-tuple-harder.patch new file mode 100644 index 0000000..47256e3 --- /dev/null +++ b/thunderbird-115.13.0-fix-libc++-18-ignore-tuple-harder.patch @@ -0,0 +1,57 @@ + +# HG changeset patch +# User Emilio Cobos Álvarez +# Date 1705156533 0 +# Node ID 9e96d1447f6c77f15bcd1c7fa432cefae4418038 +# Parent 23a77d3c25d74ed46ebb77f47fda83c7b6dcdb45 +Bug 1873379 - Ignore std::tuple harder. r=firefox-style-system-reviewers,zrhoffman + +In libc++ 18 it seems to be in a nested namespace. Make sure to account +for that. + +Differential Revision: https://phabricator.services.mozilla.com/D198398 + +diff --git a/layout/style/ServoBindings.toml b/layout/style/ServoBindings.toml +--- a/layout/style/ServoBindings.toml ++++ b/layout/style/ServoBindings.toml +@@ -361,16 +361,19 @@ allowlist-types = [ + "NodeSelectorFlags", + ] + opaque-types = [ + "mozilla::StyleThinArc", # https://github.com/rust-lang/rust-bindgen/issues/1557 + "std::pair__PCCP", + "std::namespace::atomic___base", "std::atomic__My_base", + "std::atomic", + "std::atomic___base", ++ "std::tuple.*", # Causes "Cannot find type _Pred in this scope" error on mac, like rust-skia#571 ++ "std::.*::tuple.*", ++ + # We want everything but FontVariation and Float to be opaque but we don't + # have negative regexes. + "mozilla::gfx::(.{0,4}|.{6,12}|.{14,}|([^F][^o][^n][^t][^V][^a][^r][^i][^a][^t][^i][^o][^n])|([^F][^l][^o][^a][^t]))", + "mozilla::dom::Sequence", + "mozilla::SmallPointerArray", + "mozilla::dom::Optional", + "mozilla::dom::OwningNodeOrString_Value", + "mozilla::dom::Nullable", +@@ -386,18 +389,16 @@ opaque-types = [ + "mozilla::detail::PointerType", + "mozilla::HashSet", + "mozilla::Pair", + "mozilla::Pair_Base", + "mozilla::ScrollAxis", # <- For some reason the alignment of this is 4 + # for clang. + "mozilla::SeenPtrs", + "mozilla::SupportsWeakPtr", +- "std::tuple", +- "std::tuple_.*", # Causes "Cannot find type _Pred in this scope" error on mac, like rust-skia#571 + "SupportsWeakPtr", + "mozilla::detail::WeakReference", + "mozilla::WeakPtr", + "nsWritingIterator_reference", "nsReadingIterator_reference", + "nsTObserverArray", # <- Inherits from nsAutoTObserverArray + "mozilla::DoublyLinkedList", + "mozilla::SafeDoublyLinkedList", + "nsTHashtable", # <- Inheriting from inner typedefs that clang + + diff --git a/thunderbird-115.13.0-llvm-18-variable-does-not-need-to-be-mutable.patch b/thunderbird-115.13.0-llvm-18-variable-does-not-need-to-be-mutable.patch new file mode 100644 index 0000000..b0ee7ae --- /dev/null +++ b/thunderbird-115.13.0-llvm-18-variable-does-not-need-to-be-mutable.patch @@ -0,0 +1,108 @@ + +# HG changeset patch +# User Mike Hommey +# Date 1688610847 0 +# Node ID c4d6ad7c5e4422f2d6de27f92bf53a776371b325 +# Parent ce5753685c87f3fbdaaee65c62d7ff1bd0f11637 +Bug 1841919 - Fix "variable does not need to be mutable" warnings in webrender. r=gfx-reviewers,lsalzman + +Differential Revision: https://phabricator.services.mozilla.com/D182851 + +diff --git a/gfx/wr/webrender/src/compositor/sw_compositor.rs b/gfx/wr/webrender/src/compositor/sw_compositor.rs +--- a/gfx/wr/webrender/src/compositor/sw_compositor.rs ++++ b/gfx/wr/webrender/src/compositor/sw_compositor.rs +@@ -1021,17 +1021,17 @@ impl SwCompositor { + } + } + + /// Lock a surface with an attached external image for compositing. + fn try_lock_composite_surface(&mut self, device: &mut Device, id: &NativeSurfaceId) { + if let Some(surface) = self.surfaces.get_mut(id) { + if let Some(external_image) = surface.external_image { + assert!(!surface.tiles.is_empty()); +- let mut tile = &mut surface.tiles[0]; ++ let tile = &mut surface.tiles[0]; + if let Some(info) = self.composite_surfaces.get(&external_image) { + tile.valid_rect = DeviceIntRect::from_size(info.size); + return; + } + // If the surface has an attached external image, attempt to lock the external image + // for compositing. Yields a descriptor of textures and data necessary for their + // interpretation on success. + let mut info = SWGLCompositeSurfaceInfo { +diff --git a/gfx/wr/webrender/src/picture.rs b/gfx/wr/webrender/src/picture.rs +--- a/gfx/wr/webrender/src/picture.rs ++++ b/gfx/wr/webrender/src/picture.rs +@@ -2883,17 +2883,17 @@ impl TileCacheInstance { + surfaces: &mut [SurfaceInfo], + ) { + // This primitive exists on the last element on the current surface stack. + profile_scope!("update_prim_dependencies"); + let prim_surface_index = surface_stack.last().unwrap().1; + let prim_clip_chain = &prim_instance.vis.clip_chain; + + // Accumulate the exact (clipped) local rect in to the parent surface +- let mut surface = &mut surfaces[prim_surface_index.0]; ++ let surface = &mut surfaces[prim_surface_index.0]; + surface.clipped_local_rect = surface.clipped_local_rect.union(&prim_clip_chain.pic_coverage_rect); + + // If the primitive is directly drawn onto this picture cache surface, then + // the pic_coverage_rect is in the same space. If not, we need to map it from + // the surface space into the picture cache space. + let on_picture_surface = prim_surface_index == self.surface_index; + let pic_coverage_rect = if on_picture_surface { + prim_clip_chain.pic_coverage_rect +diff --git a/gfx/wr/webrender_api/src/display_item_cache.rs b/gfx/wr/webrender_api/src/display_item_cache.rs +--- a/gfx/wr/webrender_api/src/display_item_cache.rs ++++ b/gfx/wr/webrender_api/src/display_item_cache.rs +@@ -53,23 +53,23 @@ struct CacheEntry { + + #[derive(Clone, Deserialize, MallocSizeOf, Serialize)] + pub struct DisplayItemCache { + entries: Vec, + } + + impl DisplayItemCache { + fn add_item(&mut self, key: ItemKey, item: CachedDisplayItem) { +- let mut entry = &mut self.entries[key as usize]; ++ let entry = &mut self.entries[key as usize]; + entry.items.push(item); + entry.occupied = true; + } + + fn clear_entry(&mut self, key: ItemKey) { +- let mut entry = &mut self.entries[key as usize]; ++ let entry = &mut self.entries[key as usize]; + entry.items.clear(); + entry.occupied = false; + } + + fn grow_if_needed(&mut self, capacity: usize) { + if capacity > self.entries.len() { + self.entries.resize_with(capacity, || CacheEntry { + items: Vec::new(), + +diff --git a/gfx/wr/wrench/src/reftest.rs b/gfx/wr/wrench/src/reftest.rs +--- a/gfx/wr/wrench/src/reftest.rs ++++ b/gfx/wr/wrench/src/reftest.rs +@@ -509,17 +509,17 @@ impl ReftestManifest { + // only a single (or no) 'fuzzy' keyword means we use the max + // of that fuzzy and options.allow_.. (we don't want that to + // turn into a test that allows fuzzy.allow_ *plus* options.allow_): + match fuzziness.len() { + 0 => fuzziness.push(RefTestFuzzy { + max_difference: options.allow_max_difference, + num_differences: options.allow_num_differences }), + 1 => { +- let mut fuzzy = &mut fuzziness[0]; ++ let fuzzy = &mut fuzziness[0]; + fuzzy.max_difference = cmp::max(fuzzy.max_difference, options.allow_max_difference); + fuzzy.num_differences = cmp::max(fuzzy.num_differences, options.allow_num_differences); + }, + _ => { + // ignore options, use multiple fuzzy keywords instead. make sure + // the list is sorted to speed up counting violations. + fuzziness.sort_by(|a, b| a.max_difference.cmp(&b.max_difference)); + for pair in fuzziness.windows(2) { + + diff --git a/thunderbird-115.13.0-rustc-18-1.patch b/thunderbird-115.13.0-rustc-18-1.patch new file mode 100644 index 0000000..d493116 --- /dev/null +++ b/thunderbird-115.13.0-rustc-18-1.patch @@ -0,0 +1,3580 @@ + +# HG changeset patch +# User Henri Sivonen +# Date 1714462184 0 +# Node ID 1db2ef126a6a8555dbf50345e16492c977b42e92 +# Parent a545e84b3674c4878f2e618b7bce23058f2ac690 +Bug 1882209 - Update encoding_rs to 0.8.34 to deal with rustc changes. r=glandium,supply-chain-reviewers + +Differential Revision: https://phabricator.services.mozilla.com/D207167 + +diff --git a/.cargo/config.in b/.cargo/config.in +--- a/.cargo/config.in ++++ b/.cargo/config.in +@@ -35,31 +35,31 @@ git = "https://github.com/gfx-rs/wgpu" + rev = "f71a1bc736fde37509262ca03e91d8f56a13aeb5" + replace-with = "vendored-sources" + + [source."git+https://github.com/glandium/warp?rev=4af45fae95bc98b0eba1ef0db17e1dac471bb23d"] + git = "https://github.com/glandium/warp" + rev = "4af45fae95bc98b0eba1ef0db17e1dac471bb23d" + replace-with = "vendored-sources" + ++[source."git+https://github.com/hsivonen/any_all_workaround?rev=7fb1b7034c9f172aade21ee1c8554e8d8a48af80"] ++git = "https://github.com/hsivonen/any_all_workaround" ++rev = "7fb1b7034c9f172aade21ee1c8554e8d8a48af80" ++replace-with = "vendored-sources" ++ + [source."git+https://github.com/hsivonen/chardetng?rev=3484d3e3ebdc8931493aa5df4d7ee9360a90e76b"] + git = "https://github.com/hsivonen/chardetng" + rev = "3484d3e3ebdc8931493aa5df4d7ee9360a90e76b" + replace-with = "vendored-sources" + + [source."git+https://github.com/hsivonen/chardetng_c?rev=ed8a4c6f900a90d4dbc1d64b856e61490a1c3570"] + git = "https://github.com/hsivonen/chardetng_c" + rev = "ed8a4c6f900a90d4dbc1d64b856e61490a1c3570" + replace-with = "vendored-sources" + +-[source."git+https://github.com/hsivonen/packed_simd?rev=e588ceb568878e1a3156ea9ce551d5b63ef0cdc4"] +-git = "https://github.com/hsivonen/packed_simd" +-rev = "e588ceb568878e1a3156ea9ce551d5b63ef0cdc4" +-replace-with = "vendored-sources" +- + [source."git+https://github.com/jfkthame/mapped_hyph.git?rev=c7651a0cffff41996ad13c44f689bd9cd2192c01"] + git = "https://github.com/jfkthame/mapped_hyph.git" + rev = "c7651a0cffff41996ad13c44f689bd9cd2192c01" + replace-with = "vendored-sources" + + [source."git+https://github.com/mozilla-spidermonkey/jsparagus?rev=64ba08e24749616de2344112f226d1ef4ba893ae"] + git = "https://github.com/mozilla-spidermonkey/jsparagus" + rev = "64ba08e24749616de2344112f226d1ef4ba893ae" +diff --git a/Cargo.lock b/Cargo.lock +--- a/Cargo.lock ++++ b/Cargo.lock +@@ -80,16 +80,25 @@ dependencies = [ + name = "android_system_properties" + version = "0.1.5" + source = "registry+https://github.com/rust-lang/crates.io-index" + checksum = "819e7219dbd41043ac279b19830f2efc897156490d7fd6ea916720117ee66311" + dependencies = [ + "libc", + ] + ++[[package]] ++name = "any_all_workaround" ++version = "0.1.0" ++source = "git+https://github.com/hsivonen/any_all_workaround?rev=7fb1b7034c9f172aade21ee1c8554e8d8a48af80#7fb1b7034c9f172aade21ee1c8554e8d8a48af80" ++dependencies = [ ++ "cfg-if 1.0.0", ++ "version_check", ++] ++ + [[package]] + name = "anyhow" + version = "1.0.69" + source = "registry+https://github.com/rust-lang/crates.io-index" + checksum = "224afbd727c3d6e4b90103ece64b8d1b67fbb1973b1046c2281eed3f3803f800" + + [[package]] + name = "app_services_logger" +@@ -1431,22 +1440,22 @@ dependencies = [ + "encoding_rs", + "nserror", + "nsstring", + "xmldecl", + ] + + [[package]] + name = "encoding_rs" +-version = "0.8.33" ++version = "0.8.34" + source = "registry+https://github.com/rust-lang/crates.io-index" +-checksum = "7268b386296a025e474d5140678f75d6de9493ae55a5d709eeb9dd08149945e1" ++checksum = "b45de904aa0b010bce2ab45264d0631681847fa7b6f2eaa7dab7619943bc4f59" + dependencies = [ ++ "any_all_workaround", + "cfg-if 1.0.0", +- "packed_simd", + ] + + [[package]] + name = "enum-primitive-derive" + version = "0.2.2" + source = "registry+https://github.com/rust-lang/crates.io-index" + checksum = "c375b9c5eadb68d0a6efee2999fef292f45854c3444c86f09d8ab086ba942b0e" + dependencies = [ +@@ -3901,25 +3910,16 @@ checksum = "8d91edf4fbb970279443471345a4e8c491bf05bb283b3e6c88e4e606fd8c181b" + [[package]] + name = "oxilangtag-ffi" + version = "0.1.0" + dependencies = [ + "nsstring", + "oxilangtag", + ] + +-[[package]] +-name = "packed_simd" +-version = "0.3.9" +-source = "git+https://github.com/hsivonen/packed_simd?rev=e588ceb568878e1a3156ea9ce551d5b63ef0cdc4#e588ceb568878e1a3156ea9ce551d5b63ef0cdc4" +-dependencies = [ +- "cfg-if 1.0.0", +- "num-traits", +-] +- + [[package]] + name = "parking_lot" + version = "0.11.2" + source = "registry+https://github.com/rust-lang/crates.io-index" + checksum = "7d17b78036a60663b797adeaee46f5c9dfebb86948d1255007a1d6be0271ff99" + dependencies = [ + "instant", + "lock_api", +diff --git a/Cargo.toml b/Cargo.toml +--- a/Cargo.toml ++++ b/Cargo.toml +@@ -154,22 +154,22 @@ rure = { path = "third_party/rust/rure" } + + # 0.31.1 but without rust-cssparser#342. + # TODO: Remove these, and just use v0.31.1 once bug 1836219 lands + # (which will get syn 2 into the tree). + cssparser = { path = "third_party/rust/cssparser" } + cssparser-macros = { path = "third_party/rust/cssparser-macros" } + + # Other overrides ++any_all_workaround = { git = "https://github.com/hsivonen/any_all_workaround", rev = "7fb1b7034c9f172aade21ee1c8554e8d8a48af80" } + chardetng = { git = "https://github.com/hsivonen/chardetng", rev="3484d3e3ebdc8931493aa5df4d7ee9360a90e76b" } + chardetng_c = { git = "https://github.com/hsivonen/chardetng_c", rev="ed8a4c6f900a90d4dbc1d64b856e61490a1c3570" } + coremidi = { git = "https://github.com/chris-zen/coremidi.git", rev="fc68464b5445caf111e41f643a2e69ccce0b4f83" } + firefox-on-glean = { path = "toolkit/components/glean/api" } + libudev-sys = { path = "dom/webauthn/libudev-sys" } +-packed_simd = { git = "https://github.com/hsivonen/packed_simd", rev = "e588ceb568878e1a3156ea9ce551d5b63ef0cdc4" } + midir = { git = "https://github.com/mozilla/midir.git", rev = "519e651241e867af3391db08f9ae6400bc023e18" } + # warp 0.3.3 + https://github.com/seanmonstar/warp/pull/1007 + warp = { git = "https://github.com/glandium/warp", rev = "4af45fae95bc98b0eba1ef0db17e1dac471bb23d" } + + # application-services overrides to make updating them all simpler. + interrupt-support = { git = "https://github.com/mozilla/application-services", rev = "86c84c217036c12283d19368867323a66bf35883" } + sql-support = { git = "https://github.com/mozilla/application-services", rev = "86c84c217036c12283d19368867323a66bf35883" } + sync15 = { git = "https://github.com/mozilla/application-services", rev = "86c84c217036c12283d19368867323a66bf35883" } +diff --git a/config/makefiles/rust.mk b/config/makefiles/rust.mk +--- a/config/makefiles/rust.mk ++++ b/config/makefiles/rust.mk +@@ -260,17 +260,17 @@ export COREAUDIO_SDK_PATH=$(IPHONEOS_SDK + export IPHONEOS_SDK_DIR + PATH := $(topsrcdir)/build/macosx:$(PATH) + endif + endif + + ifndef RUSTC_BOOTSTRAP + RUSTC_BOOTSTRAP := mozglue_static,qcms + ifdef MOZ_RUST_SIMD +-RUSTC_BOOTSTRAP := $(RUSTC_BOOTSTRAP),encoding_rs,packed_simd ++RUSTC_BOOTSTRAP := $(RUSTC_BOOTSTRAP),encoding_rs,any_all_workaround + endif + export RUSTC_BOOTSTRAP + endif + + target_rust_ltoable := force-cargo-library-build $(ADD_RUST_LTOABLE) + target_rust_nonltoable := force-cargo-test-run force-cargo-program-build + + ifdef MOZ_PGO_RUST +diff --git a/supply-chain/audits.toml b/supply-chain/audits.toml +--- a/supply-chain/audits.toml ++++ b/supply-chain/audits.toml +@@ -596,16 +596,29 @@ who = "Mike Hommey "] ++description = "Workaround for bad LLVM codegen for boolean reductions on 32-bit ARM" ++homepage = "https://docs.rs/any_all_workaround/" ++documentation = "https://docs.rs/any_all_workaround/" ++readme = "README.md" ++license = "MIT OR Apache-2.0" ++repository = "https://github.com/hsivonen/any_all_workaround" ++ ++[dependencies] ++cfg-if = "1.0" ++ ++[build-dependencies] ++version_check = "0.9" +diff --git a/third_party/rust/packed_simd/LICENSE-APACHE b/third_party/rust/any_all_workaround/LICENSE-APACHE +rename from third_party/rust/packed_simd/LICENSE-APACHE +rename to third_party/rust/any_all_workaround/LICENSE-APACHE +diff --git a/third_party/rust/packed_simd/LICENSE-MIT b/third_party/rust/any_all_workaround/LICENSE-MIT +rename from third_party/rust/packed_simd/LICENSE-MIT +rename to third_party/rust/any_all_workaround/LICENSE-MIT +diff --git a/third_party/rust/any_all_workaround/LICENSE-MIT-QCMS b/third_party/rust/any_all_workaround/LICENSE-MIT-QCMS +new file mode 100644 +--- /dev/null ++++ b/third_party/rust/any_all_workaround/LICENSE-MIT-QCMS +@@ -0,0 +1,21 @@ ++qcms ++Copyright (C) 2009-2024 Mozilla Corporation ++Copyright (C) 1998-2007 Marti Maria ++ ++Permission is hereby granted, free of charge, to any person obtaining ++a copy of this software and associated documentation files (the "Software"), ++to deal in the Software without restriction, including without limitation ++the rights to use, copy, modify, merge, publish, distribute, sublicense, ++and/or sell copies of the Software, and to permit persons to whom the Software ++is furnished to do so, subject to the following conditions: ++ ++The above copyright notice and this permission notice shall be included in ++all copies or substantial portions of the Software. ++ ++THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO ++THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE ++LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION ++OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION ++WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +diff --git a/third_party/rust/any_all_workaround/README.md b/third_party/rust/any_all_workaround/README.md +new file mode 100644 +--- /dev/null ++++ b/third_party/rust/any_all_workaround/README.md +@@ -0,0 +1,13 @@ ++# any_all_workaround ++ ++This is a workaround for bad codegen ([Rust bug](https://github.com/rust-lang/portable-simd/issues/146), [LLVM bug](https://github.com/llvm/llvm-project/issues/50466)) for the `any()` and `all()` reductions for NEON-backed SIMD vectors on 32-bit ARM. On other platforms these delegate to `any()` and `all()` in `core::simd`. ++ ++The plan is to abandon this crate once the LLVM bug is fixed or `core::simd` works around the LLVM bug. ++ ++The code is forked from the [`packed_simd` crate](https://raw.githubusercontent.com/hsivonen/packed_simd/d938e39bee9bc5c222f5f2f2a0df9e53b5ce36ae/src/codegen/reductions/mask/arm.rs). ++ ++This crate requires Nightly Rust as it depends on the `portable_simd` feature. ++ ++# License ++ ++`MIT OR Apache-2.0`, since that's how `packed_simd` is licensed. (The ARM intrinsics Rust version workaround is from qcms, see LICENSE-MIT-QCMS.) +diff --git a/third_party/rust/any_all_workaround/build.rs b/third_party/rust/any_all_workaround/build.rs +new file mode 100644 +--- /dev/null ++++ b/third_party/rust/any_all_workaround/build.rs +@@ -0,0 +1,7 @@ ++extern crate version_check as rustc; ++ ++fn main() { ++ if rustc::is_min_version("1.78.0").unwrap_or(false) { ++ println!("cargo:rustc-cfg=stdsimd_split"); ++ } ++} +diff --git a/third_party/rust/any_all_workaround/src/lib.rs b/third_party/rust/any_all_workaround/src/lib.rs +new file mode 100644 +--- /dev/null ++++ b/third_party/rust/any_all_workaround/src/lib.rs +@@ -0,0 +1,110 @@ ++// This code began as a fork of ++// https://raw.githubusercontent.com/rust-lang/packed_simd/d938e39bee9bc5c222f5f2f2a0df9e53b5ce36ae/src/codegen/reductions/mask/arm.rs ++// which didn't have a license header on the file, but Cargo.toml said "MIT OR Apache-2.0". ++// See LICENSE-MIT and LICENSE-APACHE. ++ ++#![no_std] ++#![feature(portable_simd)] ++#![cfg_attr( ++ all( ++ stdsimd_split, ++ target_arch = "arm", ++ target_endian = "little", ++ target_feature = "neon", ++ target_feature = "v7" ++ ), ++ feature(stdarch_arm_neon_intrinsics) ++)] ++#![cfg_attr( ++ all( ++ not(stdsimd_split), ++ target_arch = "arm", ++ target_endian = "little", ++ target_feature = "neon", ++ target_feature = "v7" ++ ), ++ feature(stdsimd) ++)] ++ ++use cfg_if::cfg_if; ++use core::simd::mask16x8; ++use core::simd::mask32x4; ++use core::simd::mask8x16; ++ ++cfg_if! { ++ if #[cfg(all(target_arch = "arm", target_endian = "little", target_feature = "neon", target_feature = "v7"))] { ++ use core::simd::mask8x8; ++ use core::simd::mask16x4; ++ use core::simd::mask32x2; ++ macro_rules! arm_128_v7_neon_impl { ++ ($all:ident, $any:ident, $id:ident, $half:ident, $vpmin:ident, $vpmax:ident) => { ++ #[inline] ++ pub fn $all(s: $id) -> bool { ++ use core::arch::arm::$vpmin; ++ use core::mem::transmute; ++ unsafe { ++ union U { ++ halves: ($half, $half), ++ vec: $id, ++ } ++ let halves = U { vec: s }.halves; ++ let h: $half = transmute($vpmin(transmute(halves.0), transmute(halves.1))); ++ h.all() ++ } ++ } ++ #[inline] ++ pub fn $any(s: $id) -> bool { ++ use core::arch::arm::$vpmax; ++ use core::mem::transmute; ++ unsafe { ++ union U { ++ halves: ($half, $half), ++ vec: $id, ++ } ++ let halves = U { vec: s }.halves; ++ let h: $half = transmute($vpmax(transmute(halves.0), transmute(halves.1))); ++ h.any() ++ } ++ } ++ } ++ } ++ } else { ++ macro_rules! arm_128_v7_neon_impl { ++ ($all:ident, $any:ident, $id:ident, $half:ident, $vpmin:ident, $vpmax:ident) => { ++ #[inline(always)] ++ pub fn $all(s: $id) -> bool { ++ s.all() ++ } ++ #[inline(always)] ++ pub fn $any(s: $id) -> bool { ++ s.any() ++ } ++ } ++ } ++ } ++} ++ ++arm_128_v7_neon_impl!( ++ all_mask8x16, ++ any_mask8x16, ++ mask8x16, ++ mask8x8, ++ vpmin_u8, ++ vpmax_u8 ++); ++arm_128_v7_neon_impl!( ++ all_mask16x8, ++ any_mask16x8, ++ mask16x8, ++ mask16x4, ++ vpmin_u16, ++ vpmax_u16 ++); ++arm_128_v7_neon_impl!( ++ all_mask32x4, ++ any_mask32x4, ++ mask32x4, ++ mask32x2, ++ vpmin_u32, ++ vpmax_u32 ++); +diff --git a/third_party/rust/encoding_rs/Cargo.toml b/third_party/rust/encoding_rs/Cargo.toml +--- a/third_party/rust/encoding_rs/Cargo.toml ++++ b/third_party/rust/encoding_rs/Cargo.toml +@@ -6,18 +6,19 @@ + # to registry (e.g., crates.io) dependencies. + # + # If you are reading this file be aware that the original Cargo.toml + # will likely look very different (and much more reasonable). + # See Cargo.toml.orig for the original contents. + + [package] + edition = "2018" ++rust-version = "1.36" + name = "encoding_rs" +-version = "0.8.33" ++version = "0.8.34" + authors = ["Henri Sivonen "] + description = "A Gecko-oriented implementation of the Encoding Standard" + homepage = "https://docs.rs/encoding_rs/" + documentation = "https://docs.rs/encoding_rs/" + readme = "README.md" + keywords = [ + "encoding", + "web", +@@ -31,23 +32,23 @@ categories = [ + "internationalization", + ] + license = "(Apache-2.0 OR MIT) AND BSD-3-Clause" + repository = "https://github.com/hsivonen/encoding_rs" + + [profile.release] + lto = true + ++[dependencies.any_all_workaround] ++version = "0.1.0" ++optional = true ++ + [dependencies.cfg-if] + version = "1.0" + +-[dependencies.packed_simd] +-version = "0.3.9" +-optional = true +- + [dependencies.serde] + version = "1.0" + optional = true + + [dev-dependencies.bincode] + version = "1.0" + + [dev-dependencies.serde_derive] +@@ -69,15 +70,9 @@ fast-legacy-encode = [ + "fast-hanja-encode", + "fast-kanji-encode", + "fast-gb-hanzi-encode", + "fast-big5-hanzi-encode", + ] + less-slow-big5-hanzi-encode = [] + less-slow-gb-hanzi-encode = [] + less-slow-kanji-encode = [] +-simd-accel = [ +- "packed_simd", +- "packed_simd/into_bits", +-] +- +-[badges.travis-ci] +-repository = "hsivonen/encoding_rs" ++simd-accel = ["any_all_workaround"] +diff --git a/third_party/rust/encoding_rs/README.md b/third_party/rust/encoding_rs/README.md +--- a/third_party/rust/encoding_rs/README.md ++++ b/third_party/rust/encoding_rs/README.md +@@ -162,50 +162,36 @@ wrappers. + * [C++](https://github.com/hsivonen/recode_cpp) + + ## Optional features + + There are currently these optional cargo features: + + ### `simd-accel` + +-Enables SIMD acceleration using the nightly-dependent `packed_simd` crate. ++Enables SIMD acceleration using the nightly-dependent `portable_simd` standard ++library feature. + + This is an opt-in feature, because enabling this feature _opts out_ of Rust's + guarantees of future compilers compiling old code (aka. "stability story"). + + Currently, this has not been tested to be an improvement except for these +-targets: ++targets and enabling the `simd-accel` feature is expected to break the build ++on other targets: + + * x86_64 + * i686 + * aarch64 + * thumbv7neon + + If you use nightly Rust, you use targets whose first component is one of the + above, and you are prepared _to have to revise your configuration when updating + Rust_, you should enable this feature. Otherwise, please _do not_ enable this + feature. + +-_Note!_ If you are compiling for a target that does not have 128-bit SIMD +-enabled as part of the target definition and you are enabling 128-bit SIMD +-using `-C target_feature`, you need to enable the `core_arch` Cargo feature +-for `packed_simd` to compile a crates.io snapshot of `core_arch` instead of +-using the standard-library copy of `core::arch`, because the `core::arch` +-module of the pre-compiled standard library has been compiled with the +-assumption that the CPU doesn't have 128-bit SIMD. At present this applies +-mainly to 32-bit ARM targets whose first component does not include the +-substring `neon`. +- +-The encoding_rs side of things has not been properly set up for POWER, +-PowerPC, MIPS, etc., SIMD at this time, so even if you were to follow +-the advice from the previous paragraph, you probably shouldn't use +-the `simd-accel` option on the less mainstream architectures at this +-time. +- + Used by Firefox. + + ### `serde` + + Enables support for serializing and deserializing `&'static Encoding`-typed + struct fields using [Serde][1]. + + [1]: https://serde.rs/ +@@ -376,18 +362,19 @@ It is a goal to support the latest stabl + the version of Rust that's used for Firefox Nightly. + + At this time, there is no firm commitment to support a version older than + what's required by Firefox, and there is no commitment to treat MSRV changes + as semver-breaking, because this crate depends on `cfg-if`, which doesn't + appear to treat MSRV changes as semver-breaking, so it would be useless for + this crate to treat MSRV changes as semver-breaking. + +-As of 2021-02-04, MSRV appears to be Rust 1.36.0 for using the crate and ++As of 2024-04-04, MSRV appears to be Rust 1.36.0 for using the crate and + 1.42.0 for doc tests to pass without errors about the global allocator. ++With the `simd-accel` feature, the MSRV is even higher. + + ## Compatibility with rust-encoding + + A compatibility layer that implements the rust-encoding API on top of + encoding_rs is + [provided as a separate crate](https://github.com/hsivonen/encoding_rs_compat) + (cannot be uploaded to crates.io). The compatibility layer was originally + written with the assuption that Firefox would need it, but it is not currently +@@ -441,20 +428,27 @@ To regenerate the generated code: + - [x] Implement the rust-encoding API in terms of encoding_rs. + - [x] Add SIMD acceleration for Aarch64. + - [x] Investigate the use of NEON on 32-bit ARM. + - [ ] ~Investigate Björn Höhrmann's lookup table acceleration for UTF-8 as + adapted to Rust in rust-encoding.~ + - [x] Add actually fast CJK encode options. + - [ ] ~Investigate [Bob Steagall's lookup table acceleration for UTF-8](https://github.com/BobSteagall/CppNow2018/blob/master/FastConversionFromUTF-8/Fast%20Conversion%20From%20UTF-8%20with%20C%2B%2B%2C%20DFAs%2C%20and%20SSE%20Intrinsics%20-%20Bob%20Steagall%20-%20C%2B%2BNow%202018.pdf).~ + - [x] Provide a build mode that works without `alloc` (with lesser API surface). +-- [ ] Migrate to `std::simd` once it is stable and declare 1.0. ++- [x] Migrate to `std::simd` ~once it is stable and declare 1.0.~ ++- [ ] Migrate `unsafe` slice access by larger types than `u8`/`u16` to `align_to`. + + ## Release Notes + ++### 0.8.34 ++ ++* Use the `portable_simd` nightly feature of the standard library instead of the `packed_simd` crate. Only affects the `simd-accel` optional nightly feature. ++* Internal documentation improvements and minor code improvements around `unsafe`. ++* Added `rust-version` to `Cargo.toml`. ++ + ### 0.8.33 + + * Use `packed_simd` instead of `packed_simd_2` again now that updates are back under the `packed_simd` name. Only affects the `simd-accel` optional nightly feature. + + ### 0.8.32 + + * Removed `build.rs`. (This removal should resolve false positives reported by some antivirus products. This may break some build configurations that have opted out of Rust's guarantees against future build breakage.) + * Internal change to what API is used for reinterpreting the lane configuration of SIMD vectors. +diff --git a/third_party/rust/encoding_rs/src/ascii.rs b/third_party/rust/encoding_rs/src/ascii.rs +--- a/third_party/rust/encoding_rs/src/ascii.rs ++++ b/third_party/rust/encoding_rs/src/ascii.rs +@@ -46,71 +46,87 @@ cfg_if! { + #[allow(dead_code)] + #[inline(always)] + fn likely(b: bool) -> bool { + b + } + } + } + ++// Safety invariants for masks: data & mask = 0 for valid ASCII or basic latin utf-16 ++ + // `as` truncates, so works on 32-bit, too. + #[allow(dead_code)] + pub const ASCII_MASK: usize = 0x8080_8080_8080_8080u64 as usize; + + // `as` truncates, so works on 32-bit, too. + #[allow(dead_code)] + pub const BASIC_LATIN_MASK: usize = 0xFF80_FF80_FF80_FF80u64 as usize; + + #[allow(unused_macros)] + macro_rules! ascii_naive { + ($name:ident, $src_unit:ty, $dst_unit:ty) => { ++ /// Safety: src and dst must have len_unit elements and be aligned ++ /// Safety-usable invariant: will return Some() when it fails ++ /// to convert. The first value will be a u8 that is > 127. + #[inline(always)] + pub unsafe fn $name( + src: *const $src_unit, + dst: *mut $dst_unit, + len: usize, + ) -> Option<($src_unit, usize)> { + // Yes, manually omitting the bound check here matters + // a lot for perf. + for i in 0..len { ++ // Safety: len invariant used here + let code_unit = *(src.add(i)); ++ // Safety: Upholds safety-usable invariant here + if code_unit > 127 { + return Some((code_unit, i)); + } ++ // Safety: len invariant used here + *(dst.add(i)) = code_unit as $dst_unit; + } + return None; + } + }; + } + + #[allow(unused_macros)] + macro_rules! ascii_alu { + ($name:ident, ++ // safety invariant: src/dst MUST be u8 + $src_unit:ty, + $dst_unit:ty, ++ // Safety invariant: stride_fn must consume and produce two usizes, and return the index of the first non-ascii when it fails + $stride_fn:ident) => { ++ /// Safety: src and dst must have len elements, src is valid for read, dst is valid for ++ /// write ++ /// Safety-usable invariant: will return Some() when it fails ++ /// to convert. The first value will be a u8 that is > 127. + #[cfg_attr(feature = "cargo-clippy", allow(never_loop, cast_ptr_alignment))] + #[inline(always)] + pub unsafe fn $name( + src: *const $src_unit, + dst: *mut $dst_unit, + len: usize, + ) -> Option<($src_unit, usize)> { + let mut offset = 0usize; + // This loop is only broken out of as a `goto` forward + loop { ++ // Safety: until_alignment becomes the number of bytes we need to munch until we are aligned to usize + let mut until_alignment = { + // Check if the other unit aligns if we move the narrower unit + // to alignment. + // if ::core::mem::size_of::<$src_unit>() == ::core::mem::size_of::<$dst_unit>() { + // ascii_to_ascii + let src_alignment = (src as usize) & ALU_ALIGNMENT_MASK; + let dst_alignment = (dst as usize) & ALU_ALIGNMENT_MASK; + if src_alignment != dst_alignment { ++ // Safety: bails early and ends up in the naïve branch where usize-alignment doesn't matter + break; + } + (ALU_ALIGNMENT - src_alignment) & ALU_ALIGNMENT_MASK + // } else if ::core::mem::size_of::<$src_unit>() < ::core::mem::size_of::<$dst_unit>() { + // ascii_to_basic_latin + // let src_until_alignment = (ALIGNMENT - ((src as usize) & ALIGNMENT_MASK)) & ALIGNMENT_MASK; + // if (dst.add(src_until_alignment) as usize) & ALIGNMENT_MASK != 0 { + // break; +@@ -129,74 +145,104 @@ macro_rules! ascii_alu { + // Moving pointers to alignment seems to be a pessimization on + // x86_64 for operations that have UTF-16 as the internal + // Unicode representation. However, since it seems to be a win + // on ARM (tested ARMv7 code running on ARMv8 [rpi3]), except + // mixed results when encoding from UTF-16 and since x86 and + // x86_64 should be using SSE2 in due course, keeping the move + // to alignment here. It would be good to test on more ARM CPUs + // and on real MIPS and POWER hardware. ++ // ++ // Safety: This is the naïve code once again, for `until_alignment` bytes + while until_alignment != 0 { + let code_unit = *(src.add(offset)); + if code_unit > 127 { ++ // Safety: Upholds safety-usable invariant here + return Some((code_unit, offset)); + } + *(dst.add(offset)) = code_unit as $dst_unit; ++ // Safety: offset is the number of bytes copied so far + offset += 1; + until_alignment -= 1; + } + let len_minus_stride = len - ALU_STRIDE_SIZE; + loop { ++ // Safety: num_ascii is known to be a byte index of a non-ascii byte due to stride_fn's invariant + if let Some(num_ascii) = $stride_fn( ++ // Safety: These are known to be valid and aligned since we have at ++ // least ALU_STRIDE_SIZE data in these buffers, and offset is the ++ // number of elements copied so far, which according to the ++ // until_alignment calculation above will cause both src and dst to be ++ // aligned to usize after this add + src.add(offset) as *const usize, + dst.add(offset) as *mut usize, + ) { + offset += num_ascii; ++ // Safety: Upholds safety-usable invariant here by indexing into non-ascii byte + return Some((*(src.add(offset)), offset)); + } ++ // Safety: offset continues to be the number of bytes copied so far, and ++ // maintains usize alignment for the next loop iteration + offset += ALU_STRIDE_SIZE; ++ // Safety: This is `offset > len - stride. This loop will continue as long as ++ // `offset <= len - stride`, which means there are `stride` bytes to still be read. + if offset > len_minus_stride { + break; + } + } + } + break; + } ++ ++ // Safety: This is the naïve code, same as ascii_naive, and has no requirements ++ // other than src/dst being valid for the the right lens + while offset < len { ++ // Safety: len invariant used here + let code_unit = *(src.add(offset)); + if code_unit > 127 { ++ // Safety: Upholds safety-usable invariant here + return Some((code_unit, offset)); + } ++ // Safety: len invariant used here + *(dst.add(offset)) = code_unit as $dst_unit; + offset += 1; + } + None + } + }; + } + + #[allow(unused_macros)] + macro_rules! basic_latin_alu { + ($name:ident, ++ // safety invariant: use u8 for src/dest for ascii, and u16 for basic_latin + $src_unit:ty, + $dst_unit:ty, ++ // safety invariant: stride function must munch ALU_STRIDE_SIZE*size(src_unit) bytes off of src and ++ // write ALU_STRIDE_SIZE*size(dst_unit) bytes to dst + $stride_fn:ident) => { ++ /// Safety: src and dst must have len elements, src is valid for read, dst is valid for ++ /// write ++ /// Safety-usable invariant: will return Some() when it fails ++ /// to convert. The first value will be a u8 that is > 127. + #[cfg_attr( + feature = "cargo-clippy", + allow(never_loop, cast_ptr_alignment, cast_lossless) + )] + #[inline(always)] + pub unsafe fn $name( + src: *const $src_unit, + dst: *mut $dst_unit, + len: usize, + ) -> Option<($src_unit, usize)> { + let mut offset = 0usize; + // This loop is only broken out of as a `goto` forward + loop { ++ // Safety: until_alignment becomes the number of bytes we need to munch from src/dest until we are aligned to usize ++ // We ensure basic-latin has the same alignment as ascii, starting with ascii since it is smaller. + let mut until_alignment = { + // Check if the other unit aligns if we move the narrower unit + // to alignment. + // if ::core::mem::size_of::<$src_unit>() == ::core::mem::size_of::<$dst_unit>() { + // ascii_to_ascii + // let src_alignment = (src as usize) & ALIGNMENT_MASK; + // let dst_alignment = (dst as usize) & ALIGNMENT_MASK; + // if src_alignment != dst_alignment { +@@ -232,66 +278,89 @@ macro_rules! basic_latin_alu { + // Moving pointers to alignment seems to be a pessimization on + // x86_64 for operations that have UTF-16 as the internal + // Unicode representation. However, since it seems to be a win + // on ARM (tested ARMv7 code running on ARMv8 [rpi3]), except + // mixed results when encoding from UTF-16 and since x86 and + // x86_64 should be using SSE2 in due course, keeping the move + // to alignment here. It would be good to test on more ARM CPUs + // and on real MIPS and POWER hardware. ++ // ++ // Safety: This is the naïve code once again, for `until_alignment` bytes + while until_alignment != 0 { + let code_unit = *(src.add(offset)); + if code_unit > 127 { ++ // Safety: Upholds safety-usable invariant here + return Some((code_unit, offset)); + } + *(dst.add(offset)) = code_unit as $dst_unit; ++ // Safety: offset is the number of bytes copied so far + offset += 1; + until_alignment -= 1; + } + let len_minus_stride = len - ALU_STRIDE_SIZE; + loop { + if !$stride_fn( ++ // Safety: These are known to be valid and aligned since we have at ++ // least ALU_STRIDE_SIZE data in these buffers, and offset is the ++ // number of elements copied so far, which according to the ++ // until_alignment calculation above will cause both src and dst to be ++ // aligned to usize after this add + src.add(offset) as *const usize, + dst.add(offset) as *mut usize, + ) { + break; + } ++ // Safety: offset continues to be the number of bytes copied so far, and ++ // maintains usize alignment for the next loop iteration + offset += ALU_STRIDE_SIZE; ++ // Safety: This is `offset > len - stride. This loop will continue as long as ++ // `offset <= len - stride`, which means there are `stride` bytes to still be read. + if offset > len_minus_stride { + break; + } + } + } + break; + } ++ // Safety: This is the naïve code once again, for leftover bytes + while offset < len { ++ // Safety: len invariant used here + let code_unit = *(src.add(offset)); + if code_unit > 127 { ++ // Safety: Upholds safety-usable invariant here + return Some((code_unit, offset)); + } ++ // Safety: len invariant used here + *(dst.add(offset)) = code_unit as $dst_unit; + offset += 1; + } + None + } + }; + } + + #[allow(unused_macros)] + macro_rules! latin1_alu { ++ // safety invariant: stride function must munch ALU_STRIDE_SIZE*size(src_unit) bytes off of src and ++ // write ALU_STRIDE_SIZE*size(dst_unit) bytes to dst + ($name:ident, $src_unit:ty, $dst_unit:ty, $stride_fn:ident) => { ++ /// Safety: src and dst must have len elements, src is valid for read, dst is valid for ++ /// write + #[cfg_attr( + feature = "cargo-clippy", + allow(never_loop, cast_ptr_alignment, cast_lossless) + )] + #[inline(always)] + pub unsafe fn $name(src: *const $src_unit, dst: *mut $dst_unit, len: usize) { + let mut offset = 0usize; + // This loop is only broken out of as a `goto` forward + loop { ++ // Safety: until_alignment becomes the number of bytes we need to munch from src/dest until we are aligned to usize ++ // We ensure the UTF-16 side has the same alignment as the Latin-1 side, starting with Latin-1 since it is smaller. + let mut until_alignment = { + if ::core::mem::size_of::<$src_unit>() < ::core::mem::size_of::<$dst_unit>() { + // unpack + let src_until_alignment = (ALU_ALIGNMENT + - ((src as usize) & ALU_ALIGNMENT_MASK)) + & ALU_ALIGNMENT_MASK; + if (dst.wrapping_add(src_until_alignment) as usize) & ALU_ALIGNMENT_MASK + != 0 +@@ -308,373 +377,485 @@ macro_rules! latin1_alu { + != 0 + { + break; + } + dst_until_alignment + } + }; + if until_alignment + ALU_STRIDE_SIZE <= len { ++ // Safety: This is the naïve code once again, for `until_alignment` bytes + while until_alignment != 0 { + let code_unit = *(src.add(offset)); + *(dst.add(offset)) = code_unit as $dst_unit; ++ // Safety: offset is the number of bytes copied so far + offset += 1; + until_alignment -= 1; + } + let len_minus_stride = len - ALU_STRIDE_SIZE; + loop { + $stride_fn( ++ // Safety: These are known to be valid and aligned since we have at ++ // least ALU_STRIDE_SIZE data in these buffers, and offset is the ++ // number of elements copied so far, which according to the ++ // until_alignment calculation above will cause both src and dst to be ++ // aligned to usize after this add + src.add(offset) as *const usize, + dst.add(offset) as *mut usize, + ); ++ // Safety: offset continues to be the number of bytes copied so far, and ++ // maintains usize alignment for the next loop iteration + offset += ALU_STRIDE_SIZE; ++ // Safety: This is `offset > len - stride. This loop will continue as long as ++ // `offset <= len - stride`, which means there are `stride` bytes to still be read. + if offset > len_minus_stride { + break; + } + } + } + break; + } ++ // Safety: This is the naïve code once again, for leftover bytes + while offset < len { ++ // Safety: len invariant used here + let code_unit = *(src.add(offset)); + *(dst.add(offset)) = code_unit as $dst_unit; + offset += 1; + } + } + }; + } + + #[allow(unused_macros)] + macro_rules! ascii_simd_check_align { + ( + $name:ident, + $src_unit:ty, + $dst_unit:ty, ++ // Safety: This function must require aligned src/dest that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit + $stride_both_aligned:ident, ++ // Safety: This function must require aligned/unaligned src/dest that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit + $stride_src_aligned:ident, ++ // Safety: This function must require unaligned/aligned src/dest that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit + $stride_dst_aligned:ident, ++ // Safety: This function must require unaligned src/dest that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit + $stride_neither_aligned:ident + ) => { ++ /// Safety: src/dst must be valid for reads/writes of `len` elements of their units. ++ /// ++ /// Safety-usable invariant: will return Some() when it encounters non-ASCII, with the first element in the Some being ++ /// guaranteed to be non-ASCII (> 127), and the second being the offset where it is found + #[inline(always)] + pub unsafe fn $name( + src: *const $src_unit, + dst: *mut $dst_unit, + len: usize, + ) -> Option<($src_unit, usize)> { + let mut offset = 0usize; ++ // Safety: if this check succeeds we're valid for reading/writing at least `SIMD_STRIDE_SIZE` elements. + if SIMD_STRIDE_SIZE <= len { + let len_minus_stride = len - SIMD_STRIDE_SIZE; + // XXX Should we first process one stride unconditionally as unaligned to + // avoid the cost of the branchiness below if the first stride fails anyway? + // XXX Should we just use unaligned SSE2 access unconditionally? It seems that + // on Haswell, it would make sense to just use unaligned and not bother + // checking. Need to benchmark older architectures before deciding. + let dst_masked = (dst as usize) & SIMD_ALIGNMENT_MASK; ++ // Safety: checking whether src is aligned + if ((src as usize) & SIMD_ALIGNMENT_MASK) == 0 { ++ // Safety: Checking whether dst is aligned + if dst_masked == 0 { + loop { ++ // Safety: We're valid to read/write SIMD_STRIDE_SIZE elements and have the appropriate alignments + if !$stride_both_aligned(src.add(offset), dst.add(offset)) { + break; + } + offset += SIMD_STRIDE_SIZE; ++ // Safety: This is `offset > len - SIMD_STRIDE_SIZE` which means we always have at least `SIMD_STRIDE_SIZE` elements to munch next time. + if offset > len_minus_stride { + break; + } + } + } else { + loop { ++ // Safety: We're valid to read/write SIMD_STRIDE_SIZE elements and have the appropriate alignments + if !$stride_src_aligned(src.add(offset), dst.add(offset)) { + break; + } + offset += SIMD_STRIDE_SIZE; ++ // Safety: This is `offset > len - SIMD_STRIDE_SIZE` which means we always have at least `SIMD_STRIDE_SIZE` elements to munch next time. + if offset > len_minus_stride { + break; + } + } + } + } else { + if dst_masked == 0 { + loop { ++ // Safety: We're valid to read/write SIMD_STRIDE_SIZE elements and have the appropriate alignments + if !$stride_dst_aligned(src.add(offset), dst.add(offset)) { + break; + } + offset += SIMD_STRIDE_SIZE; ++ // Safety: This is `offset > len - SIMD_STRIDE_SIZE` which means we always have at least `SIMD_STRIDE_SIZE` elements to munch next time. + if offset > len_minus_stride { + break; + } + } + } else { + loop { ++ // Safety: We're valid to read/write SIMD_STRIDE_SIZE elements and have the appropriate alignments + if !$stride_neither_aligned(src.add(offset), dst.add(offset)) { + break; + } + offset += SIMD_STRIDE_SIZE; ++ // Safety: This is `offset > len - SIMD_STRIDE_SIZE` which means we always have at least `SIMD_STRIDE_SIZE` elements to munch next time. + if offset > len_minus_stride { + break; + } + } + } + } + } + while offset < len { ++ // Safety: uses len invariant here and below + let code_unit = *(src.add(offset)); + if code_unit > 127 { ++ // Safety: upholds safety-usable invariant + return Some((code_unit, offset)); + } + *(dst.add(offset)) = code_unit as $dst_unit; + offset += 1; + } + None + } + }; + } + + #[allow(unused_macros)] + macro_rules! ascii_simd_check_align_unrolled { + ( + $name:ident, + $src_unit:ty, + $dst_unit:ty, ++ // Safety: This function must require aligned src/dest that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit + $stride_both_aligned:ident, ++ // Safety: This function must require aligned/unaligned src/dest that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit + $stride_src_aligned:ident, ++ // Safety: This function must require unaligned src/dest that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit + $stride_neither_aligned:ident, ++ // Safety: This function must require aligned src/dest that are valid for reading/writing 2*SIMD_STRIDE_SIZE src_unit/dst_unit + $double_stride_both_aligned:ident, ++ // Safety: This function must require aligned/unaligned src/dest that are valid for reading/writing 2*SIMD_STRIDE_SIZE src_unit/dst_unit + $double_stride_src_aligned:ident + ) => { +- #[inline(always)] ++ /// Safety: src/dst must be valid for reads/writes of `len` elements of their units. ++ /// ++ /// Safety-usable invariant: will return Some() when it encounters non-ASCII, with the first element in the Some being ++ /// guaranteed to be non-ASCII (> 127), and the second being the offset where it is found #[inline(always)] + pub unsafe fn $name( + src: *const $src_unit, + dst: *mut $dst_unit, + len: usize, + ) -> Option<($src_unit, usize)> { + let unit_size = ::core::mem::size_of::<$src_unit>(); + let mut offset = 0usize; + // This loop is only broken out of as a goto forward without + // actually looping + 'outer: loop { ++ // Safety: if this check succeeds we're valid for reading/writing at least `SIMD_STRIDE_SIZE` elements. + if SIMD_STRIDE_SIZE <= len { + // First, process one unaligned ++ // Safety: this is safe to call since we're valid for this read/write + if !$stride_neither_aligned(src, dst) { + break 'outer; + } + offset = SIMD_STRIDE_SIZE; + + // We have now seen 16 ASCII bytes. Let's guess that + // there will be enough more to justify more expense + // in the case of non-ASCII. + // Use aligned reads for the sake of old microachitectures. ++ // ++ // Safety: this correctly calculates the number of src_units that need to be read before the remaining list is aligned. ++ // This is less that SIMD_ALIGNMENT, which is also SIMD_STRIDE_SIZE (as documented) + let until_alignment = ((SIMD_ALIGNMENT + - ((src.add(offset) as usize) & SIMD_ALIGNMENT_MASK)) + & SIMD_ALIGNMENT_MASK) + / unit_size; +- // This addition won't overflow, because even in the 32-bit PAE case the ++ // Safety: This addition won't overflow, because even in the 32-bit PAE case the + // address space holds enough code that the slice length can't be that + // close to address space size. + // offset now equals SIMD_STRIDE_SIZE, hence times 3 below. ++ // ++ // Safety: if this check succeeds we're valid for reading/writing at least `2 * SIMD_STRIDE_SIZE` elements plus `until_alignment`. ++ // The extra SIMD_STRIDE_SIZE in the condition is because `offset` is already `SIMD_STRIDE_SIZE`. + if until_alignment + (SIMD_STRIDE_SIZE * 3) <= len { + if until_alignment != 0 { ++ // Safety: this is safe to call since we're valid for this read/write (and more), and don't care about alignment ++ // This will copy over bytes that get decoded twice since it's not incrementing `offset` by SIMD_STRIDE_SIZE. This is fine. + if !$stride_neither_aligned(src.add(offset), dst.add(offset)) { + break; + } + offset += until_alignment; + } ++ // Safety: At this point we're valid for reading/writing 2*SIMD_STRIDE_SIZE elements ++ // Safety: Now `offset` is aligned for `src` + let len_minus_stride_times_two = len - (SIMD_STRIDE_SIZE * 2); ++ // Safety: This is whether dst is aligned + let dst_masked = (dst.add(offset) as usize) & SIMD_ALIGNMENT_MASK; + if dst_masked == 0 { + loop { ++ // Safety: both are aligned, we can call the aligned function. We're valid for reading/writing double stride from the initial condition ++ // and the loop break condition below + if let Some(advance) = + $double_stride_both_aligned(src.add(offset), dst.add(offset)) + { + offset += advance; + let code_unit = *(src.add(offset)); ++ // Safety: uses safety-usable invariant on ascii_to_ascii_simd_double_stride to return ++ // guaranteed non-ascii + return Some((code_unit, offset)); + } + offset += SIMD_STRIDE_SIZE * 2; ++ // Safety: This is `offset > len - 2 * SIMD_STRIDE_SIZE` which means we always have at least `2 * SIMD_STRIDE_SIZE` elements to munch next time. + if offset > len_minus_stride_times_two { + break; + } + } ++ // Safety: We're valid for reading/writing one more, and can still assume alignment + if offset + SIMD_STRIDE_SIZE <= len { + if !$stride_both_aligned(src.add(offset), dst.add(offset)) { + break 'outer; + } + offset += SIMD_STRIDE_SIZE; + } + } else { + loop { ++ // Safety: only src is aligned here. We're valid for reading/writing double stride from the initial condition ++ // and the loop break condition below + if let Some(advance) = + $double_stride_src_aligned(src.add(offset), dst.add(offset)) + { + offset += advance; + let code_unit = *(src.add(offset)); ++ // Safety: uses safety-usable invariant on ascii_to_ascii_simd_double_stride to return ++ // guaranteed non-ascii + return Some((code_unit, offset)); + } + offset += SIMD_STRIDE_SIZE * 2; ++ // Safety: This is `offset > len - 2 * SIMD_STRIDE_SIZE` which means we always have at least `2 * SIMD_STRIDE_SIZE` elements to munch next time. ++ + if offset > len_minus_stride_times_two { + break; + } + } ++ // Safety: We're valid for reading/writing one more, and can still assume alignment + if offset + SIMD_STRIDE_SIZE <= len { + if !$stride_src_aligned(src.add(offset), dst.add(offset)) { + break 'outer; + } + offset += SIMD_STRIDE_SIZE; + } + } + } else { + // At most two iterations, so unroll + if offset + SIMD_STRIDE_SIZE <= len { ++ // Safety: The check above ensures we're allowed to read/write this, and we don't use alignment + if !$stride_neither_aligned(src.add(offset), dst.add(offset)) { + break; + } + offset += SIMD_STRIDE_SIZE; + if offset + SIMD_STRIDE_SIZE <= len { ++ // Safety: The check above ensures we're allowed to read/write this, and we don't use alignment + if !$stride_neither_aligned(src.add(offset), dst.add(offset)) { + break; + } + offset += SIMD_STRIDE_SIZE; + } + } + } + } + break 'outer; + } + while offset < len { ++ // Safety: relies straightforwardly on the `len` invariant + let code_unit = *(src.add(offset)); + if code_unit > 127 { ++ // Safety-usable invariant upheld here + return Some((code_unit, offset)); + } + *(dst.add(offset)) = code_unit as $dst_unit; + offset += 1; + } + None + } + }; + } + + #[allow(unused_macros)] + macro_rules! latin1_simd_check_align { + ( + $name:ident, + $src_unit:ty, + $dst_unit:ty, ++ // Safety: This function must require aligned src/dest that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit + $stride_both_aligned:ident, ++ // Safety: This function must require aligned/unaligned src/dest that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit + $stride_src_aligned:ident, ++ // Safety: This function must require unaligned/aligned src/dest that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit + $stride_dst_aligned:ident, ++ // Safety: This function must require unaligned src/dest that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit + $stride_neither_aligned:ident ++ + ) => { ++ /// Safety: src/dst must be valid for reads/writes of `len` elements of their units. + #[inline(always)] + pub unsafe fn $name(src: *const $src_unit, dst: *mut $dst_unit, len: usize) { + let mut offset = 0usize; ++ // Safety: if this check succeeds we're valid for reading/writing at least `SIMD_STRIDE_SIZE` elements. + if SIMD_STRIDE_SIZE <= len { + let len_minus_stride = len - SIMD_STRIDE_SIZE; ++ // Whether dst is aligned + let dst_masked = (dst as usize) & SIMD_ALIGNMENT_MASK; ++ // Whether src is aligned + if ((src as usize) & SIMD_ALIGNMENT_MASK) == 0 { + if dst_masked == 0 { + loop { ++ // Safety: Both were aligned, we can use the aligned function + $stride_both_aligned(src.add(offset), dst.add(offset)); + offset += SIMD_STRIDE_SIZE; ++ // Safety: This is `offset > len - SIMD_STRIDE_SIZE`, which means in the next iteration we're valid for ++ // reading/writing at least SIMD_STRIDE_SIZE elements. + if offset > len_minus_stride { + break; + } + } + } else { + loop { ++ // Safety: src was aligned, dst was not + $stride_src_aligned(src.add(offset), dst.add(offset)); + offset += SIMD_STRIDE_SIZE; ++ // Safety: This is `offset > len - SIMD_STRIDE_SIZE`, which means in the next iteration we're valid for ++ // reading/writing at least SIMD_STRIDE_SIZE elements. + if offset > len_minus_stride { + break; + } + } + } + } else { + if dst_masked == 0 { + loop { ++ // Safety: src was aligned, dst was not + $stride_dst_aligned(src.add(offset), dst.add(offset)); + offset += SIMD_STRIDE_SIZE; ++ // Safety: This is `offset > len - SIMD_STRIDE_SIZE`, which means in the next iteration we're valid for ++ // reading/writing at least SIMD_STRIDE_SIZE elements. + if offset > len_minus_stride { + break; + } + } + } else { + loop { ++ // Safety: Neither were aligned + $stride_neither_aligned(src.add(offset), dst.add(offset)); + offset += SIMD_STRIDE_SIZE; ++ // Safety: This is `offset > len - SIMD_STRIDE_SIZE`, which means in the next iteration we're valid for ++ // reading/writing at least SIMD_STRIDE_SIZE elements. + if offset > len_minus_stride { + break; + } + } + } + } + } + while offset < len { ++ // Safety: relies straightforwardly on the `len` invariant + let code_unit = *(src.add(offset)); + *(dst.add(offset)) = code_unit as $dst_unit; + offset += 1; + } + } + }; + } + + #[allow(unused_macros)] + macro_rules! latin1_simd_check_align_unrolled { + ( + $name:ident, + $src_unit:ty, + $dst_unit:ty, ++ // Safety: This function must require aligned src/dest that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit + $stride_both_aligned:ident, ++ // Safety: This function must require aligned/unaligned src/dest that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit + $stride_src_aligned:ident, ++ // Safety: This function must require unaligned/aligned src/dest that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit + $stride_dst_aligned:ident, ++ // Safety: This function must require unaligned src/dest that are valid for reading/writing SIMD_STRIDE_SIZE src_unit/dst_unit + $stride_neither_aligned:ident + ) => { ++ /// Safety: src/dst must be valid for reads/writes of `len` elements of their units. + #[inline(always)] + pub unsafe fn $name(src: *const $src_unit, dst: *mut $dst_unit, len: usize) { + let unit_size = ::core::mem::size_of::<$src_unit>(); + let mut offset = 0usize; ++ // Safety: if this check succeeds we're valid for reading/writing at least `SIMD_STRIDE_SIZE` elements. + if SIMD_STRIDE_SIZE <= len { ++ // Safety: this correctly calculates the number of src_units that need to be read before the remaining list is aligned. ++ // This is by definition less than SIMD_STRIDE_SIZE. + let mut until_alignment = ((SIMD_STRIDE_SIZE + - ((src as usize) & SIMD_ALIGNMENT_MASK)) + & SIMD_ALIGNMENT_MASK) + / unit_size; + while until_alignment != 0 { ++ // Safety: This is a straightforward copy, since until_alignment is < SIMD_STRIDE_SIZE < len, this is in-bounds + *(dst.add(offset)) = *(src.add(offset)) as $dst_unit; + offset += 1; + until_alignment -= 1; + } ++ // Safety: here offset will be `until_alignment`, i.e. enough to align `src`. + let len_minus_stride = len - SIMD_STRIDE_SIZE; ++ // Safety: if this check succeeds we're valid for reading/writing at least `2 * SIMD_STRIDE_SIZE` elements. + if offset + SIMD_STRIDE_SIZE * 2 <= len { + let len_minus_stride_times_two = len_minus_stride - SIMD_STRIDE_SIZE; ++ // Safety: at this point src is known to be aligned at offset, dst is not. + if (dst.add(offset) as usize) & SIMD_ALIGNMENT_MASK == 0 { + loop { ++ // Safety: We checked alignment of dst above, we can use the alignment functions. We're allowed to read/write 2*SIMD_STRIDE_SIZE elements, which we do. + $stride_both_aligned(src.add(offset), dst.add(offset)); + offset += SIMD_STRIDE_SIZE; + $stride_both_aligned(src.add(offset), dst.add(offset)); + offset += SIMD_STRIDE_SIZE; ++ // Safety: This is `offset > len - 2 * SIMD_STRIDE_SIZE` which means we always have at least `2 * SIMD_STRIDE_SIZE` elements to munch next time. + if offset > len_minus_stride_times_two { + break; + } + } + } else { + loop { ++ // Safety: we ensured alignment of src already. + $stride_src_aligned(src.add(offset), dst.add(offset)); + offset += SIMD_STRIDE_SIZE; + $stride_src_aligned(src.add(offset), dst.add(offset)); + offset += SIMD_STRIDE_SIZE; ++ // Safety: This is `offset > len - 2 * SIMD_STRIDE_SIZE` which means we always have at least `2 * SIMD_STRIDE_SIZE` elements to munch next time. + if offset > len_minus_stride_times_two { + break; + } + } + } + } ++ // Safety: This is `offset > len - SIMD_STRIDE_SIZE` which means we are valid to munch SIMD_STRIDE_SIZE more elements, which we do + if offset < len_minus_stride { + $stride_src_aligned(src.add(offset), dst.add(offset)); + offset += SIMD_STRIDE_SIZE; + } + } + while offset < len { ++ // Safety: uses len invariant here and below + let code_unit = *(src.add(offset)); + // On x86_64, this loop autovectorizes but in the pack + // case there are instructions whose purpose is to make sure + // each u16 in the vector is truncated before packing. However, + // since we don't care about saturating behavior of SSE2 packing + // when the input isn't Latin1, those instructions are useless. + // Unfortunately, using the `assume` intrinsic to lie to the + // optimizer doesn't make LLVM omit the trunctation that we +@@ -688,138 +869,180 @@ macro_rules! latin1_simd_check_align_unr + offset += 1; + } + } + }; + } + + #[allow(unused_macros)] + macro_rules! ascii_simd_unalign { ++ // Safety: stride_neither_aligned must be a function that requires src/dest be valid for unaligned reads/writes for SIMD_STRIDE_SIZE elements of type src_unit/dest_unit + ($name:ident, $src_unit:ty, $dst_unit:ty, $stride_neither_aligned:ident) => { ++ /// Safety: src and dst must be valid for reads/writes of len elements of type src_unit/dst_unit ++ /// ++ /// Safety-usable invariant: will return Some() when it encounters non-ASCII, with the first element in the Some being ++ /// guaranteed to be non-ASCII (> 127), and the second being the offset where it is found + #[inline(always)] + pub unsafe fn $name( + src: *const $src_unit, + dst: *mut $dst_unit, + len: usize, + ) -> Option<($src_unit, usize)> { + let mut offset = 0usize; ++ // Safety: if this check succeeds we're valid for reading/writing at least `stride` elements. + if SIMD_STRIDE_SIZE <= len { + let len_minus_stride = len - SIMD_STRIDE_SIZE; + loop { ++ // Safety: We know we're valid for `stride` reads/writes, so we can call this function. We don't need alignment. + if !$stride_neither_aligned(src.add(offset), dst.add(offset)) { + break; + } + offset += SIMD_STRIDE_SIZE; ++ // This is `offset > len - stride` which means we always have at least `stride` elements to munch next time. + if offset > len_minus_stride { + break; + } + } + } + while offset < len { ++ // Safety: Uses len invariant here and below + let code_unit = *(src.add(offset)); + if code_unit > 127 { ++ // Safety-usable invariant upheld here + return Some((code_unit, offset)); + } + *(dst.add(offset)) = code_unit as $dst_unit; + offset += 1; + } + None + } + }; + } + + #[allow(unused_macros)] + macro_rules! latin1_simd_unalign { ++ // Safety: stride_neither_aligned must be a function that requires src/dest be valid for unaligned reads/writes for SIMD_STRIDE_SIZE elements of type src_unit/dest_unit + ($name:ident, $src_unit:ty, $dst_unit:ty, $stride_neither_aligned:ident) => { ++ /// Safety: src and dst must be valid for unaligned reads/writes of len elements of type src_unit/dst_unit + #[inline(always)] + pub unsafe fn $name(src: *const $src_unit, dst: *mut $dst_unit, len: usize) { + let mut offset = 0usize; ++ // Safety: if this check succeeds we're valid for reading/writing at least `stride` elements. + if SIMD_STRIDE_SIZE <= len { + let len_minus_stride = len - SIMD_STRIDE_SIZE; + loop { ++ // Safety: We know we're valid for `stride` reads/writes, so we can call this function. We don't need alignment. + $stride_neither_aligned(src.add(offset), dst.add(offset)); + offset += SIMD_STRIDE_SIZE; ++ // This is `offset > len - stride` which means we always have at least `stride` elements to munch next time. + if offset > len_minus_stride { + break; + } + } + } + while offset < len { ++ // Safety: Uses len invariant here + let code_unit = *(src.add(offset)); + *(dst.add(offset)) = code_unit as $dst_unit; + offset += 1; + } + } + }; + } + + #[allow(unused_macros)] + macro_rules! ascii_to_ascii_simd_stride { ++ // Safety: load/store must be valid for 16 bytes of read/write, which may be unaligned. (candidates: `(load|store)(16|8)_(unaligned|aligned)` functions) + ($name:ident, $load:ident, $store:ident) => { ++ /// Safety: src and dst must be valid for 16 bytes of read/write according to ++ /// the $load/$store fn, which may allow for unaligned reads/writes or require ++ /// alignment to either 16x8 or u8x16. + #[inline(always)] + pub unsafe fn $name(src: *const u8, dst: *mut u8) -> bool { + let simd = $load(src); + if !simd_is_ascii(simd) { + return false; + } + $store(dst, simd); + true + } + }; + } + + #[allow(unused_macros)] + macro_rules! ascii_to_ascii_simd_double_stride { ++ // Safety: store must be valid for 32 bytes of write, which may be unaligned (candidates: `store(8|16)_(aligned|unaligned)`) + ($name:ident, $store:ident) => { ++ /// Safety: src must be valid for 32 bytes of aligned u8x16 read ++ /// dst must be valid for 32 bytes of unaligned write according to ++ /// the $store fn, which may allow for unaligned writes or require ++ /// alignment to either 16x8 or u8x16. ++ /// ++ /// Safety-usable invariant: Returns Some(index) if the element at `index` is invalid ASCII + #[inline(always)] + pub unsafe fn $name(src: *const u8, dst: *mut u8) -> Option { + let first = load16_aligned(src); + let second = load16_aligned(src.add(SIMD_STRIDE_SIZE)); + $store(dst, first); + if unlikely(!simd_is_ascii(first | second)) { ++ // Safety: mask_ascii produces a mask of all the high bits. + let mask_first = mask_ascii(first); + if mask_first != 0 { ++ // Safety: on little endian systems this will be the number of ascii bytes ++ // before the first non-ascii, i.e. valid for indexing src ++ // TODO SAFETY: What about big-endian systems? + return Some(mask_first.trailing_zeros() as usize); + } + $store(dst.add(SIMD_STRIDE_SIZE), second); + let mask_second = mask_ascii(second); ++ // Safety: on little endian systems this will be the number of ascii bytes ++ // before the first non-ascii, i.e. valid for indexing src + return Some(SIMD_STRIDE_SIZE + mask_second.trailing_zeros() as usize); + } + $store(dst.add(SIMD_STRIDE_SIZE), second); + None + } + }; + } + + #[allow(unused_macros)] + macro_rules! ascii_to_basic_latin_simd_stride { ++ // Safety: load/store must be valid for 16 bytes of read/write, which may be unaligned. (candidates: `(load|store)(16|8)_(unaligned|aligned)` functions) + ($name:ident, $load:ident, $store:ident) => { ++ /// Safety: src and dst must be valid for 16/32 bytes of read/write according to ++ /// the $load/$store fn, which may allow for unaligned reads/writes or require ++ /// alignment to either 16x8 or u8x16. + #[inline(always)] + pub unsafe fn $name(src: *const u8, dst: *mut u16) -> bool { + let simd = $load(src); + if !simd_is_ascii(simd) { + return false; + } + let (first, second) = simd_unpack(simd); + $store(dst, first); + $store(dst.add(8), second); + true + } + }; + } + + #[allow(unused_macros)] + macro_rules! ascii_to_basic_latin_simd_double_stride { ++ // Safety: store must be valid for 16 bytes of write, which may be unaligned + ($name:ident, $store:ident) => { ++ /// Safety: src must be valid for 2*SIMD_STRIDE_SIZE bytes of aligned reads, ++ /// aligned to either 16x8 or u8x16. ++ /// dst must be valid for 2*SIMD_STRIDE_SIZE bytes of aligned or unaligned reads + #[inline(always)] + pub unsafe fn $name(src: *const u8, dst: *mut u16) -> Option { + let first = load16_aligned(src); + let second = load16_aligned(src.add(SIMD_STRIDE_SIZE)); + let (a, b) = simd_unpack(first); + $store(dst, a); ++ // Safety: divide by 2 since it's a u16 pointer + $store(dst.add(SIMD_STRIDE_SIZE / 2), b); + if unlikely(!simd_is_ascii(first | second)) { + let mask_first = mask_ascii(first); + if mask_first != 0 { + return Some(mask_first.trailing_zeros() as usize); + } + let (c, d) = simd_unpack(second); + $store(dst.add(SIMD_STRIDE_SIZE), c); +@@ -832,47 +1055,59 @@ macro_rules! ascii_to_basic_latin_simd_d + $store(dst.add(SIMD_STRIDE_SIZE + (SIMD_STRIDE_SIZE / 2)), d); + None + } + }; + } + + #[allow(unused_macros)] + macro_rules! unpack_simd_stride { ++ // Safety: load/store must be valid for 16 bytes of read/write, which may be unaligned. (candidates: `(load|store)(16|8)_(unaligned|aligned)` functions) + ($name:ident, $load:ident, $store:ident) => { ++ /// Safety: src and dst must be valid for 16 bytes of read/write according to ++ /// the $load/$store fn, which may allow for unaligned reads/writes or require ++ /// alignment to either 16x8 or u8x16. + #[inline(always)] + pub unsafe fn $name(src: *const u8, dst: *mut u16) { + let simd = $load(src); + let (first, second) = simd_unpack(simd); + $store(dst, first); + $store(dst.add(8), second); + } + }; + } + + #[allow(unused_macros)] + macro_rules! basic_latin_to_ascii_simd_stride { ++ // Safety: load/store must be valid for 16 bytes of read/write, which may be unaligned. (candidates: `(load|store)(16|8)_(unaligned|aligned)` functions) + ($name:ident, $load:ident, $store:ident) => { ++ /// Safety: src and dst must be valid for 32/16 bytes of read/write according to ++ /// the $load/$store fn, which may allow for unaligned reads/writes or require ++ /// alignment to either 16x8 or u8x16. + #[inline(always)] + pub unsafe fn $name(src: *const u16, dst: *mut u8) -> bool { + let first = $load(src); + let second = $load(src.add(8)); + if simd_is_basic_latin(first | second) { + $store(dst, simd_pack(first, second)); + true + } else { + false + } + } + }; + } + + #[allow(unused_macros)] + macro_rules! pack_simd_stride { ++ // Safety: load/store must be valid for 16 bytes of read/write, which may be unaligned. (candidates: `(load|store)(16|8)_(unaligned|aligned)` functions) + ($name:ident, $load:ident, $store:ident) => { ++ /// Safety: src and dst must be valid for 32/16 bytes of read/write according to ++ /// the $load/$store fn, which may allow for unaligned reads/writes or require ++ /// alignment to either 16x8 or u8x16. + #[inline(always)] + pub unsafe fn $name(src: *const u16, dst: *mut u8) { + let first = $load(src); + let second = $load(src.add(8)); + $store(dst, simd_pack(first, second)); + } + }; + } +@@ -888,24 +1123,28 @@ cfg_if! { + // pub const ALIGNMENT: usize = 8; + + pub const ALU_STRIDE_SIZE: usize = 16; + + pub const ALU_ALIGNMENT: usize = 8; + + pub const ALU_ALIGNMENT_MASK: usize = 7; + ++ // Safety for stride macros: We stick to the load8_aligned/etc family of functions. We consistently produce ++ // neither_unaligned variants using only unaligned inputs. + ascii_to_ascii_simd_stride!(ascii_to_ascii_stride_neither_aligned, load16_unaligned, store16_unaligned); + + ascii_to_basic_latin_simd_stride!(ascii_to_basic_latin_stride_neither_aligned, load16_unaligned, store8_unaligned); + unpack_simd_stride!(unpack_stride_neither_aligned, load16_unaligned, store8_unaligned); + + basic_latin_to_ascii_simd_stride!(basic_latin_to_ascii_stride_neither_aligned, load8_unaligned, store16_unaligned); + pack_simd_stride!(pack_stride_neither_aligned, load8_unaligned, store16_unaligned); + ++ // Safety for conversion macros: We use the unalign macro with unalign functions above. All stride functions were produced ++ // by stride macros that universally munch a single SIMD_STRIDE_SIZE worth of elements. + ascii_simd_unalign!(ascii_to_ascii, u8, u8, ascii_to_ascii_stride_neither_aligned); + ascii_simd_unalign!(ascii_to_basic_latin, u8, u16, ascii_to_basic_latin_stride_neither_aligned); + ascii_simd_unalign!(basic_latin_to_ascii, u16, u8, basic_latin_to_ascii_stride_neither_aligned); + latin1_simd_unalign!(unpack_latin1, u8, u16, unpack_stride_neither_aligned); + latin1_simd_unalign!(pack_latin1, u16, u8, pack_stride_neither_aligned); + } else if #[cfg(all(feature = "simd-accel", target_endian = "little", target_feature = "neon"))] { + // SIMD with different instructions for aligned and unaligned loads and stores. + // +@@ -914,16 +1153,19 @@ cfg_if! { + // but the benchmark results I see don't agree. + + pub const SIMD_STRIDE_SIZE: usize = 16; + + pub const MAX_STRIDE_SIZE: usize = 16; + + pub const SIMD_ALIGNMENT_MASK: usize = 15; + ++ // Safety for stride macros: We stick to the load8_aligned/etc family of functions. We consistently name ++ // aligned/unaligned functions according to src/dst being aligned/unaligned ++ + ascii_to_ascii_simd_stride!(ascii_to_ascii_stride_both_aligned, load16_aligned, store16_aligned); + ascii_to_ascii_simd_stride!(ascii_to_ascii_stride_src_aligned, load16_aligned, store16_unaligned); + ascii_to_ascii_simd_stride!(ascii_to_ascii_stride_dst_aligned, load16_unaligned, store16_aligned); + ascii_to_ascii_simd_stride!(ascii_to_ascii_stride_neither_aligned, load16_unaligned, store16_unaligned); + + ascii_to_basic_latin_simd_stride!(ascii_to_basic_latin_stride_both_aligned, load16_aligned, store8_aligned); + ascii_to_basic_latin_simd_stride!(ascii_to_basic_latin_stride_src_aligned, load16_aligned, store8_unaligned); + ascii_to_basic_latin_simd_stride!(ascii_to_basic_latin_stride_dst_aligned, load16_unaligned, store8_aligned); +@@ -939,36 +1181,43 @@ cfg_if! { + basic_latin_to_ascii_simd_stride!(basic_latin_to_ascii_stride_dst_aligned, load8_unaligned, store16_aligned); + basic_latin_to_ascii_simd_stride!(basic_latin_to_ascii_stride_neither_aligned, load8_unaligned, store16_unaligned); + + pack_simd_stride!(pack_stride_both_aligned, load8_aligned, store16_aligned); + pack_simd_stride!(pack_stride_src_aligned, load8_aligned, store16_unaligned); + pack_simd_stride!(pack_stride_dst_aligned, load8_unaligned, store16_aligned); + pack_simd_stride!(pack_stride_neither_aligned, load8_unaligned, store16_unaligned); + ++ // Safety for conversion macros: We use the correct pattern of both/src/dst/neither here. All stride functions were produced ++ // by stride macros that universally munch a single SIMD_STRIDE_SIZE worth of elements. ++ + ascii_simd_check_align!(ascii_to_ascii, u8, u8, ascii_to_ascii_stride_both_aligned, ascii_to_ascii_stride_src_aligned, ascii_to_ascii_stride_dst_aligned, ascii_to_ascii_stride_neither_aligned); + ascii_simd_check_align!(ascii_to_basic_latin, u8, u16, ascii_to_basic_latin_stride_both_aligned, ascii_to_basic_latin_stride_src_aligned, ascii_to_basic_latin_stride_dst_aligned, ascii_to_basic_latin_stride_neither_aligned); + ascii_simd_check_align!(basic_latin_to_ascii, u16, u8, basic_latin_to_ascii_stride_both_aligned, basic_latin_to_ascii_stride_src_aligned, basic_latin_to_ascii_stride_dst_aligned, basic_latin_to_ascii_stride_neither_aligned); + latin1_simd_check_align!(unpack_latin1, u8, u16, unpack_stride_both_aligned, unpack_stride_src_aligned, unpack_stride_dst_aligned, unpack_stride_neither_aligned); + latin1_simd_check_align!(pack_latin1, u16, u8, pack_stride_both_aligned, pack_stride_src_aligned, pack_stride_dst_aligned, pack_stride_neither_aligned); + } else if #[cfg(all(feature = "simd-accel", target_feature = "sse2"))] { + // SIMD with different instructions for aligned and unaligned loads and stores. + // + // Newer microarchitectures are not supposed to have a performance difference between + // aligned and unaligned SSE2 loads and stores when the address is actually aligned, + // but the benchmark results I see don't agree. + + pub const SIMD_STRIDE_SIZE: usize = 16; + ++ /// Safety-usable invariant: This should be identical to SIMD_STRIDE_SIZE (used by ascii_simd_check_align_unrolled) + pub const SIMD_ALIGNMENT: usize = 16; + + pub const MAX_STRIDE_SIZE: usize = 16; + + pub const SIMD_ALIGNMENT_MASK: usize = 15; + ++ // Safety for stride macros: We stick to the load8_aligned/etc family of functions. We consistently name ++ // aligned/unaligned functions according to src/dst being aligned/unaligned ++ + ascii_to_ascii_simd_double_stride!(ascii_to_ascii_simd_double_stride_both_aligned, store16_aligned); + ascii_to_ascii_simd_double_stride!(ascii_to_ascii_simd_double_stride_src_aligned, store16_unaligned); + + ascii_to_basic_latin_simd_double_stride!(ascii_to_basic_latin_simd_double_stride_both_aligned, store8_aligned); + ascii_to_basic_latin_simd_double_stride!(ascii_to_basic_latin_simd_double_stride_src_aligned, store8_unaligned); + + ascii_to_ascii_simd_stride!(ascii_to_ascii_stride_both_aligned, load16_aligned, store16_aligned); + ascii_to_ascii_simd_stride!(ascii_to_ascii_stride_src_aligned, load16_aligned, store16_unaligned); +@@ -984,33 +1233,43 @@ cfg_if! { + basic_latin_to_ascii_simd_stride!(basic_latin_to_ascii_stride_both_aligned, load8_aligned, store16_aligned); + basic_latin_to_ascii_simd_stride!(basic_latin_to_ascii_stride_src_aligned, load8_aligned, store16_unaligned); + basic_latin_to_ascii_simd_stride!(basic_latin_to_ascii_stride_dst_aligned, load8_unaligned, store16_aligned); + basic_latin_to_ascii_simd_stride!(basic_latin_to_ascii_stride_neither_aligned, load8_unaligned, store16_unaligned); + + pack_simd_stride!(pack_stride_both_aligned, load8_aligned, store16_aligned); + pack_simd_stride!(pack_stride_src_aligned, load8_aligned, store16_unaligned); + ++ // Safety for conversion macros: We use the correct pattern of both/src/dst/neither/double_both/double_src here. All stride functions were produced ++ // by stride macros that universally munch a single SIMD_STRIDE_SIZE worth of elements. ++ + ascii_simd_check_align_unrolled!(ascii_to_ascii, u8, u8, ascii_to_ascii_stride_both_aligned, ascii_to_ascii_stride_src_aligned, ascii_to_ascii_stride_neither_aligned, ascii_to_ascii_simd_double_stride_both_aligned, ascii_to_ascii_simd_double_stride_src_aligned); + ascii_simd_check_align_unrolled!(ascii_to_basic_latin, u8, u16, ascii_to_basic_latin_stride_both_aligned, ascii_to_basic_latin_stride_src_aligned, ascii_to_basic_latin_stride_neither_aligned, ascii_to_basic_latin_simd_double_stride_both_aligned, ascii_to_basic_latin_simd_double_stride_src_aligned); + + ascii_simd_check_align!(basic_latin_to_ascii, u16, u8, basic_latin_to_ascii_stride_both_aligned, basic_latin_to_ascii_stride_src_aligned, basic_latin_to_ascii_stride_dst_aligned, basic_latin_to_ascii_stride_neither_aligned); + latin1_simd_check_align_unrolled!(unpack_latin1, u8, u16, unpack_stride_both_aligned, unpack_stride_src_aligned, unpack_stride_dst_aligned, unpack_stride_neither_aligned); + latin1_simd_check_align_unrolled!(pack_latin1, u16, u8, pack_stride_both_aligned, pack_stride_src_aligned, pack_stride_dst_aligned, pack_stride_neither_aligned); + } else if #[cfg(all(target_endian = "little", target_pointer_width = "64"))] { + // Aligned ALU word, little-endian, 64-bit + ++ /// Safety invariant: this is the amount of bytes consumed by ++ /// unpack_alu. This will be twice the pointer width, as it consumes two usizes. ++ /// This is also the number of bytes produced by pack_alu. ++ /// This is also the number of u16 code units produced/consumed by unpack_alu/pack_alu respectively. + pub const ALU_STRIDE_SIZE: usize = 16; + + pub const MAX_STRIDE_SIZE: usize = 16; + ++ // Safety invariant: this is the pointer width in bytes + pub const ALU_ALIGNMENT: usize = 8; + ++ // Safety invariant: this is a mask for getting the bits of a pointer not aligned to ALU_ALIGNMENT + pub const ALU_ALIGNMENT_MASK: usize = 7; + ++ /// Safety: dst must point to valid space for writing four `usize`s + #[inline(always)] + unsafe fn unpack_alu(word: usize, second_word: usize, dst: *mut usize) { + let first = ((0x0000_0000_FF00_0000usize & word) << 24) | + ((0x0000_0000_00FF_0000usize & word) << 16) | + ((0x0000_0000_0000_FF00usize & word) << 8) | + (0x0000_0000_0000_00FFusize & word); + let second = ((0xFF00_0000_0000_0000usize & word) >> 8) | + ((0x00FF_0000_0000_0000usize & word) >> 16) | +@@ -1019,22 +1278,24 @@ cfg_if! { + let third = ((0x0000_0000_FF00_0000usize & second_word) << 24) | + ((0x0000_0000_00FF_0000usize & second_word) << 16) | + ((0x0000_0000_0000_FF00usize & second_word) << 8) | + (0x0000_0000_0000_00FFusize & second_word); + let fourth = ((0xFF00_0000_0000_0000usize & second_word) >> 8) | + ((0x00FF_0000_0000_0000usize & second_word) >> 16) | + ((0x0000_FF00_0000_0000usize & second_word) >> 24) | + ((0x0000_00FF_0000_0000usize & second_word) >> 32); ++ // Safety: fn invariant used here + *dst = first; + *(dst.add(1)) = second; + *(dst.add(2)) = third; + *(dst.add(3)) = fourth; + } + ++ /// Safety: dst must point to valid space for writing two `usize`s + #[inline(always)] + unsafe fn pack_alu(first: usize, second: usize, third: usize, fourth: usize, dst: *mut usize) { + let word = ((0x00FF_0000_0000_0000usize & second) << 8) | + ((0x0000_00FF_0000_0000usize & second) << 16) | + ((0x0000_0000_00FF_0000usize & second) << 24) | + ((0x0000_0000_0000_00FFusize & second) << 32) | + ((0x00FF_0000_0000_0000usize & first) >> 24) | + ((0x0000_00FF_0000_0000usize & first) >> 16) | +@@ -1043,70 +1304,88 @@ cfg_if! { + let second_word = ((0x00FF_0000_0000_0000usize & fourth) << 8) | + ((0x0000_00FF_0000_0000usize & fourth) << 16) | + ((0x0000_0000_00FF_0000usize & fourth) << 24) | + ((0x0000_0000_0000_00FFusize & fourth) << 32) | + ((0x00FF_0000_0000_0000usize & third) >> 24) | + ((0x0000_00FF_0000_0000usize & third) >> 16) | + ((0x0000_0000_00FF_0000usize & third) >> 8) | + (0x0000_0000_0000_00FFusize & third); ++ // Safety: fn invariant used here + *dst = word; + *(dst.add(1)) = second_word; + } + } else if #[cfg(all(target_endian = "little", target_pointer_width = "32"))] { + // Aligned ALU word, little-endian, 32-bit + ++ /// Safety invariant: this is the amount of bytes consumed by ++ /// unpack_alu. This will be twice the pointer width, as it consumes two usizes. ++ /// This is also the number of bytes produced by pack_alu. ++ /// This is also the number of u16 code units produced/consumed by unpack_alu/pack_alu respectively. + pub const ALU_STRIDE_SIZE: usize = 8; + + pub const MAX_STRIDE_SIZE: usize = 8; + ++ // Safety invariant: this is the pointer width in bytes + pub const ALU_ALIGNMENT: usize = 4; + ++ // Safety invariant: this is a mask for getting the bits of a pointer not aligned to ALU_ALIGNMENT + pub const ALU_ALIGNMENT_MASK: usize = 3; + ++ /// Safety: dst must point to valid space for writing four `usize`s + #[inline(always)] + unsafe fn unpack_alu(word: usize, second_word: usize, dst: *mut usize) { + let first = ((0x0000_FF00usize & word) << 8) | + (0x0000_00FFusize & word); + let second = ((0xFF00_0000usize & word) >> 8) | + ((0x00FF_0000usize & word) >> 16); + let third = ((0x0000_FF00usize & second_word) << 8) | + (0x0000_00FFusize & second_word); + let fourth = ((0xFF00_0000usize & second_word) >> 8) | + ((0x00FF_0000usize & second_word) >> 16); ++ // Safety: fn invariant used here + *dst = first; + *(dst.add(1)) = second; + *(dst.add(2)) = third; + *(dst.add(3)) = fourth; + } + ++ /// Safety: dst must point to valid space for writing two `usize`s + #[inline(always)] + unsafe fn pack_alu(first: usize, second: usize, third: usize, fourth: usize, dst: *mut usize) { + let word = ((0x00FF_0000usize & second) << 8) | + ((0x0000_00FFusize & second) << 16) | + ((0x00FF_0000usize & first) >> 8) | + (0x0000_00FFusize & first); + let second_word = ((0x00FF_0000usize & fourth) << 8) | + ((0x0000_00FFusize & fourth) << 16) | + ((0x00FF_0000usize & third) >> 8) | + (0x0000_00FFusize & third); ++ // Safety: fn invariant used here + *dst = word; + *(dst.add(1)) = second_word; + } + } else if #[cfg(all(target_endian = "big", target_pointer_width = "64"))] { + // Aligned ALU word, big-endian, 64-bit + ++ /// Safety invariant: this is the amount of bytes consumed by ++ /// unpack_alu. This will be twice the pointer width, as it consumes two usizes. ++ /// This is also the number of bytes produced by pack_alu. ++ /// This is also the number of u16 code units produced/consumed by unpack_alu/pack_alu respectively. + pub const ALU_STRIDE_SIZE: usize = 16; + + pub const MAX_STRIDE_SIZE: usize = 16; + ++ // Safety invariant: this is the pointer width in bytes + pub const ALU_ALIGNMENT: usize = 8; + ++ // Safety invariant: this is a mask for getting the bits of a pointer not aligned to ALU_ALIGNMENT + pub const ALU_ALIGNMENT_MASK: usize = 7; + ++ /// Safety: dst must point to valid space for writing four `usize`s + #[inline(always)] + unsafe fn unpack_alu(word: usize, second_word: usize, dst: *mut usize) { + let first = ((0xFF00_0000_0000_0000usize & word) >> 8) | + ((0x00FF_0000_0000_0000usize & word) >> 16) | + ((0x0000_FF00_0000_0000usize & word) >> 24) | + ((0x0000_00FF_0000_0000usize & word) >> 32); + let second = ((0x0000_0000_FF00_0000usize & word) << 24) | + ((0x0000_0000_00FF_0000usize & word) << 16) | +@@ -1115,22 +1394,24 @@ cfg_if! { + let third = ((0xFF00_0000_0000_0000usize & second_word) >> 8) | + ((0x00FF_0000_0000_0000usize & second_word) >> 16) | + ((0x0000_FF00_0000_0000usize & second_word) >> 24) | + ((0x0000_00FF_0000_0000usize & second_word) >> 32); + let fourth = ((0x0000_0000_FF00_0000usize & second_word) << 24) | + ((0x0000_0000_00FF_0000usize & second_word) << 16) | + ((0x0000_0000_0000_FF00usize & second_word) << 8) | + (0x0000_0000_0000_00FFusize & second_word); ++ // Safety: fn invariant used here + *dst = first; + *(dst.add(1)) = second; + *(dst.add(2)) = third; + *(dst.add(3)) = fourth; + } + ++ /// Safety: dst must point to valid space for writing two `usize`s + #[inline(always)] + unsafe fn pack_alu(first: usize, second: usize, third: usize, fourth: usize, dst: *mut usize) { + let word = ((0x00FF0000_00000000usize & first) << 8) | + ((0x000000FF_00000000usize & first) << 16) | + ((0x00000000_00FF0000usize & first) << 24) | + ((0x00000000_000000FFusize & first) << 32) | + ((0x00FF0000_00000000usize & second) >> 24) | + ((0x000000FF_00000000usize & second) >> 16) | +@@ -1139,67 +1420,80 @@ cfg_if! { + let second_word = ((0x00FF0000_00000000usize & third) << 8) | + ((0x000000FF_00000000usize & third) << 16) | + ((0x00000000_00FF0000usize & third) << 24) | + ((0x00000000_000000FFusize & third) << 32) | + ((0x00FF0000_00000000usize & fourth) >> 24) | + ((0x000000FF_00000000usize & fourth) >> 16) | + ((0x00000000_00FF0000usize & fourth) >> 8) | + (0x00000000_000000FFusize & fourth); ++ // Safety: fn invariant used here + *dst = word; + *(dst.add(1)) = second_word; + } + } else if #[cfg(all(target_endian = "big", target_pointer_width = "32"))] { + // Aligned ALU word, big-endian, 32-bit + ++ /// Safety invariant: this is the amount of bytes consumed by ++ /// unpack_alu. This will be twice the pointer width, as it consumes two usizes. ++ /// This is also the number of bytes produced by pack_alu. ++ /// This is also the number of u16 code units produced/consumed by unpack_alu/pack_alu respectively. + pub const ALU_STRIDE_SIZE: usize = 8; + + pub const MAX_STRIDE_SIZE: usize = 8; + ++ // Safety invariant: this is the pointer width in bytes + pub const ALU_ALIGNMENT: usize = 4; + ++ // Safety invariant: this is a mask for getting the bits of a pointer not aligned to ALU_ALIGNMENT + pub const ALU_ALIGNMENT_MASK: usize = 3; + ++ /// Safety: dst must point to valid space for writing four `usize`s + #[inline(always)] + unsafe fn unpack_alu(word: usize, second_word: usize, dst: *mut usize) { + let first = ((0xFF00_0000usize & word) >> 8) | + ((0x00FF_0000usize & word) >> 16); + let second = ((0x0000_FF00usize & word) << 8) | + (0x0000_00FFusize & word); + let third = ((0xFF00_0000usize & second_word) >> 8) | + ((0x00FF_0000usize & second_word) >> 16); + let fourth = ((0x0000_FF00usize & second_word) << 8) | + (0x0000_00FFusize & second_word); ++ // Safety: fn invariant used here + *dst = first; + *(dst.add(1)) = second; + *(dst.add(2)) = third; + *(dst.add(3)) = fourth; + } + ++ /// Safety: dst must point to valid space for writing two `usize`s + #[inline(always)] + unsafe fn pack_alu(first: usize, second: usize, third: usize, fourth: usize, dst: *mut usize) { + let word = ((0x00FF_0000usize & first) << 8) | + ((0x0000_00FFusize & first) << 16) | + ((0x00FF_0000usize & second) >> 8) | + (0x0000_00FFusize & second); + let second_word = ((0x00FF_0000usize & third) << 8) | + ((0x0000_00FFusize & third) << 16) | + ((0x00FF_0000usize & fourth) >> 8) | + (0x0000_00FFusize & fourth); ++ // Safety: fn invariant used here + *dst = word; + *(dst.add(1)) = second_word; + } + } else { + ascii_naive!(ascii_to_ascii, u8, u8); + ascii_naive!(ascii_to_basic_latin, u8, u16); + ascii_naive!(basic_latin_to_ascii, u16, u8); + } + } + + cfg_if! { ++ // Safety-usable invariant: this counts the zeroes from the "first byte" of utf-8 data packed into a usize ++ // with the target endianness + if #[cfg(target_endian = "little")] { + #[allow(dead_code)] + #[inline(always)] + fn count_zeros(word: usize) -> u32 { + word.trailing_zeros() + } + } else { + #[allow(dead_code)] +@@ -1207,208 +1501,272 @@ cfg_if! { + fn count_zeros(word: usize) -> u32 { + word.leading_zeros() + } + } + } + + cfg_if! { + if #[cfg(all(feature = "simd-accel", target_endian = "little", target_arch = "disabled"))] { ++ /// Safety-usable invariant: Will return the value and position of the first non-ASCII byte in the slice in a Some if found. ++ /// In other words, the first element of the Some is always `> 127` + #[inline(always)] + pub fn validate_ascii(slice: &[u8]) -> Option<(u8, usize)> { + let src = slice.as_ptr(); + let len = slice.len(); + let mut offset = 0usize; ++ // Safety: if this check succeeds we're valid for reading/writing at least `stride` elements. + if SIMD_STRIDE_SIZE <= len { + let len_minus_stride = len - SIMD_STRIDE_SIZE; + loop { ++ // Safety: src at offset is valid for a `SIMD_STRIDE_SIZE` read + let simd = unsafe { load16_unaligned(src.add(offset)) }; + if !simd_is_ascii(simd) { + break; + } + offset += SIMD_STRIDE_SIZE; ++ // This is `offset > len - SIMD_STRIDE_SIZE` which means we always have at least `SIMD_STRIDE_SIZE` elements to munch next time. + if offset > len_minus_stride { + break; + } + } + } + while offset < len { + let code_unit = slice[offset]; + if code_unit > 127 { ++ // Safety: Safety-usable invariant upheld here + return Some((code_unit, offset)); + } + offset += 1; + } + None + } + } else if #[cfg(all(feature = "simd-accel", target_feature = "sse2"))] { ++ /// Safety-usable invariant: will return Some() when it encounters non-ASCII, with the first element in the Some being ++ /// guaranteed to be non-ASCII (> 127), and the second being the offset where it is found + #[inline(always)] + pub fn validate_ascii(slice: &[u8]) -> Option<(u8, usize)> { + let src = slice.as_ptr(); + let len = slice.len(); + let mut offset = 0usize; ++ // Safety: if this check succeeds we're valid for reading at least `stride` elements. + if SIMD_STRIDE_SIZE <= len { + // First, process one unaligned vector ++ // Safety: src is valid for a `SIMD_STRIDE_SIZE` read + let simd = unsafe { load16_unaligned(src) }; + let mask = mask_ascii(simd); + if mask != 0 { + offset = mask.trailing_zeros() as usize; + let non_ascii = unsafe { *src.add(offset) }; + return Some((non_ascii, offset)); + } + offset = SIMD_STRIDE_SIZE; ++ // Safety: Now that offset has changed we don't yet know how much it is valid for + + // We have now seen 16 ASCII bytes. Let's guess that + // there will be enough more to justify more expense + // in the case of non-ASCII. + // Use aligned reads for the sake of old microachitectures. ++ // Safety: this correctly calculates the number of src_units that need to be read before the remaining list is aligned. ++ // This is by definition less than SIMD_ALIGNMENT, which is defined to be equal to SIMD_STRIDE_SIZE. + let until_alignment = unsafe { (SIMD_ALIGNMENT - ((src.add(offset) as usize) & SIMD_ALIGNMENT_MASK)) & SIMD_ALIGNMENT_MASK }; + // This addition won't overflow, because even in the 32-bit PAE case the + // address space holds enough code that the slice length can't be that + // close to address space size. + // offset now equals SIMD_STRIDE_SIZE, hence times 3 below. ++ // ++ // Safety: if this check succeeds we're valid for reading at least `2 * SIMD_STRIDE_SIZE` elements plus `until_alignment`. ++ // The extra SIMD_STRIDE_SIZE in the condition is because `offset` is already `SIMD_STRIDE_SIZE`. + if until_alignment + (SIMD_STRIDE_SIZE * 3) <= len { + if until_alignment != 0 { ++ // Safety: this is safe to call since we're valid for this read (and more), and don't care about alignment ++ // This will copy over bytes that get decoded twice since it's not incrementing `offset` by SIMD_STRIDE_SIZE. This is fine. + let simd = unsafe { load16_unaligned(src.add(offset)) }; + let mask = mask_ascii(simd); + if mask != 0 { + offset += mask.trailing_zeros() as usize; + let non_ascii = unsafe { *src.add(offset) }; + return Some((non_ascii, offset)); + } + offset += until_alignment; + } ++ // Safety: At this point we're valid for reading 2*SIMD_STRIDE_SIZE elements ++ // Safety: Now `offset` is aligned for `src` + let len_minus_stride_times_two = len - (SIMD_STRIDE_SIZE * 2); + loop { ++ // Safety: We were valid for this read, and were aligned. + let first = unsafe { load16_aligned(src.add(offset)) }; + let second = unsafe { load16_aligned(src.add(offset + SIMD_STRIDE_SIZE)) }; + if !simd_is_ascii(first | second) { ++ // Safety: mask_ascii produces a mask of all the high bits. + let mask_first = mask_ascii(first); + if mask_first != 0 { ++ // Safety: on little endian systems this will be the number of ascii bytes ++ // before the first non-ascii, i.e. valid for indexing src ++ // TODO SAFETY: What about big-endian systems? + offset += mask_first.trailing_zeros() as usize; + } else { + let mask_second = mask_ascii(second); ++ // Safety: on little endian systems this will be the number of ascii bytes ++ // before the first non-ascii, i.e. valid for indexing src + offset += SIMD_STRIDE_SIZE + mask_second.trailing_zeros() as usize; + } ++ // Safety: We know this is non-ASCII, and can uphold the safety-usable invariant here + let non_ascii = unsafe { *src.add(offset) }; ++ + return Some((non_ascii, offset)); + } + offset += SIMD_STRIDE_SIZE * 2; ++ // Safety: This is `offset > len - 2 * SIMD_STRIDE_SIZE` which means we always have at least `2 * SIMD_STRIDE_SIZE` elements to munch next time. + if offset > len_minus_stride_times_two { + break; + } + } ++ // Safety: if this check succeeds we're valid for reading at least `SIMD_STRIDE_SIZE` + if offset + SIMD_STRIDE_SIZE <= len { +- let simd = unsafe { load16_aligned(src.add(offset)) }; +- let mask = mask_ascii(simd); ++ // Safety: We were valid for this read, and were aligned. ++ let simd = unsafe { load16_aligned(src.add(offset)) }; ++ // Safety: mask_ascii produces a mask of all the high bits. ++ let mask = mask_ascii(simd); + if mask != 0 { ++ // Safety: on little endian systems this will be the number of ascii bytes ++ // before the first non-ascii, i.e. valid for indexing src + offset += mask.trailing_zeros() as usize; + let non_ascii = unsafe { *src.add(offset) }; ++ // Safety: We know this is non-ASCII, and can uphold the safety-usable invariant here + return Some((non_ascii, offset)); + } + offset += SIMD_STRIDE_SIZE; + } + } else { ++ // Safety: this is the unaligned branch + // At most two iterations, so unroll ++ // Safety: if this check succeeds we're valid for reading at least `SIMD_STRIDE_SIZE` + if offset + SIMD_STRIDE_SIZE <= len { ++ // Safety: We're valid for this read but must use an unaligned read + let simd = unsafe { load16_unaligned(src.add(offset)) }; + let mask = mask_ascii(simd); + if mask != 0 { + offset += mask.trailing_zeros() as usize; + let non_ascii = unsafe { *src.add(offset) }; ++ // Safety-usable invariant upheld here (same as above) + return Some((non_ascii, offset)); + } + offset += SIMD_STRIDE_SIZE; ++ // Safety: if this check succeeds we're valid for reading at least `SIMD_STRIDE_SIZE` + if offset + SIMD_STRIDE_SIZE <= len { ++ // Safety: We're valid for this read but must use an unaligned read + let simd = unsafe { load16_unaligned(src.add(offset)) }; + let mask = mask_ascii(simd); + if mask != 0 { + offset += mask.trailing_zeros() as usize; + let non_ascii = unsafe { *src.add(offset) }; ++ // Safety-usable invariant upheld here (same as above) + return Some((non_ascii, offset)); + } + offset += SIMD_STRIDE_SIZE; + } + } + } + } + while offset < len { ++ // Safety: relies straightforwardly on the `len` invariant + let code_unit = unsafe { *(src.add(offset)) }; + if code_unit > 127 { ++ // Safety-usable invariant upheld here + return Some((code_unit, offset)); + } + offset += 1; + } + None + } + } else { ++ // Safety-usable invariant: returns byte index of first non-ascii byte + #[inline(always)] + fn find_non_ascii(word: usize, second_word: usize) -> Option { + let word_masked = word & ASCII_MASK; + let second_masked = second_word & ASCII_MASK; + if (word_masked | second_masked) == 0 { ++ // Both are ascii, invariant upheld + return None; + } + if word_masked != 0 { + let zeros = count_zeros(word_masked); +- // `zeros` now contains 7 (for the seven bits of non-ASCII) ++ // `zeros` now contains 0 to 7 (for the seven bits of masked ASCII in little endian, ++ // or up to 7 bits of non-ASCII in big endian if the first byte is non-ASCII) + // plus 8 times the number of ASCII in text order before the + // non-ASCII byte in the little-endian case or 8 times the number of ASCII in + // text order before the non-ASCII byte in the big-endian case. + let num_ascii = (zeros >> 3) as usize; ++ // Safety-usable invariant upheld here + return Some(num_ascii); + } + let zeros = count_zeros(second_masked); +- // `zeros` now contains 7 (for the seven bits of non-ASCII) ++ // `zeros` now contains 0 to 7 (for the seven bits of masked ASCII in little endian, ++ // or up to 7 bits of non-ASCII in big endian if the first byte is non-ASCII) + // plus 8 times the number of ASCII in text order before the + // non-ASCII byte in the little-endian case or 8 times the number of ASCII in + // text order before the non-ASCII byte in the big-endian case. + let num_ascii = (zeros >> 3) as usize; ++ // Safety-usable invariant upheld here + Some(ALU_ALIGNMENT + num_ascii) + } + ++ /// Safety: `src` must be valid for the reads of two `usize`s ++ /// ++ /// Safety-usable invariant: will return byte index of first non-ascii byte + #[inline(always)] + unsafe fn validate_ascii_stride(src: *const usize) -> Option { + let word = *src; + let second_word = *(src.add(1)); + find_non_ascii(word, second_word) + } + ++ /// Safety-usable invariant: will return Some() when it encounters non-ASCII, with the first element in the Some being ++ /// guaranteed to be non-ASCII (> 127), and the second being the offset where it is found + #[cfg_attr(feature = "cargo-clippy", allow(cast_ptr_alignment))] + #[inline(always)] + pub fn validate_ascii(slice: &[u8]) -> Option<(u8, usize)> { + let src = slice.as_ptr(); + let len = slice.len(); + let mut offset = 0usize; + let mut until_alignment = (ALU_ALIGNMENT - ((src as usize) & ALU_ALIGNMENT_MASK)) & ALU_ALIGNMENT_MASK; ++ // Safety: If this check fails we're valid to read `until_alignment + ALU_STRIDE_SIZE` elements + if until_alignment + ALU_STRIDE_SIZE <= len { + while until_alignment != 0 { + let code_unit = slice[offset]; + if code_unit > 127 { ++ // Safety-usable invairant upheld here + return Some((code_unit, offset)); + } + offset += 1; + until_alignment -= 1; + } ++ // Safety: At this point we have read until_alignment elements and ++ // are valid for `ALU_STRIDE_SIZE` more. + let len_minus_stride = len - ALU_STRIDE_SIZE; + loop { ++ // Safety: we were valid for this read + let ptr = unsafe { src.add(offset) as *const usize }; + if let Some(num_ascii) = unsafe { validate_ascii_stride(ptr) } { + offset += num_ascii; ++ // Safety-usable invairant upheld here using the invariant from validate_ascii_stride() + return Some((unsafe { *(src.add(offset)) }, offset)); + } + offset += ALU_STRIDE_SIZE; ++ // Safety: This is `offset > ALU_STRIDE_SIZE` which means we always have at least `2 * ALU_STRIDE_SIZE` elements to munch next time. + if offset > len_minus_stride { + break; + } + } + } + while offset < len { + let code_unit = slice[offset]; + if code_unit > 127 { ++ // Safety-usable invairant upheld here + return Some((code_unit, offset)); + } + offset += 1; + } + None + } + + } +@@ -1423,70 +1781,88 @@ cfg_if! { + // vector reads without vector writes. + + pub const ALU_STRIDE_SIZE: usize = 8; + + pub const ALU_ALIGNMENT: usize = 4; + + pub const ALU_ALIGNMENT_MASK: usize = 3; + } else { ++ // Safety: src points to two valid `usize`s, dst points to four valid `usize`s + #[inline(always)] + unsafe fn unpack_latin1_stride_alu(src: *const usize, dst: *mut usize) { ++ // Safety: src safety invariant used here + let word = *src; + let second_word = *(src.add(1)); ++ // Safety: dst safety invariant passed down + unpack_alu(word, second_word, dst); + } + ++ // Safety: src points to four valid `usize`s, dst points to two valid `usize`s + #[inline(always)] + unsafe fn pack_latin1_stride_alu(src: *const usize, dst: *mut usize) { ++ // Safety: src safety invariant used here + let first = *src; + let second = *(src.add(1)); + let third = *(src.add(2)); + let fourth = *(src.add(3)); ++ // Safety: dst safety invariant passed down + pack_alu(first, second, third, fourth, dst); + } + ++ // Safety: src points to two valid `usize`s, dst points to four valid `usize`s + #[inline(always)] + unsafe fn ascii_to_basic_latin_stride_alu(src: *const usize, dst: *mut usize) -> bool { ++ // Safety: src safety invariant used here + let word = *src; + let second_word = *(src.add(1)); + // Check if the words contains non-ASCII + if (word & ASCII_MASK) | (second_word & ASCII_MASK) != 0 { + return false; + } ++ // Safety: dst safety invariant passed down + unpack_alu(word, second_word, dst); + true + } + ++ // Safety: src points four valid `usize`s, dst points to two valid `usize`s + #[inline(always)] + unsafe fn basic_latin_to_ascii_stride_alu(src: *const usize, dst: *mut usize) -> bool { ++ // Safety: src safety invariant used here + let first = *src; + let second = *(src.add(1)); + let third = *(src.add(2)); + let fourth = *(src.add(3)); + if (first & BASIC_LATIN_MASK) | (second & BASIC_LATIN_MASK) | (third & BASIC_LATIN_MASK) | (fourth & BASIC_LATIN_MASK) != 0 { + return false; + } ++ // Safety: dst safety invariant passed down + pack_alu(first, second, third, fourth, dst); + true + } + ++ // Safety: src, dst both point to two valid `usize`s each ++ // Safety-usable invariant: Will return byte index of first non-ascii byte. + #[inline(always)] + unsafe fn ascii_to_ascii_stride(src: *const usize, dst: *mut usize) -> Option { ++ // Safety: src safety invariant used here + let word = *src; + let second_word = *(src.add(1)); ++ // Safety: src safety invariant used here + *dst = word; + *(dst.add(1)) = second_word; ++ // Relies on safety-usable invariant here + find_non_ascii(word, second_word) + } + + basic_latin_alu!(ascii_to_basic_latin, u8, u16, ascii_to_basic_latin_stride_alu); + basic_latin_alu!(basic_latin_to_ascii, u16, u8, basic_latin_to_ascii_stride_alu); + latin1_alu!(unpack_latin1, u8, u16, unpack_latin1_stride_alu); + latin1_alu!(pack_latin1, u16, u8, pack_latin1_stride_alu); ++ // Safety invariant upheld: ascii_to_ascii_stride will return byte index of first non-ascii if found + ascii_alu!(ascii_to_ascii, u8, u8, ascii_to_ascii_stride); + } + } + + pub fn ascii_valid_up_to(bytes: &[u8]) -> usize { + match validate_ascii(bytes) { + None => bytes.len(), + Some((_, num_valid)) => num_valid, +diff --git a/third_party/rust/encoding_rs/src/handles.rs b/third_party/rust/encoding_rs/src/handles.rs +--- a/third_party/rust/encoding_rs/src/handles.rs ++++ b/third_party/rust/encoding_rs/src/handles.rs +@@ -29,17 +29,17 @@ use crate::simd_funcs::*; + #[cfg(all( + feature = "simd-accel", + any( + target_feature = "sse2", + all(target_endian = "little", target_arch = "aarch64"), + all(target_endian = "little", target_feature = "neon") + ) + ))] +-use packed_simd::u16x8; ++use core::simd::u16x8; + + use super::DecoderResult; + use super::EncoderResult; + use crate::ascii::*; + use crate::utf_8::convert_utf8_to_utf16_up_to_invalid; + use crate::utf_8::utf8_valid_up_to; + + pub enum Space { +@@ -85,84 +85,100 @@ impl Endian for LittleEndian { + const OPPOSITE_ENDIAN: bool = false; + + #[cfg(target_endian = "big")] + const OPPOSITE_ENDIAN: bool = true; + } + + #[derive(Debug, Copy, Clone)] + struct UnalignedU16Slice { ++ // Safety invariant: ptr must be valid for reading 2*len bytes + ptr: *const u8, + len: usize, + } + + impl UnalignedU16Slice { ++ /// Safety: ptr must be valid for reading 2*len bytes + #[inline(always)] + pub unsafe fn new(ptr: *const u8, len: usize) -> UnalignedU16Slice { ++ // Safety: field invariant passed up to caller here + UnalignedU16Slice { ptr, len } + } + + #[inline(always)] + pub fn trim_last(&mut self) { + assert!(self.len > 0); ++ // Safety: invariant upheld here: a slice is still valid with a shorter len + self.len -= 1; + } + + #[inline(always)] + pub fn at(&self, i: usize) -> u16 { + use core::mem::MaybeUninit; + + assert!(i < self.len); + unsafe { + let mut u: MaybeUninit = MaybeUninit::uninit(); ++ // Safety: i is at most len - 1, which works here + ::core::ptr::copy_nonoverlapping(self.ptr.add(i * 2), u.as_mut_ptr() as *mut u8, 2); ++ // Safety: valid read above lets us do this + u.assume_init() + } + } + + #[cfg(feature = "simd-accel")] + #[inline(always)] + pub fn simd_at(&self, i: usize) -> u16x8 { ++ // Safety: i/len are on the scale of u16s, each one corresponds to 2 u8s + assert!(i + SIMD_STRIDE_SIZE / 2 <= self.len); + let byte_index = i * 2; ++ // Safety: load16_unaligned needs SIMD_STRIDE_SIZE=16 u8 elements to read, ++ // or 16/2 = 8 u16 elements to read. ++ // We have checked that we have at least that many above. ++ + unsafe { to_u16_lanes(load16_unaligned(self.ptr.add(byte_index))) } + } + + #[inline(always)] + pub fn len(&self) -> usize { + self.len + } + + #[inline(always)] + pub fn tail(&self, from: usize) -> UnalignedU16Slice { + // XXX the return value should be restricted not to + // outlive self. + assert!(from <= self.len); ++ // Safety: This upholds the same invariant: `from` is in bounds and we're returning a shorter slice + unsafe { UnalignedU16Slice::new(self.ptr.add(from * 2), self.len - from) } + } + + #[cfg(feature = "simd-accel")] + #[inline(always)] + pub fn copy_bmp_to(&self, other: &mut [u16]) -> Option<(u16, usize)> { + assert!(self.len <= other.len()); + let mut offset = 0; ++ // Safety: SIMD_STRIDE_SIZE is measured in bytes, whereas len is in u16s. We check we can ++ // munch SIMD_STRIDE_SIZE / 2 u16s which means we can write SIMD_STRIDE_SIZE u8s + if SIMD_STRIDE_SIZE / 2 <= self.len { + let len_minus_stride = self.len - SIMD_STRIDE_SIZE / 2; + loop { + let mut simd = self.simd_at(offset); + if E::OPPOSITE_ENDIAN { + simd = simd_byte_swap(simd); + } ++ // Safety: we have enough space on the other side to write this + unsafe { + store8_unaligned(other.as_mut_ptr().add(offset), simd); + } + if contains_surrogates(simd) { + break; + } + offset += SIMD_STRIDE_SIZE / 2; ++ // Safety: This ensures we still have space for writing SIMD_STRIDE_SIZE u8s + if offset > len_minus_stride { + break; + } + } + } + while offset < self.len { + let unit = swap_if_opposite_endian::(self.at(offset)); + other[offset] = unit; +@@ -231,33 +247,37 @@ fn copy_unaligned_basic_latin_to_ascii( + src: UnalignedU16Slice, + dst: &mut [u8], + ) -> CopyAsciiResult { + let len = ::core::cmp::min(src.len(), dst.len()); + let mut offset = 0; ++ // Safety: This check ensures we are able to read/write at least SIMD_STRIDE_SIZE elements + if SIMD_STRIDE_SIZE <= len { + let len_minus_stride = len - SIMD_STRIDE_SIZE; + loop { + let mut first = src.simd_at(offset); + let mut second = src.simd_at(offset + (SIMD_STRIDE_SIZE / 2)); + if E::OPPOSITE_ENDIAN { + first = simd_byte_swap(first); + second = simd_byte_swap(second); + } + if !simd_is_basic_latin(first | second) { + break; + } + let packed = simd_pack(first, second); ++ // Safety: We are able to write SIMD_STRIDE_SIZE elements in this iteration + unsafe { + store16_unaligned(dst.as_mut_ptr().add(offset), packed); + } + offset += SIMD_STRIDE_SIZE; ++ // Safety: This is `offset > len - SIMD_STRIDE_SIZE`, which ensures that we can write at least SIMD_STRIDE_SIZE elements ++ // in the next iteration + if offset > len_minus_stride { + break; + } + } + } + copy_unaligned_basic_latin_to_ascii_alu::(src.tail(offset), &mut dst[offset..], offset) + } + +@@ -632,94 +652,106 @@ impl<'a> Utf16Destination<'a> { + #[inline(always)] + fn write_astral(&mut self, astral: u32) { + debug_assert!(astral > 0xFFFF); + debug_assert!(astral <= 0x10_FFFF); + self.write_code_unit((0xD7C0 + (astral >> 10)) as u16); + self.write_code_unit((0xDC00 + (astral & 0x3FF)) as u16); + } + #[inline(always)] +- pub fn write_surrogate_pair(&mut self, high: u16, low: u16) { ++ fn write_surrogate_pair(&mut self, high: u16, low: u16) { + self.write_code_unit(high); + self.write_code_unit(low); + } + #[inline(always)] + fn write_big5_combination(&mut self, combined: u16, combining: u16) { + self.write_bmp_excl_ascii(combined); + self.write_bmp_excl_ascii(combining); + } ++ // Safety-usable invariant: CopyAsciiResult::GoOn will only contain bytes >=0x80 + #[inline(always)] + pub fn copy_ascii_from_check_space_bmp<'b>( + &'b mut self, + source: &mut ByteSource, + ) -> CopyAsciiResult<(DecoderResult, usize, usize), (u8, Utf16BmpHandle<'b, 'a>)> { + let non_ascii_ret = { + let src_remaining = &source.slice[source.pos..]; + let dst_remaining = &mut self.slice[self.pos..]; + let (pending, length) = if dst_remaining.len() < src_remaining.len() { + (DecoderResult::OutputFull, dst_remaining.len()) + } else { + (DecoderResult::InputEmpty, src_remaining.len()) + }; ++ // Safety: This function is documented as needing valid pointers for src/dest and len, which ++ // is true since we've passed the minumum length of the two + match unsafe { + ascii_to_basic_latin(src_remaining.as_ptr(), dst_remaining.as_mut_ptr(), length) + } { + None => { + source.pos += length; + self.pos += length; + return CopyAsciiResult::Stop((pending, source.pos, self.pos)); + } ++ // Safety: the function is documented as returning bytes >=0x80 in the Some + Some((non_ascii, consumed)) => { + source.pos += consumed; + self.pos += consumed; + source.pos += 1; // +1 for non_ascii ++ // Safety: non-ascii bubbled out here + non_ascii + } + } + }; ++ // Safety: non-ascii returned here + CopyAsciiResult::GoOn((non_ascii_ret, Utf16BmpHandle::new(self))) + } ++ // Safety-usable invariant: CopyAsciiResult::GoOn will only contain bytes >=0x80 + #[inline(always)] + pub fn copy_ascii_from_check_space_astral<'b>( + &'b mut self, + source: &mut ByteSource, + ) -> CopyAsciiResult<(DecoderResult, usize, usize), (u8, Utf16AstralHandle<'b, 'a>)> { + let non_ascii_ret = { + let dst_len = self.slice.len(); + let src_remaining = &source.slice[source.pos..]; + let dst_remaining = &mut self.slice[self.pos..]; + let (pending, length) = if dst_remaining.len() < src_remaining.len() { + (DecoderResult::OutputFull, dst_remaining.len()) + } else { + (DecoderResult::InputEmpty, src_remaining.len()) + }; ++ // Safety: This function is documented as needing valid pointers for src/dest and len, which ++ // is true since we've passed the minumum length of the two + match unsafe { + ascii_to_basic_latin(src_remaining.as_ptr(), dst_remaining.as_mut_ptr(), length) + } { + None => { + source.pos += length; + self.pos += length; + return CopyAsciiResult::Stop((pending, source.pos, self.pos)); + } ++ // Safety: the function is documented as returning bytes >=0x80 in the Some + Some((non_ascii, consumed)) => { + source.pos += consumed; + self.pos += consumed; + if self.pos + 1 < dst_len { + source.pos += 1; // +1 for non_ascii ++ // Safety: non-ascii bubbled out here + non_ascii + } else { + return CopyAsciiResult::Stop(( + DecoderResult::OutputFull, + source.pos, + self.pos, + )); + } + } + } + }; ++ // Safety: non-ascii returned here + CopyAsciiResult::GoOn((non_ascii_ret, Utf16AstralHandle::new(self))) + } + #[inline(always)] + pub fn copy_utf8_up_to_invalid_from(&mut self, source: &mut ByteSource) { + let src_remaining = &source.slice[source.pos..]; + let dst_remaining = &mut self.slice[self.pos..]; + let (read, written) = convert_utf8_to_utf16_up_to_invalid(src_remaining, dst_remaining); + source.pos += read; +diff --git a/third_party/rust/encoding_rs/src/lib.rs b/third_party/rust/encoding_rs/src/lib.rs +--- a/third_party/rust/encoding_rs/src/lib.rs ++++ b/third_party/rust/encoding_rs/src/lib.rs +@@ -684,37 +684,26 @@ + //! TIS-620windows-874 + //! + //! + //! + //! See the section [_UTF-16LE, UTF-16BE and Unicode Encoding Schemes_](#utf-16le-utf-16be-and-unicode-encoding-schemes) + //! for discussion about the UTF-16 family. + + #![no_std] +-#![cfg_attr(feature = "simd-accel", feature(core_intrinsics))] ++#![cfg_attr(feature = "simd-accel", feature(core_intrinsics, portable_simd))] + + #[cfg(feature = "alloc")] + #[cfg_attr(test, macro_use)] + extern crate alloc; + + extern crate core; + #[macro_use] + extern crate cfg_if; + +-#[cfg(all( +- feature = "simd-accel", +- any( +- target_feature = "sse2", +- all(target_endian = "little", target_arch = "aarch64"), +- all(target_endian = "little", target_feature = "neon") +- ) +-))] +-#[macro_use(shuffle)] +-extern crate packed_simd; +- + #[cfg(feature = "serde")] + extern crate serde; + + #[cfg(all(test, feature = "serde"))] + extern crate bincode; + #[cfg(all(test, feature = "serde"))] + #[macro_use] + extern crate serde_derive; +diff --git a/third_party/rust/encoding_rs/src/mem.rs b/third_party/rust/encoding_rs/src/mem.rs +--- a/third_party/rust/encoding_rs/src/mem.rs ++++ b/third_party/rust/encoding_rs/src/mem.rs +@@ -111,16 +111,21 @@ macro_rules! by_unit_check_alu { + until_alignment -= 1; + } + if accu >= $bound { + return false; + } + } + let len_minus_stride = len - ALU_ALIGNMENT / unit_size; + if offset + (4 * (ALU_ALIGNMENT / unit_size)) <= len { ++ // Safety: the above check lets us perform 4 consecutive reads of ++ // length ALU_ALIGNMENT / unit_size. ALU_ALIGNMENT is the size of usize, and unit_size ++ // is the size of the `src` pointer, so this is equal to performing four usize reads. ++ // ++ // This invariant is upheld on all loop iterations + let len_minus_unroll = len - (4 * (ALU_ALIGNMENT / unit_size)); + loop { + let unroll_accu = unsafe { *(src.add(offset) as *const usize) } + | unsafe { + *(src.add(offset + (ALU_ALIGNMENT / unit_size)) as *const usize) + } + | unsafe { + *(src.add(offset + (2 * (ALU_ALIGNMENT / unit_size))) +@@ -129,22 +134,24 @@ macro_rules! by_unit_check_alu { + | unsafe { + *(src.add(offset + (3 * (ALU_ALIGNMENT / unit_size))) + as *const usize) + }; + if unroll_accu & $mask != 0 { + return false; + } + offset += 4 * (ALU_ALIGNMENT / unit_size); ++ // Safety: this check lets us continue to perform the 4 reads earlier + if offset > len_minus_unroll { + break; + } + } + } + while offset <= len_minus_stride { ++ // Safety: the above check lets us perform one usize read. + accu |= unsafe { *(src.add(offset) as *const usize) }; + offset += ALU_ALIGNMENT / unit_size; + } + } + } + for &unit in &buffer[offset..] { + accu |= unit as usize; + } +@@ -184,16 +191,21 @@ macro_rules! by_unit_check_simd { + until_alignment -= 1; + } + if accu >= $bound { + return false; + } + } + let len_minus_stride = len - SIMD_STRIDE_SIZE / unit_size; + if offset + (4 * (SIMD_STRIDE_SIZE / unit_size)) <= len { ++ // Safety: the above check lets us perform 4 consecutive reads of ++ // length SIMD_STRIDE_SIZE / unit_size. SIMD_STRIDE_SIZE is the size of $simd_ty, and unit_size ++ // is the size of the `src` pointer, so this is equal to performing four $simd_ty reads. ++ // ++ // This invariant is upheld on all loop iterations + let len_minus_unroll = len - (4 * (SIMD_STRIDE_SIZE / unit_size)); + loop { + let unroll_accu = unsafe { *(src.add(offset) as *const $simd_ty) } + | unsafe { + *(src.add(offset + (SIMD_STRIDE_SIZE / unit_size)) + as *const $simd_ty) + } + | unsafe { +@@ -203,23 +215,25 @@ macro_rules! by_unit_check_simd { + | unsafe { + *(src.add(offset + (3 * (SIMD_STRIDE_SIZE / unit_size))) + as *const $simd_ty) + }; + if !$func(unroll_accu) { + return false; + } + offset += 4 * (SIMD_STRIDE_SIZE / unit_size); ++ // Safety: this check lets us continue to perform the 4 reads earlier + if offset > len_minus_unroll { + break; + } + } + } + let mut simd_accu = $splat; + while offset <= len_minus_stride { ++ // Safety: the above check lets us perform one $simd_ty read. + simd_accu = simd_accu | unsafe { *(src.add(offset) as *const $simd_ty) }; + offset += SIMD_STRIDE_SIZE / unit_size; + } + if !$func(simd_accu) { + return false; + } + } + } +@@ -229,18 +243,18 @@ macro_rules! by_unit_check_simd { + accu < $bound + } + }; + } + + cfg_if! { + if #[cfg(all(feature = "simd-accel", any(target_feature = "sse2", all(target_endian = "little", target_arch = "aarch64"), all(target_endian = "little", target_feature = "neon"))))] { + use crate::simd_funcs::*; +- use packed_simd::u8x16; +- use packed_simd::u16x8; ++ use core::simd::u8x16; ++ use core::simd::u16x8; + + const SIMD_ALIGNMENT: usize = 16; + + const SIMD_ALIGNMENT_MASK: usize = 15; + + by_unit_check_simd!(is_ascii_impl, u8, u8x16::splat(0), u8x16, 0x80, simd_is_ascii); + by_unit_check_simd!(is_basic_latin_impl, u16, u16x8::splat(0), u16x8, 0x80, simd_is_basic_latin); + by_unit_check_simd!(is_utf16_latin1_impl, u16, u16x8::splat(0), u16x8, 0x100, simd_is_latin1); +diff --git a/third_party/rust/encoding_rs/src/simd_funcs.rs b/third_party/rust/encoding_rs/src/simd_funcs.rs +--- a/third_party/rust/encoding_rs/src/simd_funcs.rs ++++ b/third_party/rust/encoding_rs/src/simd_funcs.rs +@@ -2,65 +2,84 @@ + // file at the top-level directory of this distribution. + // + // Licensed under the Apache License, Version 2.0 or the MIT license + // , at your + // option. This file may not be copied, modified, or distributed + // except according to those terms. + +-use packed_simd::u16x8; +-use packed_simd::u8x16; +-use packed_simd::IntoBits; ++use any_all_workaround::all_mask16x8; ++use any_all_workaround::all_mask8x16; ++use any_all_workaround::any_mask16x8; ++use any_all_workaround::any_mask8x16; ++use core::simd::cmp::SimdPartialEq; ++use core::simd::cmp::SimdPartialOrd; ++use core::simd::mask16x8; ++use core::simd::mask8x16; ++use core::simd::simd_swizzle; ++use core::simd::u16x8; ++use core::simd::u8x16; ++use core::simd::ToBytes; + + // TODO: Migrate unaligned access to stdlib code if/when the RFC + // https://github.com/rust-lang/rfcs/pull/1725 is implemented. + ++/// Safety invariant: ptr must be valid for an unaligned read of 16 bytes + #[inline(always)] + pub unsafe fn load16_unaligned(ptr: *const u8) -> u8x16 { +- let mut simd = ::core::mem::uninitialized(); +- ::core::ptr::copy_nonoverlapping(ptr, &mut simd as *mut u8x16 as *mut u8, 16); +- simd ++ let mut simd = ::core::mem::MaybeUninit::::uninit(); ++ ::core::ptr::copy_nonoverlapping(ptr, simd.as_mut_ptr() as *mut u8, 16); ++ // Safety: copied 16 bytes of initialized memory into this, it is now initialized ++ simd.assume_init() + } + ++/// Safety invariant: ptr must be valid for an aligned-for-u8x16 read of 16 bytes + #[allow(dead_code)] + #[inline(always)] + pub unsafe fn load16_aligned(ptr: *const u8) -> u8x16 { + *(ptr as *const u8x16) + } + ++/// Safety invariant: ptr must be valid for an unaligned store of 16 bytes + #[inline(always)] + pub unsafe fn store16_unaligned(ptr: *mut u8, s: u8x16) { + ::core::ptr::copy_nonoverlapping(&s as *const u8x16 as *const u8, ptr, 16); + } + ++/// Safety invariant: ptr must be valid for an aligned-for-u8x16 store of 16 bytes + #[allow(dead_code)] + #[inline(always)] + pub unsafe fn store16_aligned(ptr: *mut u8, s: u8x16) { + *(ptr as *mut u8x16) = s; + } + ++/// Safety invariant: ptr must be valid for an unaligned read of 16 bytes + #[inline(always)] + pub unsafe fn load8_unaligned(ptr: *const u16) -> u16x8 { +- let mut simd = ::core::mem::uninitialized(); +- ::core::ptr::copy_nonoverlapping(ptr as *const u8, &mut simd as *mut u16x8 as *mut u8, 16); +- simd ++ let mut simd = ::core::mem::MaybeUninit::::uninit(); ++ ::core::ptr::copy_nonoverlapping(ptr as *const u8, simd.as_mut_ptr() as *mut u8, 16); ++ // Safety: copied 16 bytes of initialized memory into this, it is now initialized ++ simd.assume_init() + } + ++/// Safety invariant: ptr must be valid for an aligned-for-u16x8 read of 16 bytes + #[allow(dead_code)] + #[inline(always)] + pub unsafe fn load8_aligned(ptr: *const u16) -> u16x8 { + *(ptr as *const u16x8) + } + ++/// Safety invariant: ptr must be valid for an unaligned store of 16 bytes + #[inline(always)] + pub unsafe fn store8_unaligned(ptr: *mut u16, s: u16x8) { + ::core::ptr::copy_nonoverlapping(&s as *const u16x8 as *const u8, ptr as *mut u8, 16); + } + ++/// Safety invariant: ptr must be valid for an aligned-for-u16x8 store of 16 bytes + #[allow(dead_code)] + #[inline(always)] + pub unsafe fn store8_aligned(ptr: *mut u16, s: u16x8) { + *(ptr as *mut u16x8) = s; + } + + cfg_if! { + if #[cfg(all(target_feature = "sse2", target_arch = "x86_64"))] { +@@ -95,234 +114,241 @@ cfg_if! { + pub fn simd_byte_swap(s: u16x8) -> u16x8 { + let left = s << 8; + let right = s >> 8; + left | right + } + + #[inline(always)] + pub fn to_u16_lanes(s: u8x16) -> u16x8 { +- s.into_bits() ++ u16x8::from_ne_bytes(s) + } + + cfg_if! { + if #[cfg(target_feature = "sse2")] { + + // Expose low-level mask instead of higher-level conclusion, + // because the non-ASCII case would perform less well otherwise. ++ // Safety-usable invariant: This returned value is whether each high bit is set + #[inline(always)] + pub fn mask_ascii(s: u8x16) -> i32 { + unsafe { +- _mm_movemask_epi8(s.into_bits()) ++ _mm_movemask_epi8(s.into()) + } + } + + } else { + + } + } + + cfg_if! { + if #[cfg(target_feature = "sse2")] { + #[inline(always)] + pub fn simd_is_ascii(s: u8x16) -> bool { + unsafe { +- _mm_movemask_epi8(s.into_bits()) == 0 ++ // Safety: We have cfg()d the correct platform ++ _mm_movemask_epi8(s.into()) == 0 + } + } + } else if #[cfg(target_arch = "aarch64")]{ + #[inline(always)] + pub fn simd_is_ascii(s: u8x16) -> bool { + unsafe { +- vmaxvq_u8(s.into_bits()) < 0x80 ++ // Safety: We have cfg()d the correct platform ++ vmaxvq_u8(s.into()) < 0x80 + } + } + } else { + #[inline(always)] + pub fn simd_is_ascii(s: u8x16) -> bool { + // This optimizes better on ARM than + // the lt formulation. + let highest_ascii = u8x16::splat(0x7F); +- !s.gt(highest_ascii).any() ++ !any_mask8x16(s.simd_gt(highest_ascii)) + } + } + } + + cfg_if! { + if #[cfg(target_feature = "sse2")] { + #[inline(always)] + pub fn simd_is_str_latin1(s: u8x16) -> bool { + if simd_is_ascii(s) { + return true; + } + let above_str_latin1 = u8x16::splat(0xC4); +- s.lt(above_str_latin1).all() ++ s.simd_lt(above_str_latin1).all() + } + } else if #[cfg(target_arch = "aarch64")]{ + #[inline(always)] + pub fn simd_is_str_latin1(s: u8x16) -> bool { + unsafe { +- vmaxvq_u8(s.into_bits()) < 0xC4 ++ // Safety: We have cfg()d the correct platform ++ vmaxvq_u8(s.into()) < 0xC4 + } + } + } else { + #[inline(always)] + pub fn simd_is_str_latin1(s: u8x16) -> bool { + let above_str_latin1 = u8x16::splat(0xC4); +- s.lt(above_str_latin1).all() ++ all_mask8x16(s.simd_lt(above_str_latin1)) + } + } + } + + cfg_if! { + if #[cfg(target_arch = "aarch64")]{ + #[inline(always)] + pub fn simd_is_basic_latin(s: u16x8) -> bool { + unsafe { +- vmaxvq_u16(s.into_bits()) < 0x80 ++ // Safety: We have cfg()d the correct platform ++ vmaxvq_u16(s.into()) < 0x80 + } + } + + #[inline(always)] + pub fn simd_is_latin1(s: u16x8) -> bool { + unsafe { +- vmaxvq_u16(s.into_bits()) < 0x100 ++ // Safety: We have cfg()d the correct platform ++ vmaxvq_u16(s.into()) < 0x100 + } + } + } else { + #[inline(always)] + pub fn simd_is_basic_latin(s: u16x8) -> bool { + let above_ascii = u16x8::splat(0x80); +- s.lt(above_ascii).all() ++ all_mask16x8(s.simd_lt(above_ascii)) + } + + #[inline(always)] + pub fn simd_is_latin1(s: u16x8) -> bool { + // For some reason, on SSE2 this formulation + // seems faster in this case while the above + // function is better the other way round... + let highest_latin1 = u16x8::splat(0xFF); +- !s.gt(highest_latin1).any() ++ !any_mask16x8(s.simd_gt(highest_latin1)) + } + } + } + + #[inline(always)] + pub fn contains_surrogates(s: u16x8) -> bool { + let mask = u16x8::splat(0xF800); + let surrogate_bits = u16x8::splat(0xD800); +- (s & mask).eq(surrogate_bits).any() ++ any_mask16x8((s & mask).simd_eq(surrogate_bits)) + } + + cfg_if! { + if #[cfg(target_arch = "aarch64")]{ + macro_rules! aarch64_return_false_if_below_hebrew { + ($s:ident) => ({ + unsafe { +- if vmaxvq_u16($s.into_bits()) < 0x0590 { ++ // Safety: We have cfg()d the correct platform ++ if vmaxvq_u16($s.into()) < 0x0590 { + return false; + } + } + }) + } + + macro_rules! non_aarch64_return_false_if_all { + ($s:ident) => () + } + } else { + macro_rules! aarch64_return_false_if_below_hebrew { + ($s:ident) => () + } + + macro_rules! non_aarch64_return_false_if_all { + ($s:ident) => ({ +- if $s.all() { ++ if all_mask16x8($s) { + return false; + } + }) + } + } + } + + macro_rules! in_range16x8 { + ($s:ident, $start:expr, $end:expr) => {{ + // SIMD sub is wrapping +- ($s - u16x8::splat($start)).lt(u16x8::splat($end - $start)) ++ ($s - u16x8::splat($start)).simd_lt(u16x8::splat($end - $start)) + }}; + } + + #[inline(always)] + pub fn is_u16x8_bidi(s: u16x8) -> bool { + // We try to first quickly refute the RTLness of the vector. If that + // fails, we do the real RTL check, so in that case we end up wasting + // the work for the up-front quick checks. Even the quick-check is + // two-fold in order to return `false` ASAP if everything is below + // Hebrew. + + aarch64_return_false_if_below_hebrew!(s); + +- let below_hebrew = s.lt(u16x8::splat(0x0590)); ++ let below_hebrew = s.simd_lt(u16x8::splat(0x0590)); + + non_aarch64_return_false_if_all!(below_hebrew); + +- if (below_hebrew | in_range16x8!(s, 0x0900, 0x200F) | in_range16x8!(s, 0x2068, 0xD802)).all() { ++ if all_mask16x8( ++ below_hebrew | in_range16x8!(s, 0x0900, 0x200F) | in_range16x8!(s, 0x2068, 0xD802), ++ ) { + return false; + } + + // Quick refutation failed. Let's do the full check. + +- (in_range16x8!(s, 0x0590, 0x0900) +- | in_range16x8!(s, 0xFB1D, 0xFE00) +- | in_range16x8!(s, 0xFE70, 0xFEFF) +- | in_range16x8!(s, 0xD802, 0xD804) +- | in_range16x8!(s, 0xD83A, 0xD83C) +- | s.eq(u16x8::splat(0x200F)) +- | s.eq(u16x8::splat(0x202B)) +- | s.eq(u16x8::splat(0x202E)) +- | s.eq(u16x8::splat(0x2067))) +- .any() ++ any_mask16x8( ++ (in_range16x8!(s, 0x0590, 0x0900) ++ | in_range16x8!(s, 0xFB1D, 0xFE00) ++ | in_range16x8!(s, 0xFE70, 0xFEFF) ++ | in_range16x8!(s, 0xD802, 0xD804) ++ | in_range16x8!(s, 0xD83A, 0xD83C) ++ | s.simd_eq(u16x8::splat(0x200F)) ++ | s.simd_eq(u16x8::splat(0x202B)) ++ | s.simd_eq(u16x8::splat(0x202E)) ++ | s.simd_eq(u16x8::splat(0x2067))), ++ ) + } + + #[inline(always)] + pub fn simd_unpack(s: u8x16) -> (u16x8, u16x8) { +- unsafe { +- let first: u8x16 = shuffle!( +- s, +- u8x16::splat(0), +- [0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23] +- ); +- let second: u8x16 = shuffle!( +- s, +- u8x16::splat(0), +- [8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31] +- ); +- (first.into_bits(), second.into_bits()) +- } ++ let first: u8x16 = simd_swizzle!( ++ s, ++ u8x16::splat(0), ++ [0, 16, 1, 17, 2, 18, 3, 19, 4, 20, 5, 21, 6, 22, 7, 23] ++ ); ++ let second: u8x16 = simd_swizzle!( ++ s, ++ u8x16::splat(0), ++ [8, 24, 9, 25, 10, 26, 11, 27, 12, 28, 13, 29, 14, 30, 15, 31] ++ ); ++ (u16x8::from_ne_bytes(first), u16x8::from_ne_bytes(second)) + } + + cfg_if! { + if #[cfg(target_feature = "sse2")] { + #[inline(always)] + pub fn simd_pack(a: u16x8, b: u16x8) -> u8x16 { + unsafe { +- _mm_packus_epi16(a.into_bits(), b.into_bits()).into_bits() ++ // Safety: We have cfg()d the correct platform ++ _mm_packus_epi16(a.into(), b.into()).into() + } + } + } else { + #[inline(always)] + pub fn simd_pack(a: u16x8, b: u16x8) -> u8x16 { +- unsafe { +- let first: u8x16 = a.into_bits(); +- let second: u8x16 = b.into_bits(); +- shuffle!( +- first, +- second, +- [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30] +- ) +- } ++ let first: u8x16 = a.to_ne_bytes(); ++ let second: u8x16 = b.to_ne_bytes(); ++ simd_swizzle!( ++ first, ++ second, ++ [0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30] ++ ) + } + } + } + + #[cfg(test)] + mod tests { + use super::*; + use alloc::vec::Vec; +diff --git a/third_party/rust/encoding_rs/src/single_byte.rs b/third_party/rust/encoding_rs/src/single_byte.rs +--- a/third_party/rust/encoding_rs/src/single_byte.rs ++++ b/third_party/rust/encoding_rs/src/single_byte.rs +@@ -48,16 +48,19 @@ impl SingleByteDecoder { + CopyAsciiResult::GoOn((mut non_ascii, mut handle)) => 'middle: loop { + // Start non-boilerplate + // + // Since the non-ASCIIness of `non_ascii` is hidden from + // the optimizer, it can't figure out that it's OK to + // statically omit the bound check when accessing + // `[u16; 128]` with an index + // `non_ascii as usize - 0x80usize`. ++ // ++ // Safety: `non_ascii` is a u8 byte >=0x80, from the invariants ++ // on Utf8Destination::copy_ascii_from_check_space_bmp() + let mapped = + unsafe { *(self.table.get_unchecked(non_ascii as usize - 0x80usize)) }; + // let mapped = self.table[non_ascii as usize - 0x80usize]; + if mapped == 0u16 { + return ( + DecoderResult::Malformed(1, 0), + source.consumed(), + handle.written(), +@@ -146,82 +149,103 @@ impl SingleByteDecoder { + dst: &mut [u16], + _last: bool, + ) -> (DecoderResult, usize, usize) { + let (pending, length) = if dst.len() < src.len() { + (DecoderResult::OutputFull, dst.len()) + } else { + (DecoderResult::InputEmpty, src.len()) + }; ++ // Safety invariant: converted <= length. Quite often we have `converted < length` ++ // which will be separately marked. + let mut converted = 0usize; + 'outermost: loop { + match unsafe { ++ // Safety: length is the minimum length, `src/dst + x` will always be valid for reads/writes of `len - x` + ascii_to_basic_latin( + src.as_ptr().add(converted), + dst.as_mut_ptr().add(converted), + length - converted, + ) + } { + None => { + return (pending, length, length); + } + Some((mut non_ascii, consumed)) => { ++ // Safety invariant: `converted <= length` upheld, since this can only consume ++ // up to `length - converted` bytes. ++ // ++ // Furthermore, in this context, ++ // we can assume `converted < length` since this branch is only ever hit when ++ // ascii_to_basic_latin fails to consume the entire slice + converted += consumed; + 'middle: loop { + // `converted` doesn't count the reading of `non_ascii` yet. + // Since the non-ASCIIness of `non_ascii` is hidden from + // the optimizer, it can't figure out that it's OK to + // statically omit the bound check when accessing + // `[u16; 128]` with an index + // `non_ascii as usize - 0x80usize`. ++ // ++ // Safety: We can rely on `non_ascii` being between `0x80` and `0xFF` due to ++ // the invariants of `ascii_to_basic_latin()`, and our table has enough space for that. + let mapped = + unsafe { *(self.table.get_unchecked(non_ascii as usize - 0x80usize)) }; + // let mapped = self.table[non_ascii as usize - 0x80usize]; + if mapped == 0u16 { + return ( + DecoderResult::Malformed(1, 0), + converted + 1, // +1 `for non_ascii` + converted, + ); + } + unsafe { +- // The bound check has already been performed ++ // Safety: As mentioned above, `converted < length` + *(dst.get_unchecked_mut(converted)) = mapped; + } ++ // Safety: `converted <= length` upheld, since `converted < length` before this + converted += 1; + // Next, handle ASCII punctuation and non-ASCII without + // going back to ASCII acceleration. Non-ASCII scripts + // use ASCII punctuation, so this avoid going to + // acceleration just for punctuation/space and then + // failing. This is a significant boost to non-ASCII + // scripts. + // TODO: Split out Latin converters without this part + // this stuff makes Latin script-conversion slower. + if converted == length { + return (pending, length, length); + } ++ // Safety: We are back to `converted < length` because of the == above ++ // and can perform this check. + let mut b = unsafe { *(src.get_unchecked(converted)) }; ++ // Safety: `converted < length` is upheld for this loop + 'innermost: loop { + if b > 127 { + non_ascii = b; + continue 'middle; + } + // Testing on Haswell says that we should write the + // byte unconditionally instead of trying to unread it + // to make it part of the next SIMD stride. + unsafe { ++ // Safety: `converted < length` is true for this loop + *(dst.get_unchecked_mut(converted)) = u16::from(b); + } ++ // Safety: We are now at `converted <= length`. We should *not* `continue` ++ // the loop without reverifying + converted += 1; + if b < 60 { + // We've got punctuation + if converted == length { + return (pending, length, length); + } ++ // Safety: we're back to `converted <= length` because of the == above + b = unsafe { *(src.get_unchecked(converted)) }; ++ // Safety: The loop continues as `converted < length` + continue 'innermost; + } + // We've got markup or ASCII text + continue 'outermost; + } + } + } + } +@@ -229,16 +253,18 @@ impl SingleByteDecoder { + } + + pub fn latin1_byte_compatible_up_to(&self, buffer: &[u8]) -> usize { + let mut bytes = buffer; + let mut total = 0; + loop { + if let Some((non_ascii, offset)) = validate_ascii(bytes) { + total += offset; ++ // Safety: We can rely on `non_ascii` being between `0x80` and `0xFF` due to ++ // the invariants of `ascii_to_basic_latin()`, and our table has enough space for that. + let mapped = unsafe { *(self.table.get_unchecked(non_ascii as usize - 0x80usize)) }; + if mapped != u16::from(non_ascii) { + return total; + } + total += 1; + bytes = &bytes[offset + 1..]; + } else { + return total; +@@ -379,64 +405,89 @@ impl SingleByteEncoder { + dst: &mut [u8], + _last: bool, + ) -> (EncoderResult, usize, usize) { + let (pending, length) = if dst.len() < src.len() { + (EncoderResult::OutputFull, dst.len()) + } else { + (EncoderResult::InputEmpty, src.len()) + }; ++ // Safety invariant: converted <= length. Quite often we have `converted < length` ++ // which will be separately marked. + let mut converted = 0usize; + 'outermost: loop { + match unsafe { ++ // Safety: length is the minimum length, `src/dst + x` will always be valid for reads/writes of `len - x` + basic_latin_to_ascii( + src.as_ptr().add(converted), + dst.as_mut_ptr().add(converted), + length - converted, + ) + } { + None => { + return (pending, length, length); + } + Some((mut non_ascii, consumed)) => { ++ // Safety invariant: `converted <= length` upheld, since this can only consume ++ // up to `length - converted` bytes. ++ // ++ // Furthermore, in this context, ++ // we can assume `converted < length` since this branch is only ever hit when ++ // ascii_to_basic_latin fails to consume the entire slice + converted += consumed; + 'middle: loop { + // `converted` doesn't count the reading of `non_ascii` yet. + match self.encode_u16(non_ascii) { + Some(byte) => { + unsafe { ++ // Safety: we're allowed this access since `converted < length` + *(dst.get_unchecked_mut(converted)) = byte; + } + converted += 1; ++ // `converted <= length` now + } + None => { + // At this point, we need to know if we + // have a surrogate. + let high_bits = non_ascii & 0xFC00u16; + if high_bits == 0xD800u16 { + // high surrogate + if converted + 1 == length { + // End of buffer. This surrogate is unpaired. + return ( + EncoderResult::Unmappable('\u{FFFD}'), + converted + 1, // +1 `for non_ascii` + converted, + ); + } ++ // Safety: convered < length from outside the match, and `converted + 1 != length`, ++ // So `converted + 1 < length` as well. We're in bounds + let second = + u32::from(unsafe { *src.get_unchecked(converted + 1) }); + if second & 0xFC00u32 != 0xDC00u32 { + return ( + EncoderResult::Unmappable('\u{FFFD}'), + converted + 1, // +1 `for non_ascii` + converted, + ); + } + // The next code unit is a low surrogate. + let astral: char = unsafe { ++ // Safety: We can rely on non_ascii being 0xD800-0xDBFF since the high bits are 0xD800 ++ // Then, (non_ascii << 10 - 0xD800 << 10) becomes between (0 to 0x3FF) << 10, which is between ++ // 0x400 to 0xffc00. Adding the 0x10000 gives a range of 0x10400 to 0x10fc00. Subtracting the 0xDC00 ++ // gives 0x2800 to 0x102000 ++ // The second term is between 0xDC00 and 0xDFFF from the check above. This gives a maximum ++ // possible range of (0x10400 + 0xDC00) to (0x102000 + 0xDFFF) which is 0x1E000 to 0x10ffff. ++ // This is in range. ++ // ++ // From a Unicode principles perspective this can also be verified as we have checked that `non_ascii` is a high surrogate ++ // (0xD800..=0xDBFF), and that `second` is a low surrogate (`0xDC00..=0xDFFF`), and we are applying reverse of the UTC16 transformation ++ // algorithm , by applying the high surrogate - 0xD800 to the ++ // high ten bits, and the low surrogate - 0xDc00 to the low ten bits, and then adding 0x10000 + ::core::char::from_u32_unchecked( + (u32::from(non_ascii) << 10) + second + - (((0xD800u32 << 10) - 0x1_0000u32) + 0xDC00u32), + ) + }; + return ( + EncoderResult::Unmappable(astral), + converted + 2, // +2 `for non_ascii` and `second` +@@ -451,52 +502,63 @@ impl SingleByteEncoder { + converted, + ); + } + return ( + EncoderResult::unmappable_from_bmp(non_ascii), + converted + 1, // +1 `for non_ascii` + converted, + ); ++ // Safety: This branch diverges, so no need to uphold invariants on `converted` + } + } + // Next, handle ASCII punctuation and non-ASCII without + // going back to ASCII acceleration. Non-ASCII scripts + // use ASCII punctuation, so this avoid going to + // acceleration just for punctuation/space and then + // failing. This is a significant boost to non-ASCII + // scripts. + // TODO: Split out Latin converters without this part + // this stuff makes Latin script-conversion slower. + if converted == length { + return (pending, length, length); + } ++ // Safety: we're back to `converted < length` due to the == above and can perform ++ // the unchecked read + let mut unit = unsafe { *(src.get_unchecked(converted)) }; + 'innermost: loop { ++ // Safety: This loop always begins with `converted < length`, see ++ // the invariant outside and the comment on the continue below + if unit > 127 { + non_ascii = unit; + continue 'middle; + } + // Testing on Haswell says that we should write the + // byte unconditionally instead of trying to unread it + // to make it part of the next SIMD stride. + unsafe { ++ // Safety: Can rely on converted < length + *(dst.get_unchecked_mut(converted)) = unit as u8; + } + converted += 1; ++ // `converted <= length` here + if unit < 60 { + // We've got punctuation + if converted == length { + return (pending, length, length); + } ++ // Safety: `converted < length` due to the == above. The read is safe. + unit = unsafe { *(src.get_unchecked(converted)) }; ++ // Safety: This only happens if `converted < length`, maintaining it + continue 'innermost; + } + // We've got markup or ASCII text + continue 'outermost; ++ // Safety: All other routes to here diverge so the continue is the only ++ // way to run the innermost loop. + } + } + } + } + } + } + } + +diff --git a/third_party/rust/encoding_rs/src/x_user_defined.rs b/third_party/rust/encoding_rs/src/x_user_defined.rs +--- a/third_party/rust/encoding_rs/src/x_user_defined.rs ++++ b/third_party/rust/encoding_rs/src/x_user_defined.rs +@@ -9,22 +9,23 @@ + + use super::*; + use crate::handles::*; + use crate::variant::*; + + cfg_if! { + if #[cfg(feature = "simd-accel")] { + use simd_funcs::*; +- use packed_simd::u16x8; ++ use core::simd::u16x8; ++ use core::simd::cmp::SimdPartialOrd; + + #[inline(always)] + fn shift_upper(unpacked: u16x8) -> u16x8 { + let highest_ascii = u16x8::splat(0x7F); +- unpacked + unpacked.gt(highest_ascii).select(u16x8::splat(0xF700), u16x8::splat(0)) } ++ unpacked + unpacked.simd_gt(highest_ascii).select(u16x8::splat(0xF700), u16x8::splat(0)) } + } else { + } + } + + pub struct UserDefinedDecoder; + + impl UserDefinedDecoder { + pub fn new() -> VariantDecoder { +@@ -111,20 +112,25 @@ impl UserDefinedDecoder { + } else { + (DecoderResult::InputEmpty, src.len()) + }; + // Not bothering with alignment + let tail_start = length & !0xF; + let simd_iterations = length >> 4; + let src_ptr = src.as_ptr(); + let dst_ptr = dst.as_mut_ptr(); ++ // Safety: This is `for i in 0..length / 16` + for i in 0..simd_iterations { ++ // Safety: This is in bounds: length is the minumum valid length for both src/dst ++ // and i ranges to length/16, so multiplying by 16 will always be `< length` and can do ++ // a 16 byte read + let input = unsafe { load16_unaligned(src_ptr.add(i * 16)) }; + let (first, second) = simd_unpack(input); + unsafe { ++ // Safety: same as above, but this is two consecutive 8-byte reads + store8_unaligned(dst_ptr.add(i * 16), shift_upper(first)); + store8_unaligned(dst_ptr.add((i * 16) + 8), shift_upper(second)); + } + } + let src_tail = &src[tail_start..length]; + let dst_tail = &mut dst[tail_start..length]; + src_tail + .iter() + +diff --git a/third_party/rust/encoding_rs/.cargo-checksum.json b/third_party/rust/encoding_rs/.cargo-checksum.json +--- a/third_party/rust/encoding_rs/.cargo-checksum.json ++++ b/third_party/rust/encoding_rs/.cargo-checksum.json +@@ -1 +1 @@ +-{"files":{"CONTRIBUTING.md":"ca1901f3e8532fb4cec894fd3664f0eaa898c0c4b961d1b992d1ed54eacf362a","COPYRIGHT":"11789f45bb180841cd362a5eee6789c68ddb573a11105e30768c308a6add0190","Cargo.toml":"42fa83322aa9fd6723b77d35d0cacb92cbb6e7f573ce11c55f5225292866f8f4","Ideas.md":"b7452893f500163868d8de52c09addaf91e1632454ed02e892c467ed7ec39dbd","LICENSE-APACHE":"cfc7749b96f63bd31c3c42b5c471bf756814053e847c10f3eb003417bc523d30","LICENSE-MIT":"3fa4ca83dcc9237839b1bdeb2e6d16bdfb5ec0c5ce42b24694d8bbf0dcbef72c","LICENSE-WHATWG":"838118388fe5c2e7f1dbbaeed13e1c7f3ebf88be91319c7c1d77c18e987d1a50","README.md":"d938e8ab0b9ab67e74a1a4f48f23fdce956d0ad3a3f6147ae7612a92763c88d5","ci/miri.sh":"43cb8d82f49e3bfe2d2274b6ccd6f0714a4188ccef0cecc040829883cfdbee25","doc/Big5.txt":"f73a2edc5cb6c2d140ba6e07f4542e1c4a234950378acde1df93480f0ca0be0b","doc/EUC-JP.txt":"ee2818b907d0137f40a9ab9fd525fc700a44dbdddb6cf0c157a656566bae4bf1","doc/EUC-KR.txt":"71d9e2ccf3b124e8bdfb433c8cf2773fd878077038d0cec3c7237a50f4a78a30","doc/GBK.txt":"c1b522b5a799884e5001da661f42c5a8f4d0acb9ef1d74b206f22b5f65365606","doc/IBM866.txt":"a5a433e804d0f83af785015179fbc1d9b0eaf1f7960efcd04093e136b51fbd0e","doc/ISO-2022-JP.txt":"af86684f5a8f0e2868d7b2c292860140c3d2e5527530ca091f1b28198e8e2fe6","doc/ISO-8859-10.txt":"6d3949ad7c81ca176895101ed81a1db7df1060d64e262880b94bd31bb344ab4d","doc/ISO-8859-13.txt":"3951dd89cf93f7729148091683cf8511f4529388b7dc8dcd0d62eaed55be93fa","doc/ISO-8859-14.txt":"3d330784a0374fd255a38b47949675cc7168c800530534b0a01cac6edc623adc","doc/ISO-8859-15.txt":"24b1084aab5127a85aab99153f86e24694d0a3615f53b5ce23683f97cf66c47a","doc/ISO-8859-16.txt":"ce0272559b92ba76d7a7e476f6424ae4a5cc72e75b183611b08392e44add4d25","doc/ISO-8859-2.txt":"18ceff88c13d1b5ba455a3919b1e3de489045c4c3d2dd7e8527c125c75d54aad","doc/ISO-8859-3.txt":"21798404c68f4f5db59223362f24999da96968c0628427321fccce7d2849a130","doc/ISO-8859-4.txt":"d27f6520c6c5bfbcc19176b71d081cdb3bccde1622bb3e420d5680e812632d53","doc/ISO-8859-5.txt":"a10ec8d6ea7a78ad15da7275f6cb1a3365118527e28f9af6d0d5830501303f3a","doc/ISO-8859-6.txt":"ccda8a2efc96115336bdd77776637b9712425e44fbcf745353b9057fbef144e7","doc/ISO-8859-7.txt":"17900fa1f27a445958f0a77d7d9056be375a6bd7ee4492aa680c7c1500bab85e","doc/ISO-8859-8-I.txt":"8357555646d54265a9b9ffa3e68b08d132312f1561c60108ff9b8b1167b6ecf2","doc/ISO-8859-8.txt":"72cd6f3afb7b4a9c16a66a362473315770b7755d72c86c870e52fc3eba86c8af","doc/KOI8-R.txt":"839cf19a38da994488004ed7814b1f6151640156a9a2af02bf2efca745fb5966","doc/KOI8-U.txt":"0cc76624ed1f024183e2298b7e019957da2c70c8ca06e0fc4e6f353f50a5054f","doc/Shift_JIS.txt":"34c49141818cb9ddbcf59cc858f78a79be8ad148d563f26415108ae1f148443f","doc/UTF-16BE.txt":"e2e280d8acbaa6d2a6b3569d60e17500a285f2baa0df3363dd85537cd5a1ef8f","doc/UTF-16LE.txt":"70bdc170e3fc5298ba68f10125fb5eeb8b077036cc96bb4416c4de396f6d76c1","doc/UTF-8.txt":"ea7bae742e613010ced002cf4b601a737d2203fad65e115611451bc4428f548a","doc/gb18030.txt":"dc71378a8f07a2d8659f69ee81fb8791fef56ba86f124b429978285237bb4a7b","doc/macintosh.txt":"57491e53866711b4672d9b9ff35380b9dac9e0d8e3d6c20bdd6140603687c023","doc/replacement.txt":"4b6c3bbd7999d9d4108a281594bd02d13607e334a95465afff8c2c08d395f0e4","doc/windows-1250.txt":"61296bb6a21cdab602300d32ecfba434cb82de5ac3bc88d58710d2f125e28d39","doc/windows-1251.txt":"7deea1c61dea1485c8ff02db2c7d578db7a9aab63ab1cfd02ec04b515864689e","doc/windows-1252.txt":"933ef3bdddfce5ee132b9f1a1aa8b47423d2587bbe475b19028d0a6d38e180b6","doc/windows-1253.txt":"1a38748b88e99071a5c7b3d5456ead4caedeabab50d50d658be105bc113714de","doc/windows-1254.txt":"f8372f86c6f8d642563cd6ddc025260553292a39423df1683a98670bd7bf2b47","doc/windows-1255.txt":"4e5852494730054e2da258a74e1b9d780abbcdd8ce22ebc218ca2efe9e90493d","doc/windows-1256.txt":"c0879c5172abedead302a406e8f60d9cd9598694a0ffa4fd288ffe4fef7b8ea1","doc/windows-1257.txt":"c28a0c9f964fcb2b46d21f537c402446501a2800670481d6abf9fd9e9018d523","doc/windows-1258.txt":"5019ae4d61805c79aacbf17c93793342dbb098d65a1837783bc3e2c6d6a23602","doc/windows-874.txt":"4ef0e4501c5feba8b17aee1818602ed44b36ca8475db771ce2fc16d392cabecc","doc/x-mac-cyrillic.txt":"58be154d8a888ca3d484b83b44f749823ef339ab27f14d90ca9a856f5050a8bd","doc/x-user-defined.txt":"f9cd07c4321bf5cfb0be4bdddd251072999b04a6cf7a6f5bc63709a84e2c1ffc","generate-encoding-data.py":"be989dd25c6b946e3e8745fdc8e8a80fcf24b3be99ad0b4b78153ba3f6ab6310","rustfmt.toml":"85c1a3b4382fd89e991cbb81b70fb52780472edc064c963943cdaaa56e0a2030","src/ascii.rs":"c44c002641adb5ebc4368707a8cc0a076d2f33e6a5c27b1b69988eb515f5653d","src/big5.rs":"ec6e2913011a38e9a3e825a1731f139a7ca1d5b264fefae51a3cc1a68a57cef9","src/data.rs":"8a617cc57032092d65850eb27e00de687c80aea3299e839a1f58b42d0b35abf3","src/euc_jp.rs":"32047f5b540188c4cb19c07165f846b9786a09f18e315ed3e9bda1293dae52aa","src/euc_kr.rs":"9b25afc72d9378700eecfac58d55ad1c5946d6cd0ccde2c29c08200ef2de6bb9","src/gb18030.rs":"808587168d73f0c80f8520f0ca9b161866ed2efeb17a05e85fdf3b8efe7ba28a","src/handles.rs":"cc83dc0754751d67f5688a65c5e0191cba02f6bacce81a0813a243cba55eef7a","src/iso_2022_jp.rs":"9bb485e82574f4b7d4b2364f0ff276acb6a0bc111758420a3b0ec5e04c196652","src/lib.rs":"1dc07b818e45846b16ddcaf0de46c8862dd7df8099123ec38b95c3f8ad9c91ec","src/macros.rs":"200997f8870de8bfd8cdc475e92115df42108c0df661e49d3d1cbc32056e1d99","src/mem.rs":"0bf34103e0ad1b842a13a082dee2b920b05cf4fb0f145c9ee7f608f4cb4a544f","src/replacement.rs":"7660b34a53f8c1ca2bdfa0e51e843ec28326950952ad8bc96569feb93ac62308","src/shift_jis.rs":"6951ae67e36b1a12fa3a30734957f444d8b1b4ae0e2bde52060b29bd0f16d9d9","src/simd_funcs.rs":"2612aba86e1d201096d7e47a859bc3444f85934cc82d8adc6d39a4304d9eecfc","src/single_byte.rs":"3c9e9c1f946ae622c725ba9421240c1faa9a05e95fa10dd4642a25cb276a1edc","src/test_data/big5_in.txt":"4c5a8691f8dc717311889c63894026d2fb62725a86c4208ca274a9cc8d42a503","src/test_data/big5_in_ref.txt":"99d399e17750cf9c7cf30bb253dbfe35b81c4fcbdead93cfa48b1429213473c7","src/test_data/big5_out.txt":"6193ca97c297aa20e09396038d18e938bb7ea331c26f0f2454097296723a0b13","src/test_data/big5_out_ref.txt":"36567691f557df144f6cc520015a87038dfa156f296fcf103b56ae9a718be1fc","src/test_data/euc_kr_in.txt":"c86a7224f3215fa0d04e685622a752fdc72763e8ae076230c7fd62de57ec4074","src/test_data/euc_kr_in_ref.txt":"1f419f4ca47d708b54c73c461545a022ae2e20498fdbf8005a483d752a204883","src/test_data/euc_kr_out.txt":"e7f32e026f70be1e1b58e0047baf7d3d2c520269c4f9b9992e158b4decb0a1a3","src/test_data/euc_kr_out_ref.txt":"c9907857980b20b8e9e3b584482ed6567a2be6185d72237b6322f0404944924e","src/test_data/gb18030_in.txt":"ab7231b2d3e9afacdbd7d7f3b9e5361a7ff9f7e1cfdb4f3bd905b9362b309e53","src/test_data/gb18030_in_ref.txt":"dc5069421adca2043c55f5012b55a76fdff651d22e6e699fd0978f8d5706815c","src/test_data/gb18030_out.txt":"f0208d527f5ca63de7d9a0323be8d5cf12d8a104b2943d92c2701f0c3364dac1","src/test_data/gb18030_out_ref.txt":"6819fe47627e4ea01027003fc514b9f21a1322e732d7f1fb92cc6c5455bc6c07","src/test_data/iso_2022_jp_in.txt":"cd24bbdcb1834e25db54646fbf4c41560a13dc7540f6be3dba4f5d97d44513af","src/test_data/iso_2022_jp_in_ref.txt":"3dc4e6a5e06471942d086b16c9440945e78415f6f3f47e43717e4bc2eac2cdf5","src/test_data/iso_2022_jp_out.txt":"9b6f015329dda6c3f9ee5ce6dbd6fa9c89acc21283e886836c78b8d833480c21","src/test_data/iso_2022_jp_out_ref.txt":"78cb260093a20116ad9a42f43b05d1848c5ab100b6b9a850749809e943884b35","src/test_data/jis0208_in.txt":"6df3030553ffb0a6615bb33dc8ea9dca6d9623a9028e2ffec754ce3c3da824cc","src/test_data/jis0208_in_ref.txt":"3dc4e6a5e06471942d086b16c9440945e78415f6f3f47e43717e4bc2eac2cdf5","src/test_data/jis0208_out.txt":"4ec24477e1675ce750733bdc3c5add1cd27b6bd4ce1f09289564646e9654e857","src/test_data/jis0208_out_ref.txt":"c3e1cef5032b2b1d93a406f31ff940c4e2dfe8859b8b17ca2761fee7a75a0e48","src/test_data/jis0212_in.txt":"c011f0dd72bd7c8cd922df9374ef8d2769a77190514c77f6c62b415852eeb9fe","src/test_data/jis0212_in_ref.txt":"7d9458b3d2f73e7092a7f505c08ce1d233dde18aa679fbcf9889256239cc9e06","src/test_data/shift_jis_in.txt":"02e389ccef0dd2122e63f503899402cb7f797912c2444cc80ab93131116c5524","src/test_data/shift_jis_in_ref.txt":"512f985950ca902e643c88682dba9708b7c38d3c5ec2925168ab00ac94ab19f9","src/test_data/shift_jis_out.txt":"5fbc44da7bf639bf6cfe0fa1fd3eba7102b88f81919c9ea991302712f69426fb","src/test_data/shift_jis_out_ref.txt":"466322c6fed8286c64582731755290c2296508efdd258826e6279686649b481f","src/test_labels_names.rs":"23a2e11b02b3b8d15fb5613a625e3edb2c61e70e3c581abfd638719a4088200d","src/testing.rs":"f59e671e95a98a56f6b573e8c6be4d71e670bf52f7e20eb1605d990aafa1894e","src/utf_16.rs":"c071a147fad38d750c2c247e141b76b929a48007b99f26b2922b9caecdaf2f25","src/utf_8.rs":"7b7d887b347f1aefa03246b028a36a72758a4ce76c28f3b45c19467851aa7839","src/variant.rs":"1fab5363588a1554a7169de8731ea9cded7ac63ea35caabdd1c27a8dde68c27b","src/x_user_defined.rs":"c9c010730dfb9f141d4fed19350c08a21af240913a54bb64f5ca89ff93b6b7d1"},"package":"7268b386296a025e474d5140678f75d6de9493ae55a5d709eeb9dd08149945e1"} +\ No newline at end of file ++{"files":{"CONTRIBUTING.md":"ca1901f3e8532fb4cec894fd3664f0eaa898c0c4b961d1b992d1ed54eacf362a","COPYRIGHT":"11789f45bb180841cd362a5eee6789c68ddb573a11105e30768c308a6add0190","Cargo.toml":"22a4d210c92dae9f32c6944ef340ee8fdd027f99c081577e8907123e2a93383e","Ideas.md":"b7452893f500163868d8de52c09addaf91e1632454ed02e892c467ed7ec39dbd","LICENSE-APACHE":"cfc7749b96f63bd31c3c42b5c471bf756814053e847c10f3eb003417bc523d30","LICENSE-MIT":"3fa4ca83dcc9237839b1bdeb2e6d16bdfb5ec0c5ce42b24694d8bbf0dcbef72c","LICENSE-WHATWG":"838118388fe5c2e7f1dbbaeed13e1c7f3ebf88be91319c7c1d77c18e987d1a50","README.md":"1d08aefcb92afa81b18154049c9abbcad4540a23f7172e9f9bbed5af33f1a087","ci/miri.sh":"43cb8d82f49e3bfe2d2274b6ccd6f0714a4188ccef0cecc040829883cfdbee25","doc/Big5.txt":"f73a2edc5cb6c2d140ba6e07f4542e1c4a234950378acde1df93480f0ca0be0b","doc/EUC-JP.txt":"ee2818b907d0137f40a9ab9fd525fc700a44dbdddb6cf0c157a656566bae4bf1","doc/EUC-KR.txt":"71d9e2ccf3b124e8bdfb433c8cf2773fd878077038d0cec3c7237a50f4a78a30","doc/GBK.txt":"c1b522b5a799884e5001da661f42c5a8f4d0acb9ef1d74b206f22b5f65365606","doc/IBM866.txt":"a5a433e804d0f83af785015179fbc1d9b0eaf1f7960efcd04093e136b51fbd0e","doc/ISO-2022-JP.txt":"af86684f5a8f0e2868d7b2c292860140c3d2e5527530ca091f1b28198e8e2fe6","doc/ISO-8859-10.txt":"6d3949ad7c81ca176895101ed81a1db7df1060d64e262880b94bd31bb344ab4d","doc/ISO-8859-13.txt":"3951dd89cf93f7729148091683cf8511f4529388b7dc8dcd0d62eaed55be93fa","doc/ISO-8859-14.txt":"3d330784a0374fd255a38b47949675cc7168c800530534b0a01cac6edc623adc","doc/ISO-8859-15.txt":"24b1084aab5127a85aab99153f86e24694d0a3615f53b5ce23683f97cf66c47a","doc/ISO-8859-16.txt":"ce0272559b92ba76d7a7e476f6424ae4a5cc72e75b183611b08392e44add4d25","doc/ISO-8859-2.txt":"18ceff88c13d1b5ba455a3919b1e3de489045c4c3d2dd7e8527c125c75d54aad","doc/ISO-8859-3.txt":"21798404c68f4f5db59223362f24999da96968c0628427321fccce7d2849a130","doc/ISO-8859-4.txt":"d27f6520c6c5bfbcc19176b71d081cdb3bccde1622bb3e420d5680e812632d53","doc/ISO-8859-5.txt":"a10ec8d6ea7a78ad15da7275f6cb1a3365118527e28f9af6d0d5830501303f3a","doc/ISO-8859-6.txt":"ccda8a2efc96115336bdd77776637b9712425e44fbcf745353b9057fbef144e7","doc/ISO-8859-7.txt":"17900fa1f27a445958f0a77d7d9056be375a6bd7ee4492aa680c7c1500bab85e","doc/ISO-8859-8-I.txt":"8357555646d54265a9b9ffa3e68b08d132312f1561c60108ff9b8b1167b6ecf2","doc/ISO-8859-8.txt":"72cd6f3afb7b4a9c16a66a362473315770b7755d72c86c870e52fc3eba86c8af","doc/KOI8-R.txt":"839cf19a38da994488004ed7814b1f6151640156a9a2af02bf2efca745fb5966","doc/KOI8-U.txt":"0cc76624ed1f024183e2298b7e019957da2c70c8ca06e0fc4e6f353f50a5054f","doc/Shift_JIS.txt":"34c49141818cb9ddbcf59cc858f78a79be8ad148d563f26415108ae1f148443f","doc/UTF-16BE.txt":"e2e280d8acbaa6d2a6b3569d60e17500a285f2baa0df3363dd85537cd5a1ef8f","doc/UTF-16LE.txt":"70bdc170e3fc5298ba68f10125fb5eeb8b077036cc96bb4416c4de396f6d76c1","doc/UTF-8.txt":"ea7bae742e613010ced002cf4b601a737d2203fad65e115611451bc4428f548a","doc/gb18030.txt":"dc71378a8f07a2d8659f69ee81fb8791fef56ba86f124b429978285237bb4a7b","doc/macintosh.txt":"57491e53866711b4672d9b9ff35380b9dac9e0d8e3d6c20bdd6140603687c023","doc/replacement.txt":"4b6c3bbd7999d9d4108a281594bd02d13607e334a95465afff8c2c08d395f0e4","doc/windows-1250.txt":"61296bb6a21cdab602300d32ecfba434cb82de5ac3bc88d58710d2f125e28d39","doc/windows-1251.txt":"7deea1c61dea1485c8ff02db2c7d578db7a9aab63ab1cfd02ec04b515864689e","doc/windows-1252.txt":"933ef3bdddfce5ee132b9f1a1aa8b47423d2587bbe475b19028d0a6d38e180b6","doc/windows-1253.txt":"1a38748b88e99071a5c7b3d5456ead4caedeabab50d50d658be105bc113714de","doc/windows-1254.txt":"f8372f86c6f8d642563cd6ddc025260553292a39423df1683a98670bd7bf2b47","doc/windows-1255.txt":"4e5852494730054e2da258a74e1b9d780abbcdd8ce22ebc218ca2efe9e90493d","doc/windows-1256.txt":"c0879c5172abedead302a406e8f60d9cd9598694a0ffa4fd288ffe4fef7b8ea1","doc/windows-1257.txt":"c28a0c9f964fcb2b46d21f537c402446501a2800670481d6abf9fd9e9018d523","doc/windows-1258.txt":"5019ae4d61805c79aacbf17c93793342dbb098d65a1837783bc3e2c6d6a23602","doc/windows-874.txt":"4ef0e4501c5feba8b17aee1818602ed44b36ca8475db771ce2fc16d392cabecc","doc/x-mac-cyrillic.txt":"58be154d8a888ca3d484b83b44f749823ef339ab27f14d90ca9a856f5050a8bd","doc/x-user-defined.txt":"f9cd07c4321bf5cfb0be4bdddd251072999b04a6cf7a6f5bc63709a84e2c1ffc","generate-encoding-data.py":"be989dd25c6b946e3e8745fdc8e8a80fcf24b3be99ad0b4b78153ba3f6ab6310","rustfmt.toml":"85c1a3b4382fd89e991cbb81b70fb52780472edc064c963943cdaaa56e0a2030","src/ascii.rs":"588e38b01e666d5e7462617ea7e90a108d608dec9e016f3d273ac0744af2e05d","src/big5.rs":"ec6e2913011a38e9a3e825a1731f139a7ca1d5b264fefae51a3cc1a68a57cef9","src/data.rs":"8a617cc57032092d65850eb27e00de687c80aea3299e839a1f58b42d0b35abf3","src/euc_jp.rs":"32047f5b540188c4cb19c07165f846b9786a09f18e315ed3e9bda1293dae52aa","src/euc_kr.rs":"9b25afc72d9378700eecfac58d55ad1c5946d6cd0ccde2c29c08200ef2de6bb9","src/gb18030.rs":"808587168d73f0c80f8520f0ca9b161866ed2efeb17a05e85fdf3b8efe7ba28a","src/handles.rs":"b08cef1f5785bb6a4822f2e844c6df1b046b737b7a075e4593eaa8c4208e9fe2","src/iso_2022_jp.rs":"9bb485e82574f4b7d4b2364f0ff276acb6a0bc111758420a3b0ec5e04c196652","src/lib.rs":"834f44b670ec48ee82c0e12223d1567313fdd9f88bca5f4b117c82c1828f559f","src/macros.rs":"200997f8870de8bfd8cdc475e92115df42108c0df661e49d3d1cbc32056e1d99","src/mem.rs":"948571137d3b151df8db4fb2c733e74ae595d055cdf0ad83abcab9341d6adabe","src/replacement.rs":"7660b34a53f8c1ca2bdfa0e51e843ec28326950952ad8bc96569feb93ac62308","src/shift_jis.rs":"6951ae67e36b1a12fa3a30734957f444d8b1b4ae0e2bde52060b29bd0f16d9d9","src/simd_funcs.rs":"05c6e77af74bfe73cd39a752067c11425d6b46e5da419910f54bf75a5c02a984","src/single_byte.rs":"3ad87116fb339434a4b58e8f2b15485f2b66b9f7814d708f16194ed08f6d6ccf","src/test_data/big5_in.txt":"4c5a8691f8dc717311889c63894026d2fb62725a86c4208ca274a9cc8d42a503","src/test_data/big5_in_ref.txt":"99d399e17750cf9c7cf30bb253dbfe35b81c4fcbdead93cfa48b1429213473c7","src/test_data/big5_out.txt":"6193ca97c297aa20e09396038d18e938bb7ea331c26f0f2454097296723a0b13","src/test_data/big5_out_ref.txt":"36567691f557df144f6cc520015a87038dfa156f296fcf103b56ae9a718be1fc","src/test_data/euc_kr_in.txt":"c86a7224f3215fa0d04e685622a752fdc72763e8ae076230c7fd62de57ec4074","src/test_data/euc_kr_in_ref.txt":"1f419f4ca47d708b54c73c461545a022ae2e20498fdbf8005a483d752a204883","src/test_data/euc_kr_out.txt":"e7f32e026f70be1e1b58e0047baf7d3d2c520269c4f9b9992e158b4decb0a1a3","src/test_data/euc_kr_out_ref.txt":"c9907857980b20b8e9e3b584482ed6567a2be6185d72237b6322f0404944924e","src/test_data/gb18030_in.txt":"ab7231b2d3e9afacdbd7d7f3b9e5361a7ff9f7e1cfdb4f3bd905b9362b309e53","src/test_data/gb18030_in_ref.txt":"dc5069421adca2043c55f5012b55a76fdff651d22e6e699fd0978f8d5706815c","src/test_data/gb18030_out.txt":"f0208d527f5ca63de7d9a0323be8d5cf12d8a104b2943d92c2701f0c3364dac1","src/test_data/gb18030_out_ref.txt":"6819fe47627e4ea01027003fc514b9f21a1322e732d7f1fb92cc6c5455bc6c07","src/test_data/iso_2022_jp_in.txt":"cd24bbdcb1834e25db54646fbf4c41560a13dc7540f6be3dba4f5d97d44513af","src/test_data/iso_2022_jp_in_ref.txt":"3dc4e6a5e06471942d086b16c9440945e78415f6f3f47e43717e4bc2eac2cdf5","src/test_data/iso_2022_jp_out.txt":"9b6f015329dda6c3f9ee5ce6dbd6fa9c89acc21283e886836c78b8d833480c21","src/test_data/iso_2022_jp_out_ref.txt":"78cb260093a20116ad9a42f43b05d1848c5ab100b6b9a850749809e943884b35","src/test_data/jis0208_in.txt":"6df3030553ffb0a6615bb33dc8ea9dca6d9623a9028e2ffec754ce3c3da824cc","src/test_data/jis0208_in_ref.txt":"3dc4e6a5e06471942d086b16c9440945e78415f6f3f47e43717e4bc2eac2cdf5","src/test_data/jis0208_out.txt":"4ec24477e1675ce750733bdc3c5add1cd27b6bd4ce1f09289564646e9654e857","src/test_data/jis0208_out_ref.txt":"c3e1cef5032b2b1d93a406f31ff940c4e2dfe8859b8b17ca2761fee7a75a0e48","src/test_data/jis0212_in.txt":"c011f0dd72bd7c8cd922df9374ef8d2769a77190514c77f6c62b415852eeb9fe","src/test_data/jis0212_in_ref.txt":"7d9458b3d2f73e7092a7f505c08ce1d233dde18aa679fbcf9889256239cc9e06","src/test_data/shift_jis_in.txt":"02e389ccef0dd2122e63f503899402cb7f797912c2444cc80ab93131116c5524","src/test_data/shift_jis_in_ref.txt":"512f985950ca902e643c88682dba9708b7c38d3c5ec2925168ab00ac94ab19f9","src/test_data/shift_jis_out.txt":"5fbc44da7bf639bf6cfe0fa1fd3eba7102b88f81919c9ea991302712f69426fb","src/test_data/shift_jis_out_ref.txt":"466322c6fed8286c64582731755290c2296508efdd258826e6279686649b481f","src/test_labels_names.rs":"23a2e11b02b3b8d15fb5613a625e3edb2c61e70e3c581abfd638719a4088200d","src/testing.rs":"f59e671e95a98a56f6b573e8c6be4d71e670bf52f7e20eb1605d990aafa1894e","src/utf_16.rs":"c071a147fad38d750c2c247e141b76b929a48007b99f26b2922b9caecdaf2f25","src/utf_8.rs":"7b7d887b347f1aefa03246b028a36a72758a4ce76c28f3b45c19467851aa7839","src/variant.rs":"1fab5363588a1554a7169de8731ea9cded7ac63ea35caabdd1c27a8dde68c27b","src/x_user_defined.rs":"9456ca46168ef86c98399a2536f577ef7be3cdde90c0c51392d8ac48519d3fae"},"package":"b45de904aa0b010bce2ab45264d0631681847fa7b6f2eaa7dab7619943bc4f59"} diff --git a/thunderbird-115.13.0-rustc-18-2.patch b/thunderbird-115.13.0-rustc-18-2.patch new file mode 100644 index 0000000..3cc46a2 --- /dev/null +++ b/thunderbird-115.13.0-rustc-18-2.patch @@ -0,0 +1,199 @@ +From cd10f3ba0d83f34ca978cc4c7a552b72fdd068aa Mon Sep 17 00:00:00 2001 +From: David Tolnay +Date: Tue, 28 Nov 2023 11:18:39 -0800 +Subject: [PATCH 1/2] Flatten cursor.kind() matching in Item::parse down to one + match + +--- + third_party/rust/bindgen/ir/item.rs | 84 ++++++++++++++++++++++------------------------ + 1 file changed, 41 insertions(+), 43 deletions(-) + +diff --git a/third_party/rust/bindgen/ir/item.rs b/third_party/rust/bindgen/ir/item.rs +index 0556452bfa..4f2d361e51 100644 +--- a/third_party/rust/bindgen/ir/item.rs ++++ b/third_party/rust/bindgen/ir/item.rs +@@ -1427,53 +1427,52 @@ + } + } + +- // Guess how does clang treat extern "C" blocks? +- if cursor.kind() == CXCursor_UnexposedDecl { +- Err(ParseError::Recurse) +- } else { ++ match cursor.kind() { ++ // Guess how does clang treat extern "C" blocks? ++ CXCursor_UnexposedDecl => Err(ParseError::Recurse), ++ + // We allowlist cursors here known to be unhandled, to prevent being + // too noisy about this. +- match cursor.kind() { +- CXCursor_MacroDefinition | +- CXCursor_MacroExpansion | +- CXCursor_UsingDeclaration | +- CXCursor_UsingDirective | +- CXCursor_StaticAssert | +- CXCursor_FunctionTemplate => { +- debug!( +- "Unhandled cursor kind {:?}: {:?}", +- cursor.kind(), +- cursor +- ); +- } +- CXCursor_InclusionDirective => { +- let file = cursor.get_included_file_name(); +- match file { +- None => { +- warn!( +- "Inclusion of a nameless file in {:?}", +- cursor +- ); +- } +- Some(filename) => { +- ctx.include_file(filename); +- } +- } +- } +- _ => { +- // ignore toplevel operator overloads +- let spelling = cursor.spelling(); +- if !spelling.starts_with("operator") { ++ CXCursor_MacroDefinition | ++ CXCursor_MacroExpansion | ++ CXCursor_UsingDeclaration | ++ CXCursor_UsingDirective | ++ CXCursor_StaticAssert | ++ CXCursor_FunctionTemplate => { ++ debug!( ++ "Unhandled cursor kind {:?}: {:?}", ++ cursor.kind(), ++ cursor ++ ); ++ Err(ParseError::Continue) ++ } ++ CXCursor_InclusionDirective => { ++ let file = cursor.get_included_file_name(); ++ match file { ++ None => { + warn!( +- "Unhandled cursor kind {:?}: {:?}", +- cursor.kind(), ++ "Inclusion of a nameless file in {:?}", + cursor + ); + } ++ Some(filename) => { ++ ctx.include_file(filename); ++ } + } ++ Err(ParseError::Continue) ++ } ++ _ => { ++ // ignore toplevel operator overloads ++ let spelling = cursor.spelling(); ++ if !spelling.starts_with("operator") { ++ warn!( ++ "Unhandled cursor kind {:?}: {:?}", ++ cursor.kind(), ++ cursor ++ ); ++ } ++ Err(ParseError::Continue) + } +- +- Err(ParseError::Continue) + } + } + + +From 2997017b5a3065b83e9d76f0080d6cb99c94c0c1 Mon Sep 17 00:00:00 2001 +From: David Tolnay +Date: Tue, 28 Nov 2023 11:21:18 -0800 +Subject: [PATCH 2/2] Handle CXCursor_LinkageSpec in Clang 18+ + +--- + third_party/rust/bindgen/ir/item.rs | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +diff --git a/third_party/rust/bindgen/ir/item.rs b/third_party/rust/bindgen/ir/item.rs +index 4f2d361e51..dd587b088b 100644 +--- a/third_party/rust/bindgen/ir/item.rs ++++ b/third_party/rust/bindgen/ir/item.rs +@@ -1433,8 +1433,11 @@ impl Item { + } + + match cursor.kind() { +- // Guess how does clang treat extern "C" blocks? +- CXCursor_UnexposedDecl => Err(ParseError::Recurse), ++ // On Clang 18+, extern "C" is reported accurately as a LinkageSpec. ++ // Older LLVM treat it as UnexposedDecl. ++ CXCursor_LinkageSpec | CXCursor_UnexposedDecl => { ++ Err(ParseError::Recurse) ++ } + + // We allowlist cursors here known to be unhandled, to prevent being + // too noisy about this. +diff --git a/dom/media/gmp-plugin-openh264/gmp-fake-openh264.cpp b/dom/media/gmp-plugin-openh264/gmp-fake-openh264.cpp +--- a/dom/media/gmp-plugin-openh264/gmp-fake-openh264.cpp ++++ b/dom/media/gmp-plugin-openh264/gmp-fake-openh264.cpp +@@ -97,11 +97,11 @@ + uint32_t width_; + uint32_t height_; + uint8_t y_; + uint8_t u_; + uint8_t v_; +- uint32_t timestamp_; ++ uint64_t timestamp_; + } idr_nalu; + }; + #pragma pack(pop) + + #define ENCODED_FRAME_MAGIC 0x004000b8 +diff --git a/dom/media/gtest/TestGMPRemoveAndDelete.cpp b/dom/media/gtest/TestGMPRemoveAndDelete.cpp +--- a/dom/media/gtest/TestGMPRemoveAndDelete.cpp ++++ b/dom/media/gtest/TestGMPRemoveAndDelete.cpp +@@ -359,11 +359,11 @@ + uint32_t width_; + uint32_t height_; + uint8_t y_; + uint8_t u_; + uint8_t v_; +- uint32_t timestamp_; ++ uint64_t timestamp_; + } idr_nalu; + }; + #pragma pack(pop) + + GMPVideoFrame* absFrame; +diff --git a/dom/media/webrtc/libwebrtcglue/WebrtcGmpVideoCodec.h b/dom/media/webrtc/libwebrtcglue/WebrtcGmpVideoCodec.h +--- a/dom/media/webrtc/libwebrtcglue/WebrtcGmpVideoCodec.h ++++ b/dom/media/webrtc/libwebrtcglue/WebrtcGmpVideoCodec.h +@@ -300,11 +300,11 @@ + + struct InputImageData { + int64_t timestamp_us; + }; + // Map rtp time -> input image data +- DataMutex> mInputImageMap; ++ DataMutex> mInputImageMap; + + MediaEventProducer mInitPluginEvent; + MediaEventProducer mReleasePluginEvent; + }; + +diff --git a/dom/media/webrtc/libwebrtcglue/WebrtcGmpVideoCodec.cpp b/dom/media/webrtc/libwebrtcglue/WebrtcGmpVideoCodec.cpp +--- a/dom/media/webrtc/libwebrtcglue/WebrtcGmpVideoCodec.cpp ++++ b/dom/media/webrtc/libwebrtcglue/WebrtcGmpVideoCodec.cpp +@@ -538,11 +538,11 @@ + return; + } + + webrtc::VideoFrameType ft; + GmpFrameTypeToWebrtcFrameType(aEncodedFrame->FrameType(), &ft); +- uint32_t timestamp = (aEncodedFrame->TimeStamp() * 90ll + 999) / 1000; ++ uint64_t timestamp = (aEncodedFrame->TimeStamp() * 90ll + 999) / 1000; + + GMP_LOG_DEBUG("GMP Encoded: %" PRIu64 ", type %d, len %d", + aEncodedFrame->TimeStamp(), aEncodedFrame->BufferType(), + aEncodedFrame->Size()); + + diff --git a/thunderbird-78.8.1-fix-passing-system-bzip2-ldflags.patch b/thunderbird-78.8.1-fix-passing-system-bzip2-ldflags.patch deleted file mode 100644 index 0fecdbd..0000000 --- a/thunderbird-78.8.1-fix-passing-system-bzip2-ldflags.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 9855927c896eaeecb21c1541942ee6d557144183 Mon Sep 17 00:00:00 2001 -From: anthraxx -Date: Sun, 8 Nov 2020 13:26:47 +0100 -Subject: [PATCH] configure: fix passing system bzip2 ldflags - ---- - comm/third_party/openpgp.configure | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/comm/third_party/openpgp.configure b/comm/third_party/openpgp.configure -index 2f9c796..2cbc907 100644 ---- a/comm/third_party/openpgp.configure -+++ b/comm/third_party/openpgp.configure -@@ -80,7 +80,7 @@ with only_when('--enable-compile-environment'): - if bzip2_pkg: - cflags = list(bzip2_pkg.cflags) - libs = bzip2_pkg.libs -- return namespace(cflags=cflags, libs=libs, path=(value[0]), ) -+ return namespace(cflags=cflags, ldflags=libs, ) - # Fallback - return namespace( - ldflags=['-lbz2'], --- -2.28.0 - diff --git a/thunderbird-78.8.1-rust-1.48.patch b/thunderbird-78.8.1-rust-1.48.patch deleted file mode 100644 index 2d0a026..0000000 --- a/thunderbird-78.8.1-rust-1.48.patch +++ /dev/null @@ -1,3940 +0,0 @@ - -# HG changeset patch -# User Henri Sivonen -# Date 1604046593 0 -# Node ID 632353012d05c8e71314d27edca945ce9c13f4ea -# Parent 2876425c75f75f638b41e8c6093e84b817938a9a -Bug 1667736 - Update packed_simd to compile on Rust 1.48. r=glandium - -Differential Revision: https://phabricator.services.mozilla.com/D91572 - ---- thunderbird-78.8.1/Cargo.toml.orig 2021-03-24 23:16:52.983487303 +0100 -+++ thunderbird-78.8.1/Cargo.toml 2021-03-24 23:17:31.686190876 +0100 -@@ -66,7 +66,7 @@ - - [patch.crates-io] - libudev-sys = { path = "dom/webauthn/libudev-sys" } --packed_simd = { git = "https://github.com/hsivonen/packed_simd", rev="3541e3818fdc7c2a24f87e3459151a4ce955a67a" } -+packed_simd = { git = "https://github.com/hsivonen/packed_simd", rev="0917fe780032a6bbb23d71be545f9c1834128d75" } - rlbox_lucet_sandbox = { git = "https://github.com/PLSysSec/rlbox_lucet_sandbox/", rev="d510da5999a744c563b0acd18056069d1698273f" } - nix = { git = "https://github.com/shravanrn/nix/", rev="4af6c367603869a30fddb5ffb0aba2b9477ba92e" } - spirv_cross = { git = "https://github.com/kvark/spirv_cross", branch = "wgpu3" } -diff --git a/.cargo/config.in b/.cargo/config.in ---- a/.cargo/config.in -+++ b/.cargo/config.in -@@ -45,7 +45,7 @@ rev = "21c26326f5f45f415c49eac4ba5bc41a2 - [source."https://github.com/hsivonen/packed_simd"] - git = "https://github.com/hsivonen/packed_simd" - replace-with = "vendored-sources" --rev = "3541e3818fdc7c2a24f87e3459151a4ce955a67a" -+rev = "0917fe780032a6bbb23d71be545f9c1834128d75" - - [source."https://github.com/djg/cubeb-pulse-rs"] - git = "https://github.com/djg/cubeb-pulse-rs" -diff --git a/Cargo.lock b/Cargo.lock ---- a/Cargo.lock -+++ b/Cargo.lock -@@ -3573,18 +3573,18 @@ version = "0.4.0" - source = "registry+https://github.com/rust-lang/crates.io-index" - checksum = "49a4b8ea2179e6a2e27411d3bca09ca6dd630821cf6894c6c7c8467a8ee7ef13" - dependencies = [ - "stable_deref_trait", - ] - - [[package]] - name = "packed_simd" --version = "0.3.3" --source = "git+https://github.com/hsivonen/packed_simd?rev=3541e3818fdc7c2a24f87e3459151a4ce955a67a#3541e3818fdc7c2a24f87e3459151a4ce955a67a" -+version = "0.3.4" -+source = "git+https://github.com/hsivonen/packed_simd?rev=0917fe780032a6bbb23d71be545f9c1834128d75#0917fe780032a6bbb23d71be545f9c1834128d75" - dependencies = [ - "cfg-if", - ] - - [[package]] - name = "parity-wasm" - version = "0.41.0" - source = "registry+https://github.com/rust-lang/crates.io-index" -diff --git a/third_party/rust/packed_simd/.cargo-checksum.json b/third_party/rust/packed_simd/.cargo-checksum.json ---- a/third_party/rust/packed_simd/.cargo-checksum.json -+++ b/third_party/rust/packed_simd/.cargo-checksum.json -@@ -1,1 +1,1 @@ --{"files":{".appveyor.yml":"f1ed01850e0d725f9498f52a1a63ddf40702ad6e0bf5b2d7c4c04d76e96794a3",".travis.yml":"e9258d9a54fdaf4cbc12405fe5993ac4497eb2b29021691dbc91b19cb9b52227","Cargo.toml":"089941ba3c89ea111cbea3cc3abdcdcf2b9d0ae0db268d7269ee38226db950e5","LICENSE-APACHE":"a60eea817514531668d7e00765731449fe14d059d3249e0bc93b36de45f759f2","LICENSE-MIT":"6485b8ed310d3f0340bf1ad1f47645069ce4069dcc6bb46c7d5c6faf41de1fdb","bors.toml":"dee881dc69b9b7834e4eba5d95c3ed5a416d4628815a167d6a22d4cb4fb064b8","build.rs":"f3baefc5e5bb9b250e762a1466371b922fd7ee4243c217b2d014307603c2f57a","ci/all.sh":"a23d14e10cb26a0eb719e389c30eb955fa53cddcd436890646df09af640bd2eb","ci/android-install-ndk.sh":"0f1746108cc30bf9b9ba45bcde7b19fc1a8bdf5b0258035b4eb8dc69b75efac4","ci/android-install-sdk.sh":"3490432022c5c8f5a115c084f7a9aca1626f96c0c87ffb62019228c4346b47e4","ci/android-sysimage.sh":"ebf4e5daa1f0fe1b2092b79f0f3f161c4c4275cb744e52352c4d81ab451e4c5a","ci/benchmark.sh":"b61d19ef6b90deba8fb79dee74c8b062d94844676293da346da87bb78a9a49a4","ci/deploy_and_run_on_ios_simulator.rs":"ec8ecf82d92072676aa47f0d1a3d021b60a7ae3531153ef12d2ff4541fc294dc","ci/docker/aarch64-linux-android/Dockerfile":"ace2e7d33c87bc0f6d3962a4a3408c04557646f7f51ab99cfbf574906796b016","ci/docker/aarch64-unknown-linux-gnu/Dockerfile":"1ecdac757101d951794fb2ab0deaa278199cf25f2e08a15c7d40ff31a8556184","ci/docker/arm-linux-androideabi/Dockerfile":"370e55d3330a413a3ccf677b3afb3e0ef9018a5fab263faa97ae8ac017fc2286","ci/docker/arm-unknown-linux-gnueabi/Dockerfile":"e25d88f6c0c94aada3d2e3f08243f755feb7e869dc5dc505b3799719cb1af591","ci/docker/arm-unknown-linux-gnueabihf/Dockerfile":"f126f4c7bae8c11ab8b16df06ad997863f0838825a9c08c9899a3eedb6d570bd","ci/docker/armv7-unknown-linux-gnueabihf/Dockerfile":"b647545c158ee480a4c581dbdc1f57833aef056c8d498acc04b573e842bf803c","ci/docker/i586-unknown-linux-gnu/Dockerfile":"0d492759017307ccf74dc2aa4a8cf6623daf3dc728c708dc2b18fa7940800cba","ci/docker/i686-unknown-linux-gnu/Dockerfile":"0d492759017307ccf74dc2aa4a8cf6623daf3dc728c708dc2b18fa7940800cba","ci/docker/mips-unknown-linux-gnu/Dockerfile":"323776469bb7b160385f3621d66e3ee14c75242f8180f916e65af048a29d4ea0","ci/docker/mips64-unknown-linux-gnuabi64/Dockerfile":"c647f6948a9a43b0be695cbed4eac752120d0faf28e5e69c718cb10406921dab","ci/docker/mips64el-unknown-linux-gnuabi64/Dockerfile":"77bfd00cc8639509be381b394f077e39b45a00158ad61b4e1656714c714665d1","ci/docker/mipsel-unknown-linux-musl/Dockerfile":"ec5bea6c98a3b626731fdb95f9ff2d1182639c76e8fb16d3271d0fc884901524","ci/docker/powerpc-unknown-linux-gnu/Dockerfile":"4f2b662de66e83d1354f650b7077692309637f786c2ea5516c31b5c2ee10af2d","ci/docker/powerpc64-unknown-linux-gnu/Dockerfile":"a9595402b772bc365982e22a0096a8988825d90b09b5faa97ab192e76072f71d","ci/docker/powerpc64le-unknown-linux-gnu/Dockerfile":"df3c381c157439695ae8cd10ab71664702c061e3b4ab22906a5ad6c2680acfed","ci/docker/s390x-unknown-linux-gnu/Dockerfile":"93fb44df3d7fd31ead158570667c97b5076a05c3d968af4a84bc13819a8f2db8","ci/docker/sparc64-unknown-linux-gnu/Dockerfile":"da1c39a3ff1fe22e41395fa7c8934e90b4c1788e551b9aec6e38bfd94effc437","ci/docker/thumbv7neon-linux-androideabi/Dockerfile":"c2decd5591bd7a09378901bef629cd944acf052eb55e4f35b79eb9cb4d62246a","ci/docker/thumbv7neon-unknown-linux-gnueabihf/Dockerfile":"75c0c56161c7382b439de74c00de1c0e3dc9d59560cd6720976a751034b78714","ci/docker/wasm32-unknown-unknown/Dockerfile":"3e5f294bc1e004aa599086c2af49d6f3e7459fa250f5fbdd60cf67d53db78758","ci/docker/x86_64-linux-android/Dockerfile":"685040273cf350d5509e580ac451555efa19790c8723ca2af066adadc6880ad2","ci/docker/x86_64-unknown-linux-gnu-emulated/Dockerfile":"44b6203d9290bfdc53d81219f0937e1110847a23dd982ec8c4de388354f01536","ci/docker/x86_64-unknown-linux-gnu/Dockerfile":"d253c86803b22da428fa9cc671a05f18d3318eca7733b8dccb4f7be1ddf524c5","ci/dox.sh":"5b61711be47a4e3dde0ddd15ba73d256ea95fd75af3897732c24db1dc7e66366","ci/linux-s390x.sh":"d6b732d7795b4ba131326aff893bca6228a7d2eb0e9402f135705413dbbe0dce","ci/linux-sparc64.sh":"c92966838b1ab7ad3b7a344833ee726aba6b647cf5952e56f0ad1ba420b13325","ci/lld-shim.rs":"3d7f71ec23a49e2b67f694a0168786f9a954dda15f5a138815d966643fd3fcc3","ci/max_line_width.sh":"0a1518bba4c9ecaa55694cb2e9930d0e19c265baabf73143f17f9cf285aaa5bb","ci/run-docker.sh":"92e036390ad9b0d16f109579df1b5ced2e72e9afea40c7d011400ebd3a2a90de","ci/run.sh":"63259e22a96ba539f53c06b1b39f53e3a78a71171652e7afc170836110ccd913","ci/run_examples.sh":"d1a23c6c35374a0678ba5114b9b8fefd8be0a79e774872a8bf0898d1baca18d0","ci/runtest-android.rs":"145a8e9799a5223975061fe7e586ade5669ee4877a7d7a4cf6b4ab48e8e36c7c","ci/setup_benchmarks.sh":"73fb981a8fdb1dcd54409d3c0fbbfb8f77a3ceabf8626a6b9bf9d21d6bc8ce72","ci/test-runner-linux":"c8aa6025cff5306f4f31d0c61dc5f9d4dd5a1d189ab613ef8d4c367c694d9ccd","contributing.md":"2cc8c9c560ae17867e69b06d09b758dbf7bc39eb774ada50a743724b10acc0a2","perf-guide/.gitignore":"fe82c7da551079d832cf74200b0b359b4df9828cb4a0416fa7384f07a2ae6a13","perf-guide/book.toml":"115a98284126c6b180178b44713314cc494f08a71662ee2ce15cf67f17a51064","perf-guide/src/SUMMARY.md":"3e03bffc991fdc2050f3d51842d72d9d21ea6abab56a3baf3b2d5973a78b89e1","perf-guide/src/ascii.css":"29afb08833b2fe2250f0412e1fa1161a2432a0820a14953c87124407417c741a","perf-guide/src/bound_checks.md":"5e4991ff58a183ef0cd9fdc1feb4cd12d083b44bdf87393bbb0927808ef3ce7d","perf-guide/src/float-math/approx.md":"8c09032fa2d795a0c5db1775826c850d28eb2627846d0965c60ee72de63735ad","perf-guide/src/float-math/fma.md":"311076ba4b741d604a82e74b83a8d7e8c318fcbd7f64c4392d1cf5af95c60243","perf-guide/src/float-math/fp.md":"04153e775ab6e4f0d7837bcc515230d327b04edfa34c84ce9c9e10ebaeef2be8","perf-guide/src/float-math/svml.md":"0798873b8eedaeda5fed62dc91645b57c20775a02d3cd74d8bd06958f1516506","perf-guide/src/introduction.md":"9f5a19e9e6751f25d2daad39891a0cc600974527ec4c8305843f9618910671bd","perf-guide/src/prof/linux.md":"447731eb5de7d69166728fdbc5ecb0c0c9db678ea493b45a592d67dd002184c0","perf-guide/src/prof/mca.md":"f56d54f3d20e7aa4d32052186e8237b03d65971eb5d112802b442570ff11d344","perf-guide/src/prof/profiling.md":"8a650c0fd6ede0964789bb6577557eeef1d8226a896788602ce61528e260e43c","perf-guide/src/target-feature/attribute.md":"615f88dca0a707b6c416fa605435dd6e1fb5361cc639429cbf68cd87624bd78b","perf-guide/src/target-feature/features.md":"17077760ff24c006b606dd21889c53d87228f4311f3ba3a574f9afdeacd86165","perf-guide/src/target-feature/inlining.md":"7ed1d7068d8173a00d84c16cfe5871cd68b9f04f8d0cca2d01ebc84957ebf2f6","perf-guide/src/target-feature/practice.md":"c4b371842e0086df178488fec97f20def8f0c62ee588bcd25fd948b9b1fa227e","perf-guide/src/target-feature/runtime.md":"835425f5ee597fb3e51d36e725a81ebee29f4561231d19563cd4da81dbb1cfcb","perf-guide/src/target-feature/rustflags.md":"ab49712e9293a65d74d540ba4784fcb57ff1119ec05a575d895c071f1a620f64","perf-guide/src/vert-hor-ops.md":"c6211c0ee91e60552ec592d89d9d957eedc21dee3cbd89e1ad6765ea06a27471","readme.md":"585a8f0e16877fb9abb00cd17a175fcb9d7857840c6c61209f1827ffab095070","rustfmt.toml":"de6101d0670bad65fb3b337d56957d2a024e017e5ab146ec784d77312daaf8ff","src/api.rs":"331a3a4abb19cee2df5f2df4ad7c3e88b45e62cf23fdacfc9bbaa633dc5cf788","src/api/bit_manip.rs":"e68290ee679cc5abc9c73afbe635c1035f8cbfe849e5c751a1680e459244c39e","src/api/cast.rs":"03b94a3d316ac7b7be7068810044911e965e889a0ace7bae762749ca74a92747","src/api/cast/macros.rs":"b0a14d0c83ad2ebb7a275180f6d9e3f2bc312ba57a7d3d6c39fad4e0f20f9408","src/api/cast/v128.rs":"63e28c6a3edf1a7a635f51b8d3c6adbb1d46f884d92a196b3d4a6e743d809416","src/api/cast/v16.rs":"2a584eeb57fd47baad6f3533764301b04aaaac23702b7a8db12598ac02899262","src/api/cast/v256.rs":"b91c15ed8d1536ecd97b4eb79ff9d5aba0552cd9b6f0ea6435b05f2273e23b3a","src/api/cast/v32.rs":"62ec89fcce7fa7f28497ee5770adc8f81d2d3a6b2925b02f7dc06504c40e8f38","src/api/cast/v512.rs":"d855cb943ae7106e9599ef38e30a3afb1c6bd5433178baca54cb128fd9a7d143","src/api/cast/v64.rs":"fe0f7dfaf4fc0c0c1a78c96fcfcdfdc2a1e2845843b11aa797a0c6fb52a8f774","src/api/cmp.rs":"357c3a2a09c6d4611c32dd7fa95be2fae933d513e229026ec9b44451a77b884e","src/api/cmp/eq.rs":"60f70f355bae4cb5b17db53204cacc3890f70670611c17df638d4c04f7cc8075","src/api/cmp/ord.rs":"589f7234761c294fa5df8f525bc4acd5a47cdb602207d524a0d4e19804cd9695","src/api/cmp/partial_eq.rs":"3ed23d2a930b0f9750c3a5309da766b03dc4f9c4d375b42ad3c50fe732693d15","src/api/cmp/partial_ord.rs":"e16b11805c94048acd058c93994b5bc74bb187f8d7e3b86a87df60e1601467f9","src/api/cmp/vertical.rs":"de3d62f38eba817299aa16f1e1939954c9a447e316509397465c2830852ba053","src/api/default.rs":"b61f92fc0e33a2633b3375eb405beba480da071cde03df4d437d8a6058afcd97","src/api/fmt.rs":"67fb804bb86b6cd77cf8cd492b5733ce437071b66fe3297278b8a6552c325dda","src/api/fmt/binary.rs":"35cb5c266197d6224d598fb3d286e5fe48ef0c01ed356c2ff6fe9ba946f96a92","src/api/fmt/debug.rs":"aa18eea443bf353fea3db8b1a025132bbcaf91e747ecfa43b8d9fce9af395a0c","src/api/fmt/lower_hex.rs":"69d5be366631af309f214e8031c8c20267fcc27a695eac6f45c6bc1df72a67e6","src/api/fmt/octal.rs":"9eb11ba3d990213f3c7f1ec25edba7ce997cb1320e16d308c83498ba6b9bfbd9","src/api/fmt/upper_hex.rs":"a4637d085b7bb20e759ce58e08435b510a563ba3dd468af2b03560fdc5511562","src/api/from.rs":"2e599d8329cb05eaf06224cc441355c4b7b51254fc19256619333be8c149d444","src/api/from/from_array.rs":"4151593c7bba7455821fffa5b59867005a77c95d32f1f0cc3fd87294000157d9","src/api/from/from_vector.rs":"9764371aa9e6005aace74dea14f59e5611a095b7cf42707940924749282c52f0","src/api/hash.rs":"562cfa3f1d8eb9a733c035a3665a599c2f1e341ee820d8fbdd102a4398a441bc","src/api/into_bits.rs":"82297f0697d67b5a015e904e7e6e7b2a7066ba825bc54b94b4ff3e22d7a1eefb","src/api/into_bits/arch_specific.rs":"1f925390b0ce7132587d95f2419c6e2ad3e1a9d17eb1d9c120a1c1c4bdf4277e","src/api/into_bits/macros.rs":"d762406de25aedff88d460dec7a80dc8e825a2a419d53218ce007efa6a1d3e04","src/api/into_bits/v128.rs":"ecdc5893664c71d7ab1ff3697c3fbe490d20d8748b9b76881d05e7625e40d74c","src/api/into_bits/v16.rs":"5459ec7dad1ad7bd30dc7e48374580b993abf23701d9c3cb22203fa0a9aabb6d","src/api/into_bits/v256.rs":"90ea351da0380ead1bf0f63b620afd40d01d638d09f7e7be31840bd2c1d9c663","src/api/into_bits/v32.rs":"ee1dc5a430050e16f51154b5fe85b1536f5feddf2ea23dd1d3859b67c4afc6fc","src/api/into_bits/v512.rs":"f72098ed1c9a23944f3d01abaf5e0f2d0e81d35a06fdadd2183e896d41b59867","src/api/into_bits/v64.rs":"6394462facdfe7827349c742b7801f1291e75a720dfb8c0b52100df46f371c98","src/api/math.rs":"8b2a2fc651917a850539f993aa0b9e5bf4da67b11685285b8de8cdca311719ec","src/api/math/float.rs":"61d2794d68262a1090ae473bd30793b5f65cf732f32a6694a3af2ce5d9225616","src/api/math/float/abs.rs":"5b6b2701e2e11135b7ce58a05052ea8120e10e4702c95d046b9d21b827b26bf8","src/api/math/float/consts.rs":"78acba000d3fa527111300b6327c1932de9c4c1e02d4174e1a5615c01463d38c","src/api/math/float/cos.rs":"4c2dd7173728ef189314f1576c9486e03be21b7da98843b2f9011282a7979e31","src/api/math/float/exp.rs":"7c6d5f1e304f498a01cfa23b92380c815d7da0ad94eae3483783bc377d287eef","src/api/math/float/ln.rs":"54c7583f3df793b39ff57534fade27b41bb992439e5dc178252f5ca3190a3e54","src/api/math/float/mul_add.rs":"62cac77660d20159276d4c9ef066eb90c81cbddb808e8e157182c607625ad2eb","src/api/math/float/mul_adde.rs":"bae056ee9f3a70df39ec3c3b2f6437c65303888a7b843ef1a5bcf1f5aca0e602","src/api/math/float/powf.rs":"9ddb938984b36d39d82a82f862f80df8f7fb013f1d222d45698d41d88472f568","src/api/math/float/recpre.rs":"589225794ff1dbf31158dff660e6d4509ecc8befbb57c633900dea5ac0b840d6","src/api/math/float/rsqrte.rs":"a32abdcc318d7ccc8448231f54d75b884b7cbeb03a7d595713ab6243036f4dbf","src/api/math/float/sin.rs":"cbd3622b7df74f19691743001c8cf747a201f8977ad90542fee915f37dcd1e49","src/api/math/float/sqrt.rs":"0c66d5d63fb08e4d99c6b82a8828e41173aff1ac9fa1a2764a11fac217ccf2ac","src/api/math/float/sqrte.rs":"731e1c9f321b662accdd27dacb3aac2e8043b7aecb2f2161dde733bd9f025362","src/api/minimal.rs":"1f22bcc528555444e76de569ec0ae2029b9ae9d04805efeafa93369c8098036b","src/api/minimal/iuf.rs":"c501a6696950cf5e521765f178de548af64fdfb6e10d026616d09fab93ca2d17","src/api/minimal/mask.rs":"42e415f536c5193d0218f5a754b34b87fd7c971bff068009f958712166ff056d","src/api/minimal/ptr.rs":"a9ee482d1dd1c956fb8f3f179e6e620b1de4e9d713961461d4c6923a4ef2e67c","src/api/ops.rs":"3e273b277a0f3019d42c3c59ca94a5afd4885d5ae6d2182e5089bbeec9de42ee","src/api/ops/scalar_arithmetic.rs":"d2d5ad897a59dd0787544f927e0e7ca4072c3e58b0f4a2324083312b0d5a21d7","src/api/ops/scalar_bitwise.rs":"482204e459ca6be79568e1c9f70adbe2d2151412ddf122fb2161be8ebb51c40c","src/api/ops/scalar_mask_bitwise.rs":"c250f52042e37b22d57256c80d4604104cfd2fbe2a2e127c676267270ca5d350","src/api/ops/scalar_shifts.rs":"987f8fdebeedc16e3d77c1b732e7826ef70633c541d16dfa290845d5c6289150","src/api/ops/vector_arithmetic.rs":"ddca15d09ddeef502c2ed66117a62300ca65d87e959e8b622d767bdf1c307910","src/api/ops/vector_bitwise.rs":"b3968f7005b649edcc22a54e2379b14d5ee19045f2e784029805781ae043b5ee","src/api/ops/vector_float_min_max.rs":"f5155dce75219f4ba11275b1f295d2fdcddd49d174a6f1fb2ace7ea42813ce41","src/api/ops/vector_int_min_max.rs":"a378789c6ff9b32a51fbd0a97ffd36ed102cd1fe6a067d2b02017c1df342def6","src/api/ops/vector_mask_bitwise.rs":"5052d18517d765415d40327e6e8e55a312daaca0a5e2aec959bfa54b1675f9c8","src/api/ops/vector_neg.rs":"5c62f6b0221983cdbd23cd0a3af3672e6ba1255f0dfe8b19aae6fbd6503e231b","src/api/ops/vector_rotates.rs":"03cbe8a400fd7c688e4ee771a990a6754f2031b1a59b19ae81158b21471167e5","src/api/ops/vector_shifts.rs":"9bf69d0087268f61009e39aea52e03a90f378910206b6a28e8393178b6a5d0e0","src/api/ptr.rs":"8a793251bed6130dcfb2f1519ceaa18b751bbb15875928d0fb6deb5a5e07523a","src/api/ptr/gather_scatter.rs":"9ddd960365e050674b25b2fd3116e24d94669b4375d74e71c03e3f1469576066","src/api/reductions.rs":"ae5baca81352ecd44526d6c30c0a1feeda475ec73ddd3c3ec6b14e944e5448ee","src/api/reductions/bitwise.rs":"8bf910ae226188bd15fc7e125f058cd2566b6186fcd0cd8fd020f352c39ce139","src/api/reductions/float_arithmetic.rs":"e58c8c87806a95df2b2b5b48ac5991036df024096d9d7c171a480fe9282896a4","src/api/reductions/integer_arithmetic.rs":"47471da1c5f859489680bb5d34ced3d3aa20081c16053a3af121a4496fcb57bf","src/api/reductions/mask.rs":"db83327a950e33a317f37fd33ca4e20c347fb415975ec024f3e23da8509425af","src/api/reductions/min_max.rs":"f27be3aa28e1c1f46de7890198db6e12f00c207085e89ef2de7e57ee443cdb98","src/api/select.rs":"a98e2ccf9fc6bdeed32d337c8675bc96c2fbe2cc34fbf149ad6047fb8e749774","src/api/shuffle.rs":"da58200790868c09659819322a489929a5b6e56c596ed07e6a44293ea02e7d09","src/api/shuffle1_dyn.rs":"bfea5a91905b31444e9ef7ca6eddb7a9606b7e22d3f71bb842eb2795a0346620","src/api/slice.rs":"ee87484e8af329547b9a5d4f2a69e8bed6ea10bbd96270d706083843d4eea2ac","src/api/slice/from_slice.rs":"4d4fe8a329c885fcb4fbcbedf99efb15a95296fe6b3f595056cc37037450d5ac","src/api/slice/write_to_slice.rs":"f5b23b2c4b91cfb26b713a9013a6c0da7f45eaefb79ba06dcbc27f3f23bda679","src/api/swap_bytes.rs":"4a6792a2e49a77475e1b237592b4b2804dbddb79c474331acd0dd71b36934259","src/codegen.rs":"c6eebc3d3665420aa6a2f317977e3c41a4f43e0550ac630cdbe8e4bbed5e2031","src/codegen/bit_manip.rs":"5559e095105a80003e0de35af1d19b0c65c9ab04eb743c7e01c5442d882eb34e","src/codegen/llvm.rs":"d1299c189abb17a6133f047574cffc7a6db4c1be37cb7d4785491cb5e8f8cf54","src/codegen/math.rs":"35f96e37a78fcf0cdb02146b7f27a45108fe06a37fc2a54d8851ce131a326178","src/codegen/math/float.rs":"dd86c0449e576c83b719700962ac017c332987fac08d91f2b7a2b1b883598170","src/codegen/math/float/abs.rs":"f56e2b4b8055ea861c1f5cbc6b6e1d8e7e5af163b62c13574ddee4e09513bfbc","src/codegen/math/float/cos.rs":"ef3b511a24d23045b310315e80348a9b7fedb576fc2de52d74290616a0abeb2a","src/codegen/math/float/cos_pi.rs":"4e7631a5d73dac21531e09ef1802d1180f8997509c2c8fa9f67f322194263a97","src/codegen/math/float/exp.rs":"61b691598c41b5622f24e4320c1bdd08701e612a516438bdddcc728fc3405c8c","src/codegen/math/float/ln.rs":"46b718b1ba8c9d99e1ad40f53d20dfde08a3063ca7bd2a9fdd6698e060da687e","src/codegen/math/float/macros.rs":"dd42135fff13f9aca4fd3a1a4e14c7e6c31aadc6d817d63b0d2fb9e62e062744","src/codegen/math/float/mul_add.rs":"a37bf764345d4b1714f97e83897b7cf0855fc2811704bcbc0012db91825339e1","src/codegen/math/float/mul_adde.rs":"c75702bfcb361de45964a93caf959a695ef2376bd069227600b8c6872665c755","src/codegen/math/float/powf.rs":"642346e982bc4c39203de0864d2149c4179cd7b21cf67a2951687932b4675872","src/codegen/math/float/sin.rs":"9d68164c90cdca6a85155040cdac42e27342ebe0b925273ef1593df721af4258","src/codegen/math/float/sin_cos_pi.rs":"9be02ad48585a1e8d99129382fbffbaed47852f15459256a708850b6b7a75405","src/codegen/math/float/sin_pi.rs":"9890347905b4d4a3c7341c3eb06406e46e60582bcf6960688bd727e5dadc6c57","src/codegen/math/float/sqrt.rs":"e3c60dcfb0c6d2fc62adabcc931b2d4040b83cab294dea36443fb4b89eb79e34","src/codegen/math/float/sqrte.rs":"f0f4ef9eb475ae41bcc7ec6a95ad744ba6b36925faa8b2c2814004396d196b63","src/codegen/pointer_sized_int.rs":"a70697169c28218b56fd2e8d5353f2e00671d1150d0c8cef77d613bdfacd84cb","src/codegen/reductions.rs":"645e2514746d01387ddd07f0aa4ffd8430cc9ab428d4fb13773ea319fa25dd95","src/codegen/reductions/mask.rs":"8f1afe6aabf096a3278e1fc3a30f736e04aa8b9ce96373cee22162d18cfe2702","src/codegen/reductions/mask/aarch64.rs":"cba6e17603d39795dcfe8339b6b7d8714c3e162a1f0a635979f037aa24fe4206","src/codegen/reductions/mask/arm.rs":"9447904818aa2c7c25d0963eead452a639a11ca7dbd6d21eedbfcaade07a0f33","src/codegen/reductions/mask/fallback.rs":"7a0ef9f7fd03ae318b495b95e121350cd61caffc5cc6ee17fabf130d5d933453","src/codegen/reductions/mask/fallback_impl.rs":"76547f396e55ef403327c77c314cf8db8c7a5c9b9819bfb925abeacf130249e5","src/codegen/reductions/mask/x86.rs":"14bd2c482071f2355beebcf7b7ecf950ff2dfcdb08c3ca50993092434a9de717","src/codegen/reductions/mask/x86/avx.rs":"b4913d87844c522903641cbbf10db4551addb1ce5e9e78278e21612fa65c733b","src/codegen/reductions/mask/x86/avx2.rs":"677aed3f056285285daa3adff8bc65e739630b4424defa6d9665e160f027507e","src/codegen/reductions/mask/x86/sse.rs":"226610b4ff88c676d5187114dd57b4a8800de6ce40884675e9198445b1ed0306","src/codegen/reductions/mask/x86/sse2.rs":"bc38e6c31cb4b3d62147eba6cac264e519e2a48e0f7ce9010cfa9ef0cf0ec9fd","src/codegen/shuffle.rs":"0abca97e92cdce49a58a39cc447eb09dc7d7715ef256c8dbd2181a186e61bb64","src/codegen/shuffle1_dyn.rs":"04523e9338133bdedb012dd076c2c564b79ce5593b0fc56d0fb6910e04190a81","src/codegen/swap_bytes.rs":"1d6cdc716eadddc92b4fd506b2445a821caa8dc00860447de09d7ebd69c2087f","src/codegen/v128.rs":"94226b31ec403d18d9d2fe06713f147c9c79e9b5f9105089088266313f843185","src/codegen/v16.rs":"ddec4ffb66b6f7aaffb9a1780c5ddba82557abd74f45073d335047e04cf74924","src/codegen/v256.rs":"6b63917f0444118d6b1595bff2045e59b97c4d24012bd575f69f1f0efc5a0241","src/codegen/v32.rs":"3477b3c5540aed86e61e2f5807dd31db947413cec9181c587d93ed6ec74f0eba","src/codegen/v512.rs":"5854f99d3aabc4cd42b28a20d9ce447756dc2ba024a409a69b6a8ae1f1842fc5","src/codegen/v64.rs":"e9e89caebfe63d10c0cbca61e4dfdba3b7e02ee0989170f80beed23237ddd950","src/codegen/vPtr.rs":"96d609a9eece4dcbbcc01ba0b8744d7f5958be12774176a2945bc676f4e6b5cb","src/codegen/vSize.rs":"eeee9858749aa82142b27bc120d1989bb74a6b82e1e4efbbeaccc9634dc9acfc","src/lib.rs":"1b5d419ff05ee0370d671810423ccc254708cc8d415c1dbac2a7a36be4bf63a8","src/masks.rs":"870f429967b2d7d5133f4d28d6c753fc5cef0570b27b29d4e966a066d22d2d0e","src/sealed.rs":"ff7f0324276408ae8249941cfa32c90b8835a54d750896b683efea857af19db2","src/testing.rs":"1d3a7862ef625e235a5734ad7204e68d350f902c0695182b1f08a0552432416e","src/testing/macros.rs":"6378856d7a40ba5ec5c7c0dad6327d79f0c77266921c24296d10aed6c68e9b98","src/testing/utils.rs":"d6fd5a5017f1f85d9d99585754f8f6ad06fc3d683b34083543e67a7cc6c1772c","src/v128.rs":"18fe263c4aa28cd06461c7070b0269f69f4a2e75749b8f142a83dfdfe4d22bf5","src/v16.rs":"e5c663c9fb3547eaeac78a5f7db9969f4d8b5ec96112bf2954602fff11f0aebd","src/v256.rs":"68732cd688ad12a56d8b4f8ddf279f77bdfe1be2943c7dc0c1b4f1a76798aa0f","src/v32.rs":"785b22a1ccb4a41bb53dfeb0670f624c0ce42e6cdf62d1747e3283777a1c70bd","src/v512.rs":"d1337bfe07f06a8f37f8e8fa7d4315b9307476ee435ad80dd5269eaed564fbfa","src/v64.rs":"3077468d65125b8f085e9454c8b2463a4d5225697464ba6a1300f8799528fd4b","src/vPtr.rs":"c9a53f41f466e17b6648a4ce390fd8f4d3a848d440eb8a9a803a11608d76eb05","src/vSize.rs":"5c46d3e8c3ee5863d9b6e37e681f871386e0efc254d6d84ba711edb529ce7b3c","tests/endianness.rs":"541a144be017e3dd7da7c8ea49d907dc02538245e8c5f3deb5bd43da92c929e1"},"package":null} -\ No newline at end of file -+{"files":{".appveyor.yml":"f1ed01850e0d725f9498f52a1a63ddf40702ad6e0bf5b2d7c4c04d76e96794a3",".travis.yml":"d56de6531d3c4880e3aada85ac8e6d7388e5d781871e181cb8ade2a746d5d5f5","Cargo.toml":"e94ccb82002e8b55680c2c5fec554a9e864c5f354e113278d0aa927df279330d","LICENSE-APACHE":"a60eea817514531668d7e00765731449fe14d059d3249e0bc93b36de45f759f2","LICENSE-MIT":"6485b8ed310d3f0340bf1ad1f47645069ce4069dcc6bb46c7d5c6faf41de1fdb","README.md":"49d01e49a33393af64fa6c813b6a724f68a4d1abfbedcb96413651ed105aa820","bors.toml":"dee881dc69b9b7834e4eba5d95c3ed5a416d4628815a167d6a22d4cb4fb064b8","build.rs":"c3312e786c7fcb8f16c0785fe235ebbcf43fbeab6d7d683752f62043ca92d887","ci/all.sh":"2ae6b2445b4db83833e40b37efd0016c6b9879ee988b9b3ef94db5439a3e1606","ci/android-install-ndk.sh":"0f1746108cc30bf9b9ba45bcde7b19fc1a8bdf5b0258035b4eb8dc69b75efac4","ci/android-install-sdk.sh":"3490432022c5c8f5a115c084f7a9aca1626f96c0c87ffb62019228c4346b47e4","ci/android-sysimage.sh":"ebf4e5daa1f0fe1b2092b79f0f3f161c4c4275cb744e52352c4d81ab451e4c5a","ci/benchmark.sh":"b61d19ef6b90deba8fb79dee74c8b062d94844676293da346da87bb78a9a49a4","ci/deploy_and_run_on_ios_simulator.rs":"ec8ecf82d92072676aa47f0d1a3d021b60a7ae3531153ef12d2ff4541fc294dc","ci/docker/aarch64-linux-android/Dockerfile":"ace2e7d33c87bc0f6d3962a4a3408c04557646f7f51ab99cfbf574906796b016","ci/docker/aarch64-unknown-linux-gnu/Dockerfile":"da88c0d50f16dc08448c7fdf1fa5ed2cbe576acf9e7dd85b5b818621b2a8c702","ci/docker/arm-linux-androideabi/Dockerfile":"370e55d3330a413a3ccf677b3afb3e0ef9018a5fab263faa97ae8ac017fc2286","ci/docker/arm-unknown-linux-gnueabi/Dockerfile":"bb5f8ae890707c128652290ffc544447643bf12037ddd73c6ad6989f848cb380","ci/docker/arm-unknown-linux-gnueabihf/Dockerfile":"1afaefcbc05b740859acd4e067bc92439be6bcbe8f2e9678474fb434bcd398d9","ci/docker/armv7-unknown-linux-gnueabihf/Dockerfile":"8282ea707a94109beed47a57574755e2d58401735904a03f85fb64c578c53b4f","ci/docker/i586-unknown-linux-gnu/Dockerfile":"49792922269f371bd29da4727e9085101b27be67a6b97755d0196c63317f7abb","ci/docker/i686-unknown-linux-gnu/Dockerfile":"49792922269f371bd29da4727e9085101b27be67a6b97755d0196c63317f7abb","ci/docker/mips-unknown-linux-gnu/Dockerfile":"b2ebc25797612c4f8395fe9d407725156044955bfbcf442036b7f55b43a5f9da","ci/docker/mips64-unknown-linux-gnuabi64/Dockerfile":"b0c1692ac65bc56dd30494b1993d8e929c48cc9c4b92029b7c7592af6d4f9220","ci/docker/mips64el-unknown-linux-gnuabi64/Dockerfile":"4e9249c179300138141d0b2b7401b11897f64aed69f541f078c1db4594df2827","ci/docker/mipsel-unknown-linux-musl/Dockerfile":"3164c52b0dcbb01afa78292b15b5c43503ccf0491cf6eb801ec2bf22ae274e52","ci/docker/powerpc-unknown-linux-gnu/Dockerfile":"786f799d0b56eb54d7b6c4b00e1aed4ce81776e14e44767e083c89d014b72004","ci/docker/powerpc64-unknown-linux-gnu/Dockerfile":"e8bc363837cd9c2d8b22402acb8c1c329efc11ba5d12170603d2fe2eae9da059","ci/docker/powerpc64le-unknown-linux-gnu/Dockerfile":"47998d45b781d797b9e6085ebe898d90de0c952b54537a8db4e8d7503eb032d9","ci/docker/s390x-unknown-linux-gnu/Dockerfile":"93fb44df3d7fd31ead158570667c97b5076a05c3d968af4a84bc13819a8f2db8","ci/docker/sparc64-unknown-linux-gnu/Dockerfile":"da1c39a3ff1fe22e41395fa7c8934e90b4c1788e551b9aec6e38bfd94effc437","ci/docker/thumbv7neon-linux-androideabi/Dockerfile":"c2decd5591bd7a09378901bef629cd944acf052eb55e4f35b79eb9cb4d62246a","ci/docker/thumbv7neon-unknown-linux-gnueabihf/Dockerfile":"51955a8bf3c4d440f47382af6f5426ebff94ab01a04da36175babda9a057740f","ci/docker/wasm32-unknown-unknown/Dockerfile":"3e5f294bc1e004aa599086c2af49d6f3e7459fa250f5fbdd60cf67d53db78758","ci/docker/x86_64-linux-android/Dockerfile":"685040273cf350d5509e580ac451555efa19790c8723ca2af066adadc6880ad2","ci/docker/x86_64-unknown-linux-gnu-emulated/Dockerfile":"44b6203d9290bfdc53d81219f0937e1110847a23dd982ec8c4de388354f01536","ci/docker/x86_64-unknown-linux-gnu/Dockerfile":"7f4e3ca5fa288ea70edb4d1f75309708cd30b192e2e4444e61c4d5b3b58f89cf","ci/dox.sh":"434e9611c52e389312d2b03564adf09429f10cc76fe66a8644adb104903b87b7","ci/linux-s390x.sh":"d6b732d7795b4ba131326aff893bca6228a7d2eb0e9402f135705413dbbe0dce","ci/linux-sparc64.sh":"c92966838b1ab7ad3b7a344833ee726aba6b647cf5952e56f0ad1ba420b13325","ci/lld-shim.rs":"3d7f71ec23a49e2b67f694a0168786f9a954dda15f5a138815d966643fd3fcc3","ci/max_line_width.sh":"0a1518bba4c9ecaa55694cb2e9930d0e19c265baabf73143f17f9cf285aaa5bb","ci/run-docker.sh":"92e036390ad9b0d16f109579df1b5ced2e72e9afea40c7d011400ebd3a2a90de","ci/run.sh":"41dd6a60efaaeae9661a01370cce98b631f78392859a0cf68c946c0a16edf5f7","ci/run_examples.sh":"d1a23c6c35374a0678ba5114b9b8fefd8be0a79e774872a8bf0898d1baca18d0","ci/runtest-android.rs":"145a8e9799a5223975061fe7e586ade5669ee4877a7d7a4cf6b4ab48e8e36c7c","ci/setup_benchmarks.sh":"fae3960023f6f3d1388cd2ad22fdbab4b075f1f29dd4292d7994a20783beb6cf","ci/test-runner-linux":"c8aa6025cff5306f4f31d0c61dc5f9d4dd5a1d189ab613ef8d4c367c694d9ccd","contributing.md":"2cc8c9c560ae17867e69b06d09b758dbf7bc39eb774ada50a743724b10acc0a2","perf-guide/.gitignore":"fe82c7da551079d832cf74200b0b359b4df9828cb4a0416fa7384f07a2ae6a13","perf-guide/book.toml":"115a98284126c6b180178b44713314cc494f08a71662ee2ce15cf67f17a51064","perf-guide/src/SUMMARY.md":"3e03bffc991fdc2050f3d51842d72d9d21ea6abab56a3baf3b2d5973a78b89e1","perf-guide/src/ascii.css":"29afb08833b2fe2250f0412e1fa1161a2432a0820a14953c87124407417c741a","perf-guide/src/bound_checks.md":"5e4991ff58a183ef0cd9fdc1feb4cd12d083b44bdf87393bbb0927808ef3ce7d","perf-guide/src/float-math/approx.md":"8c09032fa2d795a0c5db1775826c850d28eb2627846d0965c60ee72de63735ad","perf-guide/src/float-math/fma.md":"311076ba4b741d604a82e74b83a8d7e8c318fcbd7f64c4392d1cf5af95c60243","perf-guide/src/float-math/fp.md":"04153e775ab6e4f0d7837bcc515230d327b04edfa34c84ce9c9e10ebaeef2be8","perf-guide/src/float-math/svml.md":"0798873b8eedaeda5fed62dc91645b57c20775a02d3cd74d8bd06958f1516506","perf-guide/src/introduction.md":"9f5a19e9e6751f25d2daad39891a0cc600974527ec4c8305843f9618910671bd","perf-guide/src/prof/linux.md":"447731eb5de7d69166728fdbc5ecb0c0c9db678ea493b45a592d67dd002184c0","perf-guide/src/prof/mca.md":"f56d54f3d20e7aa4d32052186e8237b03d65971eb5d112802b442570ff11d344","perf-guide/src/prof/profiling.md":"8a650c0fd6ede0964789bb6577557eeef1d8226a896788602ce61528e260e43c","perf-guide/src/target-feature/attribute.md":"615f88dca0a707b6c416fa605435dd6e1fb5361cc639429cbf68cd87624bd78b","perf-guide/src/target-feature/features.md":"17077760ff24c006b606dd21889c53d87228f4311f3ba3a574f9afdeacd86165","perf-guide/src/target-feature/inlining.md":"7ed1d7068d8173a00d84c16cfe5871cd68b9f04f8d0cca2d01ebc84957ebf2f6","perf-guide/src/target-feature/practice.md":"c4b371842e0086df178488fec97f20def8f0c62ee588bcd25fd948b9b1fa227e","perf-guide/src/target-feature/runtime.md":"835425f5ee597fb3e51d36e725a81ebee29f4561231d19563cd4da81dbb1cfcb","perf-guide/src/target-feature/rustflags.md":"ab49712e9293a65d74d540ba4784fcb57ff1119ec05a575d895c071f1a620f64","perf-guide/src/vert-hor-ops.md":"c6211c0ee91e60552ec592d89d9d957eedc21dee3cbd89e1ad6765ea06a27471","rustfmt.toml":"de6101d0670bad65fb3b337d56957d2a024e017e5ab146ec784d77312daaf8ff","src/api.rs":"f6e92f056565e6fd93f98829a408aee9e790251e0cbd8a8bc30c8662b4d6fabb","src/api/bit_manip.rs":"c47a4d0f7451f7e35d07715e4f39a472e07457fd456fdb726864a4f6887252a3","src/api/bitmask.rs":"6d2beefd62ee5d9c8eb060bee6abc641616bf828c99f82abf97b21bf004e894b","src/api/cast.rs":"03b94a3d316ac7b7be7068810044911e965e889a0ace7bae762749ca74a92747","src/api/cast/macros.rs":"b0a14d0c83ad2ebb7a275180f6d9e3f2bc312ba57a7d3d6c39fad4e0f20f9408","src/api/cast/v128.rs":"2107ea6a426a0fe37a0aa6a03a579ff0bdeb5a1599ea76e2d81734a82f41276d","src/api/cast/v16.rs":"d785cf93b8e61200c9ae1c32b9f5e9d9518e87c261c56bcaf92f2e47b0009eb4","src/api/cast/v256.rs":"b81fcfd367a5de532d922dedf18579e53666facef7957c0e1bc827825e500ae6","src/api/cast/v32.rs":"2aac9ec0a67a97328ba908b13a1ff98da3dcd7781910d592d31f9207cbd9a7d2","src/api/cast/v512.rs":"33b33de818f8d4eccc982bc2f3951a8b3d03e9762ec02789b3df82e3f5ed3fc3","src/api/cast/v64.rs":"ec878917d52a8c952633251b3a938a2cbe0a63fee6d12c15840d9f1343d1f394","src/api/cmp.rs":"357c3a2a09c6d4611c32dd7fa95be2fae933d513e229026ec9b44451a77b884e","src/api/cmp/eq.rs":"60f70f355bae4cb5b17db53204cacc3890f70670611c17df638d4c04f7cc8075","src/api/cmp/ord.rs":"589f7234761c294fa5df8f525bc4acd5a47cdb602207d524a0d4e19804cd9695","src/api/cmp/partial_eq.rs":"3ed23d2a930b0f9750c3a5309da766b03dc4f9c4d375b42ad3c50fe732693d15","src/api/cmp/partial_ord.rs":"e16b11805c94048acd058c93994b5bc74bb187f8d7e3b86a87df60e1601467f9","src/api/cmp/vertical.rs":"de3d62f38eba817299aa16f1e1939954c9a447e316509397465c2830852ba053","src/api/default.rs":"67bf21c134127d12a7028c8b88a57f0ceee8ccbd74976da8ca74eb9f16a174d5","src/api/fmt.rs":"67fb804bb86b6cd77cf8cd492b5733ce437071b66fe3297278b8a6552c325dda","src/api/fmt/binary.rs":"35cb5c266197d6224d598fb3d286e5fe48ef0c01ed356c2ff6fe9ba946f96a92","src/api/fmt/debug.rs":"aa18eea443bf353fea3db8b1a025132bbcaf91e747ecfa43b8d9fce9af395a0c","src/api/fmt/lower_hex.rs":"69d5be366631af309f214e8031c8c20267fcc27a695eac6f45c6bc1df72a67e6","src/api/fmt/octal.rs":"9eb11ba3d990213f3c7f1ec25edba7ce997cb1320e16d308c83498ba6b9bfbd9","src/api/fmt/upper_hex.rs":"a4637d085b7bb20e759ce58e08435b510a563ba3dd468af2b03560fdc5511562","src/api/from.rs":"2e599d8329cb05eaf06224cc441355c4b7b51254fc19256619333be8c149d444","src/api/from/from_array.rs":"dd3fc64fb17d6184bb60343f8da26a05edf0e5f3c14caf55d49fa15e21d948dc","src/api/from/from_vector.rs":"9764371aa9e6005aace74dea14f59e5611a095b7cf42707940924749282c52f0","src/api/hash.rs":"5076ece87969592c876486f5b1ea8affbeaec379d1a14a30859e0aa5592019de","src/api/into_bits.rs":"82297f0697d67b5a015e904e7e6e7b2a7066ba825bc54b94b4ff3e22d7a1eefb","src/api/into_bits/arch_specific.rs":"4acab22af90112072a2608fafc66fccf18cbf2e641b72af28404d30833cfe5c6","src/api/into_bits/macros.rs":"d762406de25aedff88d460dec7a80dc8e825a2a419d53218ce007efa6a1d3e04","src/api/into_bits/v128.rs":"3c502b9ce85bfcc727d6f053d49030b0ba9f46bd8e9fa5aa109382a2033f9f87","src/api/into_bits/v16.rs":"f4f4f61ba88aa51b158ec56ca3dce234349aea0daf2b3029a14ab5125d1e41e5","src/api/into_bits/v256.rs":"c24c3676707a0feb868dabe00766d74deab176794f905f79056337198c7cf790","src/api/into_bits/v32.rs":"905ba683d342fa32f4202b80bb46530807bd0a5b588f6c2e8c9f475223c47775","src/api/into_bits/v512.rs":"7cd89005215a9326eed8a742125dcbf981cba1aca72a313478eabf3df71b1160","src/api/into_bits/v64.rs":"d6238022ccff7b92e55b3f6017fc269acb6f36330a6d7e8fb389853a0f1b6478","src/api/math.rs":"8b2a2fc651917a850539f993aa0b9e5bf4da67b11685285b8de8cdca311719ec","src/api/math/float.rs":"61d2794d68262a1090ae473bd30793b5f65cf732f32a6694a3af2ce5d9225616","src/api/math/float/abs.rs":"5b6b2701e2e11135b7ce58a05052ea8120e10e4702c95d046b9d21b827b26bf8","src/api/math/float/consts.rs":"78acba000d3fa527111300b6327c1932de9c4c1e02d4174e1a5615c01463d38c","src/api/math/float/cos.rs":"4c2dd7173728ef189314f1576c9486e03be21b7da98843b2f9011282a7979e31","src/api/math/float/exp.rs":"7c6d5f1e304f498a01cfa23b92380c815d7da0ad94eae3483783bc377d287eef","src/api/math/float/ln.rs":"54c7583f3df793b39ff57534fade27b41bb992439e5dc178252f5ca3190a3e54","src/api/math/float/mul_add.rs":"62cac77660d20159276d4c9ef066eb90c81cbddb808e8e157182c607625ad2eb","src/api/math/float/mul_adde.rs":"bae056ee9f3a70df39ec3c3b2f6437c65303888a7b843ef1a5bcf1f5aca0e602","src/api/math/float/powf.rs":"9ddb938984b36d39d82a82f862f80df8f7fb013f1d222d45698d41d88472f568","src/api/math/float/recpre.rs":"589225794ff1dbf31158dff660e6d4509ecc8befbb57c633900dea5ac0b840d6","src/api/math/float/rsqrte.rs":"a32abdcc318d7ccc8448231f54d75b884b7cbeb03a7d595713ab6243036f4dbf","src/api/math/float/sin.rs":"cbd3622b7df74f19691743001c8cf747a201f8977ad90542fee915f37dcd1e49","src/api/math/float/sqrt.rs":"0c66d5d63fb08e4d99c6b82a8828e41173aff1ac9fa1a2764a11fac217ccf2ac","src/api/math/float/sqrte.rs":"731e1c9f321b662accdd27dacb3aac2e8043b7aecb2f2161dde733bd9f025362","src/api/minimal.rs":"1f22bcc528555444e76de569ec0ae2029b9ae9d04805efeafa93369c8098036b","src/api/minimal/iuf.rs":"819cff26d3e196f807645bcc1d79eb27d9f175edb89910f2274d52a1e913cd11","src/api/minimal/mask.rs":"0cae10ae1fc65f5070e686c0c79bfba27b86b33d6c399367bd4848fb367dcec4","src/api/minimal/ptr.rs":"f65ebf21866a863485344432d9a7a9b7418f7fad5fdf841a4e2fa56ec0766ad0","src/api/ops.rs":"3e273b277a0f3019d42c3c59ca94a5afd4885d5ae6d2182e5089bbeec9de42ee","src/api/ops/scalar_arithmetic.rs":"d2d5ad897a59dd0787544f927e0e7ca4072c3e58b0f4a2324083312b0d5a21d7","src/api/ops/scalar_bitwise.rs":"482204e459ca6be79568e1c9f70adbe2d2151412ddf122fb2161be8ebb51c40c","src/api/ops/scalar_mask_bitwise.rs":"c250f52042e37b22d57256c80d4604104cfd2fbe2a2e127c676267270ca5d350","src/api/ops/scalar_shifts.rs":"987f8fdebeedc16e3d77c1b732e7826ef70633c541d16dfa290845d5c6289150","src/api/ops/vector_arithmetic.rs":"ddca15d09ddeef502c2ed66117a62300ca65d87e959e8b622d767bdf1c307910","src/api/ops/vector_bitwise.rs":"b3968f7005b649edcc22a54e2379b14d5ee19045f2e784029805781ae043b5ee","src/api/ops/vector_float_min_max.rs":"76bf8cb607e2c442923c1da1061a6b80d742d607408033c2a3761161114cf2a0","src/api/ops/vector_int_min_max.rs":"a378789c6ff9b32a51fbd0a97ffd36ed102cd1fe6a067d2b02017c1df342def6","src/api/ops/vector_mask_bitwise.rs":"5052d18517d765415d40327e6e8e55a312daaca0a5e2aec959bfa54b1675f9c8","src/api/ops/vector_neg.rs":"5c62f6b0221983cdbd23cd0a3af3672e6ba1255f0dfe8b19aae6fbd6503e231b","src/api/ops/vector_rotates.rs":"03cbe8a400fd7c688e4ee771a990a6754f2031b1a59b19ae81158b21471167e5","src/api/ops/vector_shifts.rs":"9bf69d0087268f61009e39aea52e03a90f378910206b6a28e8393178b6a5d0e0","src/api/ptr.rs":"8a793251bed6130dcfb2f1519ceaa18b751bbb15875928d0fb6deb5a5e07523a","src/api/ptr/gather_scatter.rs":"138b02b0fa1fdd785b95fc7048488be7e3ef277e0bc6ac5affb26af6a11d41a6","src/api/reductions.rs":"ae5baca81352ecd44526d6c30c0a1feeda475ec73ddd3c3ec6b14e944e5448ee","src/api/reductions/bitwise.rs":"8bf910ae226188bd15fc7e125f058cd2566b6186fcd0cd8fd020f352c39ce139","src/api/reductions/float_arithmetic.rs":"3997125f87c7bac07fffda3a1d814e0e6c77ca83099546a9e2fb8dc92231129f","src/api/reductions/integer_arithmetic.rs":"47471da1c5f859489680bb5d34ced3d3aa20081c16053a3af121a4496fcb57bf","src/api/reductions/mask.rs":"db83327a950e33a317f37fd33ca4e20c347fb415975ec024f3e23da8509425af","src/api/reductions/min_max.rs":"d40ccad10220ae5982785015bef92e4b0749583c2b060cad0aa4f92d99491c3b","src/api/select.rs":"a98e2ccf9fc6bdeed32d337c8675bc96c2fbe2cc34fbf149ad6047fb8e749774","src/api/shuffle.rs":"da58200790868c09659819322a489929a5b6e56c596ed07e6a44293ea02e7d09","src/api/shuffle1_dyn.rs":"bfea5a91905b31444e9ef7ca6eddb7a9606b7e22d3f71bb842eb2795a0346620","src/api/slice.rs":"ee87484e8af329547b9a5d4f2a69e8bed6ea10bbd96270d706083843d4eea2ac","src/api/slice/from_slice.rs":"53691dc9958dec4180004a42d140552b405e8cd875caa282e89af378dd63c8bc","src/api/slice/write_to_slice.rs":"3dd2e511af43dc6fa911dd0b12f6f00323e0acd1202a01365db400557d52a89b","src/api/swap_bytes.rs":"4a6792a2e49a77475e1b237592b4b2804dbddb79c474331acd0dd71b36934259","src/codegen.rs":"a29d38fa0a85eaf787fb49989e625bf64effd5f39c126fbb2a24be206d2a3917","src/codegen/bit_manip.rs":"17ecebcff1f080e712fea5eb51602a73f4201ed56a198220342c8eb55bb92692","src/codegen/llvm.rs":"b1f24237f61b7c5ddb8d47f3943aab79a95ce0e75af87ab2d1c88d842faffd39","src/codegen/math.rs":"35f96e37a78fcf0cdb02146b7f27a45108fe06a37fc2a54d8851ce131a326178","src/codegen/math/float.rs":"dd86c0449e576c83b719700962ac017c332987fac08d91f2b7a2b1b883598170","src/codegen/math/float/abs.rs":"f56e2b4b8055ea861c1f5cbc6b6e1d8e7e5af163b62c13574ddee4e09513bfbc","src/codegen/math/float/cos.rs":"ef3b511a24d23045b310315e80348a9b7fedb576fc2de52d74290616a0abeb2a","src/codegen/math/float/cos_pi.rs":"4e7631a5d73dac21531e09ef1802d1180f8997509c2c8fa9f67f322194263a97","src/codegen/math/float/exp.rs":"61b691598c41b5622f24e4320c1bdd08701e612a516438bdddcc728fc3405c8c","src/codegen/math/float/ln.rs":"46b718b1ba8c9d99e1ad40f53d20dfde08a3063ca7bd2a9fdd6698e060da687e","src/codegen/math/float/macros.rs":"dd42135fff13f9aca4fd3a1a4e14c7e6c31aadc6d817d63b0d2fb9e62e062744","src/codegen/math/float/mul_add.rs":"a37bf764345d4b1714f97e83897b7cf0855fc2811704bcbc0012db91825339e1","src/codegen/math/float/mul_adde.rs":"c75702bfcb361de45964a93caf959a695ef2376bd069227600b8c6872665c755","src/codegen/math/float/powf.rs":"642346e982bc4c39203de0864d2149c4179cd7b21cf67a2951687932b4675872","src/codegen/math/float/sin.rs":"9d68164c90cdca6a85155040cdac42e27342ebe0b925273ef1593df721af4258","src/codegen/math/float/sin_cos_pi.rs":"9be02ad48585a1e8d99129382fbffbaed47852f15459256a708850b6b7a75405","src/codegen/math/float/sin_pi.rs":"9890347905b4d4a3c7341c3eb06406e46e60582bcf6960688bd727e5dadc6c57","src/codegen/math/float/sqrt.rs":"e3c60dcfb0c6d2fc62adabcc931b2d4040b83cab294dea36443fb4b89eb79e34","src/codegen/math/float/sqrte.rs":"f0f4ef9eb475ae41bcc7ec6a95ad744ba6b36925faa8b2c2814004396d196b63","src/codegen/pointer_sized_int.rs":"a70697169c28218b56fd2e8d5353f2e00671d1150d0c8cef77d613bdfacd84cb","src/codegen/reductions.rs":"645e2514746d01387ddd07f0aa4ffd8430cc9ab428d4fb13773ea319fa25dd95","src/codegen/reductions/mask.rs":"8f1afe6aabf096a3278e1fc3a30f736e04aa8b9ce96373cee22162d18cfe2702","src/codegen/reductions/mask/aarch64.rs":"cba6e17603d39795dcfe8339b6b7d8714c3e162a1f0a635979f037aa24fe4206","src/codegen/reductions/mask/arm.rs":"9447904818aa2c7c25d0963eead452a639a11ca7dbd6d21eedbfcaade07a0f33","src/codegen/reductions/mask/fallback.rs":"7a0ef9f7fd03ae318b495b95e121350cd61caffc5cc6ee17fabf130d5d933453","src/codegen/reductions/mask/fallback_impl.rs":"76547f396e55ef403327c77c314cf8db8c7a5c9b9819bfb925abeacf130249e5","src/codegen/reductions/mask/x86.rs":"4c0457b6276f9809223590092a4c77e73812330326cdabd28df06820de10a310","src/codegen/reductions/mask/x86/avx.rs":"b4913d87844c522903641cbbf10db4551addb1ce5e9e78278e21612fa65c733b","src/codegen/reductions/mask/x86/avx2.rs":"677aed3f056285285daa3adff8bc65e739630b4424defa6d9665e160f027507e","src/codegen/reductions/mask/x86/sse.rs":"5a827c6f8e1074e324f6e4c778942badb6c09d747a7142de01cadec1240b3428","src/codegen/reductions/mask/x86/sse2.rs":"bc38e6c31cb4b3d62147eba6cac264e519e2a48e0f7ce9010cfa9ef0cf0ec9fd","src/codegen/shuffle.rs":"99a0b52c2470097b028af134221099baba383446a01c7dc3ae560209880bcdb7","src/codegen/shuffle1_dyn.rs":"abbc95305dad815ab2ded3e8357791bcff080414668b55a4d397558a1d202d01","src/codegen/swap_bytes.rs":"1d6cdc716eadddc92b4fd506b2445a821caa8dc00860447de09d7ebd69c2087f","src/codegen/v128.rs":"94226b31ec403d18d9d2fe06713f147c9c79e9b5f9105089088266313f843185","src/codegen/v16.rs":"ddec4ffb66b6f7aaffb9a1780c5ddba82557abd74f45073d335047e04cf74924","src/codegen/v256.rs":"6b63917f0444118d6b1595bff2045e59b97c4d24012bd575f69f1f0efc5a0241","src/codegen/v32.rs":"3477b3c5540aed86e61e2f5807dd31db947413cec9181c587d93ed6ec74f0eba","src/codegen/v512.rs":"5854f99d3aabc4cd42b28a20d9ce447756dc2ba024a409a69b6a8ae1f1842fc5","src/codegen/v64.rs":"e9e89caebfe63d10c0cbca61e4dfdba3b7e02ee0989170f80beed23237ddd950","src/codegen/vPtr.rs":"711c753a08d53a2879c4fb87a0762c46ce4e34c22f0ca88d2e4c557a0f679969","src/codegen/vSize.rs":"eeee9858749aa82142b27bc120d1989bb74a6b82e1e4efbbeaccc9634dc9acfc","src/lib.rs":"b842b5e47008b9bd59af4d2e309b84204d90a53d36595684082adc46b6934987","src/masks.rs":"be05e923ac58fe6eb61311561b5583cd306574f206dc09fe8e3c7de3dd0c1433","src/sealed.rs":"ae7fdeaf5d84cd7710ed730ca72ca7eaba93df6cb0acb183e5c0a7327acf197f","src/testing.rs":"1d3a7862ef625e235a5734ad7204e68d350f902c0695182b1f08a0552432416e","src/testing/macros.rs":"6378856d7a40ba5ec5c7c0dad6327d79f0c77266921c24296d10aed6c68e9b98","src/testing/utils.rs":"5ec6a47b836f364ec6dede19750a19eaac704162327d03041eb0f007d5f8d75c","src/v128.rs":"16cf9a8e7156b899ee9b9cd3f2dba9d13ec63289bea8c3ee9ae2e43ad9510288","src/v16.rs":"cb6465cf1e00bf530183af1819b9fe3d7eec978f8765d5e85d9b58a39a4b4045","src/v256.rs":"fe235017da18c7f3c361831c60e3173ad304d8ea1e95d64ebebc79da2d708511","src/v32.rs":"145d347855bac59b2de6508f9e594654e6c330423af9edc0e2ac8f4d1abdf45e","src/v512.rs":"f372f277f3e62eb5c945bb1c460333fdb17b6974fcc876633788ff53bded9599","src/v64.rs":"0b8079881b71575e3414be0b7f8f7eaba65281ba6732f2b2f61f73e95b6f48f7","src/vPtr.rs":"8b3e433d487180bb4304ff71245ecad90f0010f43e139a72027b672abe58facc","src/vSize.rs":"eda5aa020706cbf94d15bada41a0c2a35fc8f3f37cb7c2cd6f34d201399a495e","tests/endianness.rs":"7db22078f31fe1421fc2d21f2e6b9df5eb0bdc99c10f6985d3a74c0df8f205dc"},"package":null} -\ No newline at end of file -diff --git a/third_party/rust/packed_simd/.travis.yml b/third_party/rust/packed_simd/.travis.yml ---- a/third_party/rust/packed_simd/.travis.yml -+++ b/third_party/rust/packed_simd/.travis.yml -@@ -1,291 +1,222 @@ - language: rust --sudo: false - rust: nightly -+os: linux -+dist: focal - - stages: - - tools -- - linux-tier1 -- - osx-tier1 -- - osx-tier2 -- - linux-tier2 -- - android -+ - build-test-verify # Passes full test suite, permit no regressions (unless it's rustup :/) -+ - 32bit-tier1 -+ - 64bit-tier2 -+ - 32bit-tier2 - --matrix: -- fast_finish: true -+jobs: -+ fast_finish: true - include: - # Android: -- - env: TARGET=x86_64-linux-android NOVERIFY=1 -+ - env: TARGET=x86_64-linux-android - name: "x86_64-unknown-linux-android + SSE2" -- stage: android -+ stage: build-test-verify - - env: TARGET=arm-linux-androideabi - name: "arm-linux-androideabi" -- stage: android -+ stage: build-test-verify - - env: TARGET=arm-linux-androideabi RUSTFLAGS="-C target-feature=+v7,+neon" - name: "arm-linux-androideabi + NEON" -- stage: android -- - env: TARGET=aarch64-linux-android -- name: "aarch64-unknown-linux-android" -- stage: android -- - env: TARGET=aarch64-linux-android RUSTFLAGS="-C target-feature=+neon" -- name: "aarch64-unknown-linux-android + NEON" -- stage: android -+ stage: build-test-verify -+ - name: "aarch64-unknown-linux-android + NEON" -+ env: TARGET=aarch64-linux-android RUSTFLAGS="-C target-feature=+neon" -+ stage: build-test-verify - - env: TARGET="thumbv7neon-linux-androideabi" - name: "thumbv7neon-linux-androideabi" -- stage: android -+ stage: 32bit-tier2 - # Linux: - - env: TARGET=i586-unknown-linux-gnu - name: "i586-unknown-linux-gnu" -- stage: linux-tier2 -+ stage: 32bit-tier2 - - env: TARGET=i586-unknown-linux-gnu RUSTFLAGS="-C target-feature=+sse" - name: "i586-unknown-linux-gnu + SSE" -- stage: linux-tier2 -+ stage: 32bit-tier2 - - env: TARGET=i586-unknown-linux-gnu RUSTFLAGS="-C target-feature=+sse2" - name: "i586-unknown-linux-gnu + SSE2" -- stage: linux-tier2 -+ stage: 32bit-tier2 - - env: TARGET=i686-unknown-linux-gnu - name: "i686-unknown-linux-gnu + SSE2" -- stage: linux-tier1 -+ stage: 32bit-tier1 - - env: TARGET=i686-unknown-linux-gnu RUSTFLAGS="-C target-feature=+sse4.2" - name: "i686-unknown-linux-gnu + SSE4.2" -- stage: linux-tier1 -+ stage: 32bit-tier1 - - env: TARGET=i686-unknown-linux-gnu RUSTFLAGS="-C target-feature=+avx2" - name: "i686-unknown-linux-gnu + AVX2" -- stage: linux-tier1 -- - env: TARGET=x86_64-unknown-linux-gnu -- name: "x86_64-unknown-linux-gnu + SSE2" -- install: rustup component add rustfmt-preview -- stage: linux-tier1 -+ stage: 32bit-tier1 - - env: TARGET=x86_64-unknown-linux-gnu RUSTFLAGS="-C target-feature=+sse4.2" - name: "x86_64-unknown-linux-gnu + SSE4.2" - install: rustup component add rustfmt-preview -- stage: linux-tier1 -- - env: TARGET=x86_64-unknown-linux-gnu RUSTFLAGS="-C target-feature=+avx" -- name: "x86_64-unknown-linux-gnu + AVX" -- install: rustup component add rustfmt-preview -- stage: linux-tier1 -+ stage: build-test-verify - - env: TARGET=x86_64-unknown-linux-gnu RUSTFLAGS="-C target-feature=+avx2" - name: "x86_64-unknown-linux-gnu + AVX2" - install: rustup component add rustfmt-preview -- stage: linux-tier1 -- - env: TARGET=x86_64-unknown-linux-gnu-emulated -- name: "Intel SDE + SSE2" -- install: true -- stage: linux-tier1 -- - env: TARGET=x86_64-unknown-linux-gnu-emulated RUSTFLAGS="-C target-feature=+sse4.2" -- name: "Intel SDE + SSE4.2" -- install: true -- stage: linux-tier1 -- - env: TARGET=x86_64-unknown-linux-gnu-emulated RUSTFLAGS="-C target-feature=+avx" -- name: "Intel SDE + AVX" -- install: true -- stage: linux-tier1 -- - env: TARGET=x86_64-unknown-linux-gnu-emulated RUSTFLAGS="-C target-feature=+avx2" -- name: "Intel SDE + AVX2" -- install: true -- stage: linux-tier1 -- - env: TARGET=x86_64-unknown-linux-gnu-emulated RUSTFLAGS="-C target-feature=+avx-512f" -- name: "Intel SDE + AVX-512" -- install: true -- stage: linux-tier1 -- - env: TARGET=arm-unknown-linux-gnueabi -- name: "arm-unknown-linux-gnueabi" -- stage: linux-tier2 -+ stage: build-test-verify - - env: TARGET=arm-unknown-linux-gnueabi RUSTFLAGS="-C target-feature=+v7,+neon" - name: "arm-unknown-linux-gnueabi + NEON" -- stage: linux-tier2 -+ stage: build-test-verify - - env: TARGET=arm-unknown-linux-gnueabihf - name: "arm-unknown-linux-gnueabihf" -- stage: linux-tier2 -+ stage: build-test-verify - - env: TARGET=arm-unknown-linux-gnueabihf RUSTFLAGS="-C target-feature=+v7,+neon" - name: "arm-unknown-linux-gnueabihf + NEON" -- stage: linux-tier2 -+ stage: build-test-verify - - env: TARGET=armv7-unknown-linux-gnueabihf - name: "armv7-unknown-linux-gnueabihf" -- stage: linux-tier2 -+ stage: build-test-verify - - env: TARGET=armv7-unknown-linux-gnueabihf RUSTFLAGS="-C target-feature=+neon" - name: "armv7-unknown-linux-gnueabihf + NEON" -- stage: linux-tier2 -+ stage: build-test-verify - - env: TARGET="thumbv7neon-unknown-linux-gnueabihf" - name: "thumbv7neon-unknown-linux-gnueabihf" -- stage: linux-tier2 -- - env: TARGET=aarch64-unknown-linux-gnu -- name: "aarch64-unknown-linux-gnu" -- stage: linux-tier2 -- - env: TARGET=aarch64-unknown-linux-gnu RUSTFLAGS="-C target-feature=+neon" -- name: "aarch64-unknown-linux-gnu + NEON" -- stage: linux-tier2 -+ stage: 32bit-tier2 -+ - name: "aarch64-unknown-linux-gnu + NEON" -+ env: TARGET=aarch64-unknown-linux-gnu RUSTFLAGS="-C target-feature=+neon" -+ stage: build-test-verify - - env: TARGET=mips-unknown-linux-gnu - name: "mips-unknown-linux-gnu" -- stage: linux-tier2 -+ stage: 32bit-tier2 - - env: TARGET=mipsel-unknown-linux-musl - name: "mipsel-unknown-linux-musl" -- stage: linux-tier2 -+ stage: 32bit-tier2 - - env: TARGET=mips64-unknown-linux-gnuabi64 - name: "mips64-unknown-linux-gnuabi64" -- stage: linux-tier2 -+ stage: 64bit-tier2 - - env: TARGET=mips64el-unknown-linux-gnuabi64 - name: "mips64el-unknown-linux-gnuabi64" -- stage: linux-tier2 -+ stage: 64bit-tier2 - # FIXME: https://github.com/rust-lang-nursery/packed_simd/issues/18 - # env: TARGET=mips64el-unknown-linux-gnuabi64 RUSTFLAGS="-C target-feature=+msa -C target-cpu=mips64r6" - - env: TARGET=powerpc-unknown-linux-gnu - name: "powerpc-unknown-linux-gnu" -- stage: linux-tier2 -+ stage: 32bit-tier2 - - env: TARGET=powerpc64-unknown-linux-gnu - name: "powerpc64-unknown-linux-gnu" -- stage: linux-tier2 -- - env: TARGET=powerpc64le-unknown-linux-gnu -- name: "powerpc64le-unknown-linux-gnu" -- stage: linux-tier2 -- - env: TARGET=powerpc64le-unknown-linux-gnu RUSTFLAGS="-C target-feature=+altivec" -- name: "powerpc64le-unknown-linux-gnu + ALTIVEC" -- stage: linux-tier2 -- - env: TARGET=powerpc64le-unknown-linux-gnu RUSTFLAGS="-C target-feature=+vsx" -- name: "powerpc64le-unknown-linux-gnu + VSX" -- stage: linux-tier2 -- - env: TARGET=s390x-unknown-linux-gnu -- name: "s390x-unknown-linux-gnu" -- stage: linux-tier2 -+ stage: 64bit-tier2 -+ - name: "powerpc64le-unknown-linux-gnu" -+ env: TARGET=powerpc64le-unknown-linux-gnu -+ stage: build-test-verify -+ - name: "powerpc64le-unknown-linux-gnu + ALTIVEC" -+ env: TARGET=powerpc64le-unknown-linux-gnu RUSTFLAGS="-C target-feature=+altivec" -+ stage: build-test-verify -+ - name: "powerpc64le-unknown-linux-gnu + VSX" -+ env: TARGET=powerpc64le-unknown-linux-gnu RUSTFLAGS="-C target-feature=+vsx" -+ stage: build-test-verify -+ - name: "s390x-unknown-linux-gnu" -+ env: TARGET=s390x-unknown-linux-gnu -+ stage: 64bit-tier2 - - env: TARGET=sparc64-unknown-linux-gnu - name: "sparc64-unknown-linux-gnu" -- stage: linux-tier2 -+ stage: 64bit-tier2 - # WebAssembly: - - env: TARGET=wasm32-unknown-unknown - name: "wasm32-unknown-unknown" -- stage: osx-tier1 # For now -+ stage: 32bit-tier2 - # MacOSX: - - os: osx -- env: TARGET=i686-apple-darwin -- name: "i686-apple-darwin + SSE2" -- script: ci/run.sh -- osx_image: xcode10 -- stage: osx-tier1 -- - os: osx -- env: TARGET=i686-apple-darwin RUSTFLAGS="-C target-feature=+sse4.2" -- name: "i686-apple-darwin + SSE4.2" -- script: ci/run.sh -- osx_image: xcode10 -- stage: osx-tier1 -- # Travis-CI OSX build bots do not support AVX2: -- - os: osx -- env: TARGET=i686-apple-darwin RUSTFLAGS="-C target-feature=+avx" -- name: "i686-apple-darwin + AVX" -- script: ci/run.sh -- osx_image: xcode10 -- stage: osx-tier1 -- - os: osx -- env: TARGET=x86_64-apple-darwin -- name: "x86_64-apple-darwin + SSE2" -- install: true -- script: ci/run.sh -- osx_image: xcode10 -- stage: osx-tier1 -- - os: osx - env: TARGET=x86_64-apple-darwin RUSTFLAGS="-C target-feature=+sse4.2" - name: "x86_64-apple-darwin + SSE4.2" - install: true - script: ci/run.sh - osx_image: xcode10 -- stage: osx-tier1 -+ stage: build-test-verify - # Travis-CI OSX build bots do not support AVX2: - - os: osx - env: TARGET=x86_64-apple-darwin RUSTFLAGS="-C target-feature=+avx" - name: "x86_64-apple-darwin + AVX" - install: true - script: ci/run.sh - osx_image: xcode10 -- stage: osx-tier1 -+ stage: build-test-verify - # *BSDs: - #- env: TARGET=i686-unknown-freebsd NORUN=1 - # script: ci/run.sh - #- env: TARGET=x86_64-unknown-freebsd NORUN=1 - # script: ci/run.sh - #- env: TARGET=x86_64-unknown-netbsd NORUN=1 - # script: ci/run.sh - # Solaris: - #- env: TARGET=x86_64-sun-solaris NORUN=1 - # script: ci/run.sh - # iOS: - - os: osx -- env: TARGET=i386-apple-ios -- name: "i386-apple-ios" -- script: ci/run.sh -- osx_image: xcode9.4 -- stage: osx-tier2 -- - os: osx - env: TARGET=x86_64-apple-ios - name: "x86_64-apple-ios + SSE2" - script: ci/run.sh - osx_image: xcode9.4 -- stage: osx-tier2 -- - os: osx -- env: TARGET=armv7-apple-ios NORUN=1 -- name: "armv7-apple-ios [Build only]" -- script: ci/run.sh -+ stage: 64bit-tier2 -+ - name: "aarch64-apple-ios + NEON" -+ env: TARGET=aarch64-apple-ios RUSTFLAGS="-C target-feature=+neon" -+ os: osx - osx_image: xcode9.4 -- stage: osx-tier2 -- - os: osx -- env: TARGET=aarch64-apple-ios NORUN=1 -- name: "aarch64-apple-ios [Build only]" - script: ci/run.sh -- osx_image: xcode9.4 -- stage: osx-tier2 -+ stage: 64bit-tier2 - # BENCHMARKS: - - name: "Benchmarks - x86_64-unknown-linux-gnu" - install: TARGET=x86_64-unknown-linux-gnu ./ci/setup_benchmarks.sh -- script: PATH=$(pwd):$PATH NORUN=1 VERIFY=1 FEATURES=core_arch,ispc,sleef-sys ci/benchmark.sh -+ # FIXME: Use `core_arch,sleef-sys` features once they works again -+ script: PATH=$(pwd):$PATH NORUN=1 VERIFY=1 FEATURES=ispc ci/benchmark.sh - stage: tools - - name: "Benchmarks - x86_64-apple-darwin" - install: TARGET=x86_64-apple-darwin ./ci/setup_benchmarks.sh -- script: PATH=$(pwd):$PATH NORUN=1 VERIFY=1 FEATURES=core_arch,ispc,sleef-sys ci/benchmark.sh -+ # FIXME: Use `core_arch,sleef-sys` features once they works again -+ script: PATH=$(pwd):$PATH NORUN=1 VERIFY=1 FEATURES=ispc ci/benchmark.sh - os: osx - osx_image: xcode9.4 - stage: tools - # TOOLS: - - name: "Documentation" -- install: cargo install mdbook -+ before_install: -+ - sudo add-apt-repository -y ppa:deadsnakes/ppa -+ - sudo apt-get update -y -+ - sudo apt-get install -y python3.9 -+ install: -+ - cargo install mdbook - script: ci/dox.sh - stage: tools - - name: "rustfmt" - install: true -- before_script: rustup component add rustfmt-preview -- script: ci/all.sh check_fmt || true -+ script: | -+ if rustup component add rustfmt-preview ; then -+ ci/all.sh check_fmt || true -+ fi - stage: tools - - name: "clippy" - install: true -- before_script: rustup component add clippy-preview -- script: ci/all.sh clippy -+ script: | -+ if rustup component add clippy-preview ; then -+ ci/all.sh clippy -+ fi - stage: tools - - allow_failures: - # FIXME: ISPC cannot be found? - - name: "Benchmarks - x86_64-apple-darwin" -- # FIXME: TBD -- - env: TARGET=powerpc-unknown-linux-gnu -- - env: TARGET=powerpc64-unknown-linux-gnu -- - env: TARGET=powerpc64le-unknown-linux-gnu -- - env: TARGET=powerpc64le-unknown-linux-gnu RUSTFLAGS="-C target-feature=+altivec" -- - env: TARGET=powerpc64le-unknown-linux-gnu RUSTFLAGS="-C target-feature=+vsx" -+ # FIXME: i686 fails in inlining, apparently -+ - stage: 32bit-tier1 - #- env: TARGET=i686-unknown-freebsd NORUN=1 - #- env: TARGET=x86_64-unknown-freebsd NORUN=1 - #- env: TARGET=x86_64-unknown-netbsd NORUN=1 - #- env: TARGET=x86_64-sun-solaris NORUN=1 - - # FIXME: TBD -- - env: TARGET=arm-linux-androideabi -- - env: TARGET=arm-linux-androideabi RUSTFLAGS="-C target-feature=+v7,+neon" -- - env: TARGET=aarch64-linux-android -- - env: TARGET=aarch64-linux-android RUSTFLAGS="-C target-feature=+neon" -+ - stage: 64bit-tier2 -+ - stage: 32bit-tier2 - - # FIXME: iOS - # https://github.com/rust-lang-nursery/packed_simd/issues/26 -- - env: TARGET=i386-apple-ios - - env: TARGET=x86_64-apple-ios -+ # Is this related to the above? Mysterious test failure -+ - name: "aarch64-apple-ios + NEON" - - # FIXME: https://github.com/rust-lang-nursery/packed_simd/issues/182 - - env: TARGET=arm-unknown-linux-gnueabi RUSTFLAGS="-C target-feature=+v7,+neon" - - env: TARGET=arm-unknown-linux-gnueabihf RUSTFLAGS="-C target-feature=+v7,+neon" - - env: TARGET=armv7-unknown-linux-gnueabihf RUSTFLAGS="-C target-feature=+neon" - - # FIXME: https://github.com/rust-lang-nursery/packed_simd/issues/183 - - env: TARGET=wasm32-unknown-unknown -diff --git a/third_party/rust/packed_simd/Cargo.toml b/third_party/rust/packed_simd/Cargo.toml ---- a/third_party/rust/packed_simd/Cargo.toml -+++ b/third_party/rust/packed_simd/Cargo.toml -@@ -1,11 +1,11 @@ - [package] - name = "packed_simd" --version = "0.3.3" -+version = "0.3.4" - authors = ["Gonzalo Brito Gadeschi "] - description = "Portable Packed SIMD vectors" - documentation = "https://docs.rs/crate/packed_simd/" - homepage = "https://github.com/rust-lang-nursery/packed_simd" - repository = "https://github.com/rust-lang-nursery/packed_simd" - keywords = ["simd", "vector", "portability"] - categories = ["hardware-support", "concurrency", "no-std", "data-structures"] - license = "MIT/Apache-2.0" -@@ -16,27 +16,27 @@ edition = "2018" - appveyor = { repository = "rust-lang-nursery/packed_simd" } - travis-ci = { repository = "rust-lang-nursery/packed_simd" } - codecov = { repository = "rust-lang-nursery/packed_simd" } - is-it-maintained-issue-resolution = { repository = "rust-lang-nursery/packed_simd" } - is-it-maintained-open-issues = { repository = "rust-lang-nursery/packed_simd" } - maintenance = { status = "experimental" } - - [dependencies] --cfg-if = "^0.1.6" --core_arch = { version = "^0.1.3", optional = true } -+cfg-if = "0.1.10" -+core_arch = { version = "0.1.5", optional = true } - - [features] - default = [] - into_bits = [] - libcore_neon = [] - - [dev-dependencies] - paste = "^0.1.3" --arrayvec = { version = "^0.4", default-features = false } -+arrayvec = { version = "^0.5", default-features = false } - - [target.'cfg(target_arch = "x86_64")'.dependencies.sleef-sys] --version = "^0.1.2" -+version = "0.1.2" - optional = true - - [target.wasm32-unknown-unknown.dev-dependencies] --wasm-bindgen = "=0.2.19" --wasm-bindgen-test = "=0.2.19" -\ No newline at end of file -+wasm-bindgen = "=0.2.52" -+wasm-bindgen-test = "=0.3.2" -diff --git a/third_party/rust/packed_simd/readme.md b/third_party/rust/packed_simd/README.md -rename from third_party/rust/packed_simd/readme.md -rename to third_party/rust/packed_simd/README.md ---- a/third_party/rust/packed_simd/readme.md -+++ b/third_party/rust/packed_simd/README.md -@@ -1,24 +1,22 @@ - # `Simd<[T; N]>` - - ## Implementation of [Rust RFC #2366: `std::simd`][rfc2366] - - [![Travis-CI Status]][travis] [![Appveyor Status]][appveyor] [![Latest Version]][crates.io] [![docs]][master_docs] - --> This aims to be a 100% conforming implementation of Rust RFC 2366 for stabilization. -- --**WARNING**: this crate only supports the most recent nightly Rust toolchain. -+**WARNING**: this crate only supports the most recent nightly Rust toolchain -+and will be superceded by [stdsimd](https://github.com/rust-lang/stdsimd). - - ## Documentation - - * [API docs (`master` branch)][master_docs] - * [Performance guide][perf_guide] --* [API docs (`docs.rs`)][docs.rs]: **CURRENTLY DOWN** due to -- https://github.com/rust-lang-nursery/packed_simd/issues/110 -+* [API docs (`docs.rs`)][docs.rs] - * [RFC2366 `std::simd`][rfc2366]: - contains motivation, design rationale, - discussion, etc. - - ## Examples - - Most of the examples come with both a scalar and a vectorized implementation. - - * [`aobench`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/aobench) -@@ -34,27 +32,16 @@ Most of the examples come with both a sc - - ## Cargo features - - * `into_bits` (default: disabled): enables `FromBits`/`IntoBits` trait - implementations for the vector types. These allow reinterpreting the bits of a - vector type as those of another vector type safely by just using the - `.into_bits()` method. - --* `core_arch` (default: disabled): enable this feature to recompile `core::arch` -- for the target-features enabled. `packed_simd` includes optimizations for some -- target feature combinations that are enabled by this feature. Note, however, -- that this is an unstable dependency, that rustc might break at any time. -- --* `sleef-sys` (default: disabled - `x86_64` only): internally uses the [SLEEF] -- short-vector math library when profitable via the [`sleef-sys`][sleef_sys] -- crate. [SLEEF] is licensed under the [Boost Software License -- v1.0][boost_license], an extremely permissive license, and can be statically -- linked without issues. -- - ## Performance - - The following [ISPC] examples are also part of `packed_simd`'s - [`examples/`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/) - directory, where `packed_simd`+[`rayon`][rayon] are used to emulate [ISPC]'s - Single-Program-Multiple-Data (SPMD) programming model. The performance results - on different hardware is shown in the `readme.md` of each example. The following - table summarizes the performance ranges, where `+` means speed-up and `-` -@@ -70,70 +57,50 @@ slowdown: - While SPMD is not the intended use case for `packed_simd`, it is possible to - combine the library with [`rayon`][rayon] to poorly emulate [ISPC]'s SPMD programming - model in Rust. Writing performant code is not as straightforward as with - [ISPC], but with some care (e.g. see the [Performance Guide][perf_guide]) one - can easily match and often out-perform [ISPC]'s "default performance". - - ## Platform support - --The following table describes the supported platforms: `build` shows whether the --library compiles without issues for a given target, while `run` shows whether --the full testsuite passes on the target. -+The following table describes the supported platforms: `build` shows whether -+the library compiles without issues for a given target, while `run` shows -+whether the test suite passes for a given target. - --| Linux targets: | build | run | --|-----------------------------------|-----------|---------| --| `i586-unknown-linux-gnu` | ✓ | ✓ | --| `i686-unknown-linux-gnu` | ✓ | ✓ | --| `x86_64-unknown-linux-gnu` | ✓ | ✓ | --| `arm-unknown-linux-gnueabi` | ✗ | ✗ | --| `arm-unknown-linux-gnueabihf` | ✓ | ✓ | --| `armv7-unknown-linux-gnueabi` | ✓ | ✓ | --| `aarch64-unknown-linux-gnu` | ✓ | ✓ | --| `mips-unknown-linux-gnu` | ✓ | ✓ | --| `mipsel-unknown-linux-musl` | ✓ | ✓ | --| `mips64-unknown-linux-gnuabi64` | ✓ | ✓ | --| `mips64el-unknown-linux-gnuabi64` | ✓ | ✓ | --| `powerpc-unknown-linux-gnu` | ✗ | ✗ | --| `powerpc64-unknown-linux-gnu` | ✗ | ✗ | --| `powerpc64le-unknown-linux-gnu` | ✗ | ✗ | --| `s390x-unknown-linux-gnu` | ✓ | ✓* | --| `sparc64-unknown-linux-gnu` | ✓ | ✓* | --| `thumbv7neon-unknown-linux-gnueabihf` | ✓ | ✓ | --| **MacOSX targets:** | **build** | **run** | --| `x86_64-apple-darwin` | ✓ | ✓ | --| `i686-apple-darwin` | ✓ | ✓ | --| **Windows targets:** | **build** | **run** | --| `x86_64-pc-windows-msvc` | ✓ | ✓ | --| `i686-pc-windows-msvc` | ✓ | ✓ | --| `x86_64-pc-windows-gnu` | ✗ | ✗ | --| `i686-pc-windows-gnu` | ✗ | ✗ | --| **WebAssembly targets:** | **build** | **run** | --| `wasm32-unknown-unknown` | ✓ | ✓ | --| **Android targets:** | **build** | **run** | --| `x86_64-linux-android` | ✓ | ✓ | --| `arm-linux-androideabi` | ✓ | ✓ | --| `aarch64-linux-android` | ✓ | ✗ | --| `thumbv7neon-linux-androideabi` | ✓ | ✓ | --| **iOS targets:** | **build** | **run** | --| `i386-apple-ios` | ✓ | ✗ | --| `x86_64-apple-ios` | ✓ | ✗ | --| `armv7-apple-ios` | ✓ | ✗** | --| `aarch64-apple-ios` | ✓ | ✗** | --| **xBSD targets:** | **build** | **run** | --| `i686-unknown-freebsd` | ✗ | ✗** | --| `x86_64-unknown-freebsd` | ✗ | ✗** | --| `x86_64-unknown-netbsd` | ✗ | ✗** | --| **Solaris targets:** | **build** | **run** | --| `x86_64-sun-solaris` | ✗ | ✗** | -+| **Linux** | **build** | **run** | -+|---------------------------------------|-----------|---------| -+| `i586-unknown-linux-gnu` | ✓ | ✗ | -+| `i686-unknown-linux-gnu` | ✓ | ✗ | -+| `x86_64-unknown-linux-gnu` | ✓ | ✓ | -+| `arm-unknown-linux-gnueabi` | ✗ | ✗ | -+| `arm-unknown-linux-gnueabihf` | ✓ | ✓ | -+| `armv7-unknown-linux-gnueabi` | ✓ | ✓ | -+| `aarch64-unknown-linux-gnu` | ✓ | ✓ | -+| `mips-unknown-linux-gnu` | ✓ | ✗ | -+| `mipsel-unknown-linux-musl` | ✓ | ✗ | -+| `mips64-unknown-linux-gnuabi64` | ✓ | ✗ | -+| `mips64el-unknown-linux-gnuabi64` | ✓ | ✗ | -+| `powerpc-unknown-linux-gnu` | ✗ | ✗ | -+| `powerpc64-unknown-linux-gnu` | ✗ | ✗ | -+| `powerpc64le-unknown-linux-gnu` | ✓ | ✓ | -+| `s390x-unknown-linux-gnu` | ✗ | ✗ | -+| `sparc64-unknown-linux-gnu` | ✓ | ✗ | -+| `thumbv7neon-unknown-linux-gnueabihf` | ✓ | ✓ | -+| **MacOSX** | **build** | **run** | -+| `x86_64-apple-darwin` | ✓ | ✓ | -+| **Android** | **build** | **run** | -+| `x86_64-linux-android` | ✓ | ✓ | -+| `arm-linux-androideabi` | ✓ | ✓ | -+| `aarch64-linux-android` | ✓ | ✓ | -+| `thumbv7neon-linux-androideabi` | ✗ | ✗ | -+| **iOS** | **build** | **run** | -+| `x86_64-apple-ios` | ✓ | ✗ | -+| `aarch64-apple-ios` | ✓ | ✗ | - --[*] most of the test suite passes correctly on these platform but --there are correctness bugs open in the issue tracker. -- --[**] it is currently not easily possible to run these platforms on CI. - - ## Machine code verification - - The - [`verify/`](https://github.com/rust-lang-nursery/packed_simd/tree/master/verify) - crate tests disassembles the portable packed vector APIs at run-time and - compares the generated machine code against the desired one to make sure that - this crate remains efficient. -@@ -157,18 +124,18 @@ Please see the [contributing instruction - - Contributions in any form (issues, pull requests, etc.) to this project - must adhere to Rust's [Code of Conduct]. - - Unless you explicitly state otherwise, any contribution intentionally submitted - for inclusion in `packed_simd` by you, as defined in the Apache-2.0 license, shall be - dual licensed as above, without any additional terms or conditions. - --[travis]: https://travis-ci.org/rust-lang-nursery/packed_simd --[Travis-CI Status]: https://travis-ci.org/rust-lang-nursery/packed_simd.svg?branch=master -+[travis]: https://travis-ci.com/rust-lang-nursery/packed_simd -+[Travis-CI Status]: https://travis-ci.com/rust-lang-nursery/packed_simd.svg?branch=master - [appveyor]: https://ci.appveyor.com/project/gnzlbg/packed-simd - [Appveyor Status]: https://ci.appveyor.com/api/projects/status/hd7v9dvr442hgdix?svg=true - [Latest Version]: https://img.shields.io/crates/v/packed_simd.svg - [crates.io]: https://crates.io/crates/packed_simd - [docs]: https://docs.rs/packed_simd/badge.svg - [docs.rs]: https://docs.rs/packed_simd/ - [master_docs]: https://rust-lang-nursery.github.io/packed_simd/packed_simd/ - [perf_guide]: https://rust-lang-nursery.github.io/packed_simd/perf-guide/ -diff --git a/third_party/rust/packed_simd/build.rs b/third_party/rust/packed_simd/build.rs ---- a/third_party/rust/packed_simd/build.rs -+++ b/third_party/rust/packed_simd/build.rs -@@ -1,8 +1,8 @@ - fn main() { -- println!("cargo:rustc-env=RUSTC_BOOTSTRAP=1"); -+ println!("cargo:rustc-env=RUSTC_BOOTSTRAP=1"); - let target = std::env::var("TARGET") - .expect("TARGET environment variable not defined"); - if target.contains("neon") { - println!("cargo:rustc-cfg=libcore_neon"); - } - } -diff --git a/third_party/rust/packed_simd/ci/all.sh b/third_party/rust/packed_simd/ci/all.sh ---- a/third_party/rust/packed_simd/ci/all.sh -+++ b/third_party/rust/packed_simd/ci/all.sh -@@ -16,17 +16,17 @@ cargo_check_fmt() { - cargo fmt --all -- --check - } - - cargo_fmt() { - cargo fmt --all - } - - cargo_clippy() { -- cargo clippy --all -- -D clippy::pedantic -+ cargo clippy --all -- -D clippy::perf - } - - CMD="-1" - - case $op in - clean*) - CMD=cargo_clean - ;; -diff --git a/third_party/rust/packed_simd/ci/docker/aarch64-unknown-linux-gnu/Dockerfile b/third_party/rust/packed_simd/ci/docker/aarch64-unknown-linux-gnu/Dockerfile ---- a/third_party/rust/packed_simd/ci/docker/aarch64-unknown-linux-gnu/Dockerfile -+++ b/third_party/rust/packed_simd/ci/docker/aarch64-unknown-linux-gnu/Dockerfile -@@ -1,9 +1,9 @@ --FROM ubuntu:17.10 -+FROM ubuntu:18.04 - RUN apt-get update && apt-get install -y --no-install-recommends \ - gcc \ - ca-certificates \ - libc6-dev \ - gcc-aarch64-linux-gnu \ - libc6-dev-arm64-cross \ - qemu-user \ - make \ -diff --git a/third_party/rust/packed_simd/ci/docker/arm-unknown-linux-gnueabi/Dockerfile b/third_party/rust/packed_simd/ci/docker/arm-unknown-linux-gnueabi/Dockerfile ---- a/third_party/rust/packed_simd/ci/docker/arm-unknown-linux-gnueabi/Dockerfile -+++ b/third_party/rust/packed_simd/ci/docker/arm-unknown-linux-gnueabi/Dockerfile -@@ -1,9 +1,9 @@ --FROM ubuntu:17.10 -+FROM ubuntu:18.04 - RUN apt-get update && apt-get install -y --no-install-recommends \ - gcc \ - ca-certificates \ - libc6-dev \ - libc6-armel-cross \ - libc6-dev-armel-cross \ - binutils-arm-linux-gnueabi \ - gcc-arm-linux-gnueabi \ -diff --git a/third_party/rust/packed_simd/ci/docker/arm-unknown-linux-gnueabihf/Dockerfile b/third_party/rust/packed_simd/ci/docker/arm-unknown-linux-gnueabihf/Dockerfile ---- a/third_party/rust/packed_simd/ci/docker/arm-unknown-linux-gnueabihf/Dockerfile -+++ b/third_party/rust/packed_simd/ci/docker/arm-unknown-linux-gnueabihf/Dockerfile -@@ -1,9 +1,9 @@ --FROM ubuntu:17.10 -+FROM ubuntu:18.04 - RUN apt-get update && apt-get install -y --no-install-recommends \ - gcc \ - ca-certificates \ - libc6-dev \ - gcc-arm-linux-gnueabihf \ - libc6-dev-armhf-cross \ - qemu-user \ - make \ -diff --git a/third_party/rust/packed_simd/ci/docker/armv7-unknown-linux-gnueabihf/Dockerfile b/third_party/rust/packed_simd/ci/docker/armv7-unknown-linux-gnueabihf/Dockerfile ---- a/third_party/rust/packed_simd/ci/docker/armv7-unknown-linux-gnueabihf/Dockerfile -+++ b/third_party/rust/packed_simd/ci/docker/armv7-unknown-linux-gnueabihf/Dockerfile -@@ -1,9 +1,9 @@ --FROM ubuntu:17.10 -+FROM ubuntu:18.04 - RUN apt-get update && apt-get install -y --no-install-recommends \ - gcc \ - ca-certificates \ - libc6-dev \ - gcc-arm-linux-gnueabihf \ - libc6-dev-armhf-cross \ - qemu-user \ - make \ -diff --git a/third_party/rust/packed_simd/ci/docker/i586-unknown-linux-gnu/Dockerfile b/third_party/rust/packed_simd/ci/docker/i586-unknown-linux-gnu/Dockerfile ---- a/third_party/rust/packed_simd/ci/docker/i586-unknown-linux-gnu/Dockerfile -+++ b/third_party/rust/packed_simd/ci/docker/i586-unknown-linux-gnu/Dockerfile -@@ -1,7 +1,7 @@ --FROM ubuntu:17.10 -+FROM ubuntu:18.04 - RUN apt-get update && apt-get install -y --no-install-recommends \ - gcc-multilib \ - libc6-dev \ - file \ - make \ - ca-certificates -diff --git a/third_party/rust/packed_simd/ci/docker/i686-unknown-linux-gnu/Dockerfile b/third_party/rust/packed_simd/ci/docker/i686-unknown-linux-gnu/Dockerfile ---- a/third_party/rust/packed_simd/ci/docker/i686-unknown-linux-gnu/Dockerfile -+++ b/third_party/rust/packed_simd/ci/docker/i686-unknown-linux-gnu/Dockerfile -@@ -1,7 +1,7 @@ --FROM ubuntu:17.10 -+FROM ubuntu:18.04 - RUN apt-get update && apt-get install -y --no-install-recommends \ - gcc-multilib \ - libc6-dev \ - file \ - make \ - ca-certificates -diff --git a/third_party/rust/packed_simd/ci/docker/mips-unknown-linux-gnu/Dockerfile b/third_party/rust/packed_simd/ci/docker/mips-unknown-linux-gnu/Dockerfile ---- a/third_party/rust/packed_simd/ci/docker/mips-unknown-linux-gnu/Dockerfile -+++ b/third_party/rust/packed_simd/ci/docker/mips-unknown-linux-gnu/Dockerfile -@@ -1,9 +1,9 @@ --FROM ubuntu:17.10 -+FROM ubuntu:18.04 - - RUN apt-get update && apt-get install -y --no-install-recommends \ - gcc libc6-dev qemu-user ca-certificates \ - gcc-mips-linux-gnu libc6-dev-mips-cross \ - qemu-system-mips \ - qemu-user \ - make \ - file -diff --git a/third_party/rust/packed_simd/ci/docker/mips64-unknown-linux-gnuabi64/Dockerfile b/third_party/rust/packed_simd/ci/docker/mips64-unknown-linux-gnuabi64/Dockerfile ---- a/third_party/rust/packed_simd/ci/docker/mips64-unknown-linux-gnuabi64/Dockerfile -+++ b/third_party/rust/packed_simd/ci/docker/mips64-unknown-linux-gnuabi64/Dockerfile -@@ -1,9 +1,9 @@ --FROM ubuntu:17.10 -+FROM ubuntu:18.04 - - RUN apt-get update && apt-get install -y --no-install-recommends \ - gcc libc6-dev qemu-user ca-certificates \ - gcc-mips64-linux-gnuabi64 libc6-dev-mips64-cross \ - qemu-system-mips64 qemu-user - - ENV CARGO_TARGET_MIPS64_UNKNOWN_LINUX_GNUABI64_LINKER=mips64-linux-gnuabi64-gcc \ - CARGO_TARGET_MIPS64_UNKNOWN_LINUX_GNUABI64_RUNNER="qemu-mips64 -L /usr/mips64-linux-gnuabi64" \ -diff --git a/third_party/rust/packed_simd/ci/docker/mips64el-unknown-linux-gnuabi64/Dockerfile b/third_party/rust/packed_simd/ci/docker/mips64el-unknown-linux-gnuabi64/Dockerfile ---- a/third_party/rust/packed_simd/ci/docker/mips64el-unknown-linux-gnuabi64/Dockerfile -+++ b/third_party/rust/packed_simd/ci/docker/mips64el-unknown-linux-gnuabi64/Dockerfile -@@ -1,9 +1,9 @@ --FROM ubuntu:17.10 -+FROM ubuntu:18.04 - - RUN apt-get update && apt-get install -y --no-install-recommends \ - gcc libc6-dev qemu-user ca-certificates \ - gcc-mips64el-linux-gnuabi64 libc6-dev-mips64el-cross \ - qemu-system-mips64el - - ENV CARGO_TARGET_MIPS64EL_UNKNOWN_LINUX_GNUABI64_LINKER=mips64el-linux-gnuabi64-gcc \ - CARGO_TARGET_MIPS64EL_UNKNOWN_LINUX_GNUABI64_RUNNER="qemu-mips64el -L /usr/mips64el-linux-gnuabi64" \ -diff --git a/third_party/rust/packed_simd/ci/docker/mipsel-unknown-linux-musl/Dockerfile b/third_party/rust/packed_simd/ci/docker/mipsel-unknown-linux-musl/Dockerfile ---- a/third_party/rust/packed_simd/ci/docker/mipsel-unknown-linux-musl/Dockerfile -+++ b/third_party/rust/packed_simd/ci/docker/mipsel-unknown-linux-musl/Dockerfile -@@ -11,15 +11,15 @@ RUN apt-get update && \ - bzip2 \ - curl \ - file - - RUN mkdir /toolchain - - # Note that this originally came from: - # https://downloads.openwrt.org/snapshots/trunk/malta/generic/OpenWrt-Toolchain-malta-le_gcc-5.3.0_musl-1.1.15.Linux-x86_64.tar.bz2 --RUN curl -L https://s3-us-west-1.amazonaws.com/rust-lang-ci2/libc/OpenWrt-Toolchain-malta-le_gcc-5.3.0_musl-1.1.15.Linux-x86_64.tar.bz2 | \ -+RUN curl -L https://ci-mirrors.rust-lang.org/libc/OpenWrt-Toolchain-malta-le_gcc-5.3.0_musl-1.1.15.Linux-x86_64.tar.bz2 | \ - tar xjf - -C /toolchain --strip-components=2 - - ENV PATH=$PATH:/rust/bin:/toolchain/bin \ - CC_mipsel_unknown_linux_musl=mipsel-openwrt-linux-gcc \ - CARGO_TARGET_MIPSEL_UNKNOWN_LINUX_MUSL_LINKER=mipsel-openwrt-linux-gcc \ -- CARGO_TARGET_MIPSEL_UNKNOWN_LINUX_MUSL_RUNNER="qemu-mipsel -L /toolchain" -\ No newline at end of file -+ CARGO_TARGET_MIPSEL_UNKNOWN_LINUX_MUSL_RUNNER="qemu-mipsel -L /toolchain" -diff --git a/third_party/rust/packed_simd/ci/docker/powerpc-unknown-linux-gnu/Dockerfile b/third_party/rust/packed_simd/ci/docker/powerpc-unknown-linux-gnu/Dockerfile ---- a/third_party/rust/packed_simd/ci/docker/powerpc-unknown-linux-gnu/Dockerfile -+++ b/third_party/rust/packed_simd/ci/docker/powerpc-unknown-linux-gnu/Dockerfile -@@ -1,12 +1,13 @@ --FROM ubuntu:17.10 -+FROM ubuntu:18.04 - - RUN apt-get update && apt-get install -y --no-install-recommends \ - gcc libc6-dev qemu-user ca-certificates \ - gcc-powerpc-linux-gnu libc6-dev-powerpc-cross \ - qemu-system-ppc \ - make \ - file - - ENV CARGO_TARGET_POWERPC_UNKNOWN_LINUX_GNU_LINKER=powerpc-linux-gnu-gcc \ - CARGO_TARGET_POWERPC_UNKNOWN_LINUX_GNU_RUNNER="qemu-ppc -cpu Vger -L /usr/powerpc-linux-gnu" \ -+ CC=powerpc-linux-gnu-gcc \ - OBJDUMP=powerpc-linux-gnu-objdump -diff --git a/third_party/rust/packed_simd/ci/docker/powerpc64-unknown-linux-gnu/Dockerfile b/third_party/rust/packed_simd/ci/docker/powerpc64-unknown-linux-gnu/Dockerfile ---- a/third_party/rust/packed_simd/ci/docker/powerpc64-unknown-linux-gnu/Dockerfile -+++ b/third_party/rust/packed_simd/ci/docker/powerpc64-unknown-linux-gnu/Dockerfile -@@ -1,9 +1,9 @@ --FROM ubuntu:17.10 -+FROM ubuntu:18.04 - - RUN apt-get update && apt-get install -y --no-install-recommends \ - gcc \ - ca-certificates \ - libc6-dev \ - gcc-powerpc64-linux-gnu \ - libc6-dev-ppc64-cross \ - qemu-user \ -diff --git a/third_party/rust/packed_simd/ci/docker/powerpc64le-unknown-linux-gnu/Dockerfile b/third_party/rust/packed_simd/ci/docker/powerpc64le-unknown-linux-gnu/Dockerfile ---- a/third_party/rust/packed_simd/ci/docker/powerpc64le-unknown-linux-gnu/Dockerfile -+++ b/third_party/rust/packed_simd/ci/docker/powerpc64le-unknown-linux-gnu/Dockerfile -@@ -1,9 +1,9 @@ --FROM ubuntu:17.10 -+FROM ubuntu:18.04 - - RUN apt-get update && apt-get install -y --no-install-recommends \ - gcc libc6-dev qemu-user ca-certificates \ - gcc-powerpc64le-linux-gnu libc6-dev-ppc64el-cross \ - qemu-system-ppc file make - - ENV CARGO_TARGET_POWERPC64LE_UNKNOWN_LINUX_GNU_LINKER=powerpc64le-linux-gnu-gcc \ - CARGO_TARGET_POWERPC64LE_UNKNOWN_LINUX_GNU_RUNNER="qemu-ppc64le -L /usr/powerpc64le-linux-gnu" \ -diff --git a/third_party/rust/packed_simd/ci/docker/thumbv7neon-unknown-linux-gnueabihf/Dockerfile b/third_party/rust/packed_simd/ci/docker/thumbv7neon-unknown-linux-gnueabihf/Dockerfile ---- a/third_party/rust/packed_simd/ci/docker/thumbv7neon-unknown-linux-gnueabihf/Dockerfile -+++ b/third_party/rust/packed_simd/ci/docker/thumbv7neon-unknown-linux-gnueabihf/Dockerfile -@@ -1,9 +1,9 @@ --FROM ubuntu:17.10 -+FROM ubuntu:18.04 - RUN apt-get update && apt-get install -y --no-install-recommends \ - gcc \ - ca-certificates \ - libc6-dev \ - gcc-arm-linux-gnueabihf \ - libc6-dev-armhf-cross \ - qemu-user \ - make \ -diff --git a/third_party/rust/packed_simd/ci/docker/x86_64-unknown-linux-gnu/Dockerfile b/third_party/rust/packed_simd/ci/docker/x86_64-unknown-linux-gnu/Dockerfile ---- a/third_party/rust/packed_simd/ci/docker/x86_64-unknown-linux-gnu/Dockerfile -+++ b/third_party/rust/packed_simd/ci/docker/x86_64-unknown-linux-gnu/Dockerfile -@@ -1,9 +1,9 @@ --FROM ubuntu:17.10 -+FROM ubuntu:18.04 - RUN apt-get update && apt-get install -y --no-install-recommends \ - gcc \ - libc6-dev \ - file \ - make \ - ca-certificates \ - cmake \ - libclang-dev \ -diff --git a/third_party/rust/packed_simd/ci/dox.sh b/third_party/rust/packed_simd/ci/dox.sh ---- a/third_party/rust/packed_simd/ci/dox.sh -+++ b/third_party/rust/packed_simd/ci/dox.sh -@@ -13,12 +13,15 @@ cargo doc --features=into_bits - # mdbook build perf-guide -d target/doc/perf-guide - cd perf-guide - mdbook build - cd - - cp -r perf-guide/book target/doc/perf-guide - - # If we're on travis, not a PR, and on the right branch, publish! - if [ "$TRAVIS_PULL_REQUEST" = "false" ] && [ "$TRAVIS_BRANCH" = "master" ]; then -- pip install ghp_import --install-option="--prefix=$HOME/.local" -- $HOME/.local/bin/ghp-import -n target/doc -+ python3 -vV -+ pip -vV -+ python3.9 -vV -+ pip install ghp_import --user -+ ghp-import -n target/doc - git push -qf https://${GH_PAGES}@github.com/${TRAVIS_REPO_SLUG}.git gh-pages - fi -diff --git a/third_party/rust/packed_simd/ci/run.sh b/third_party/rust/packed_simd/ci/run.sh ---- a/third_party/rust/packed_simd/ci/run.sh -+++ b/third_party/rust/packed_simd/ci/run.sh -@@ -73,19 +73,21 @@ cargo_test_impl() { - # Debug run: - if [[ "${TARGET}" != "wasm32-unknown-unknown" ]]; then - # Run wasm32-unknown-unknown in release mode only - cargo_test_impl - fi - - if [[ "${TARGET}" == "x86_64-unknown-linux-gnu" ]] || [[ "${TARGET}" == "x86_64-pc-windows-msvc" ]]; then - # use sleef on linux and windows x86_64 builds -- cargo_test_impl --release --features=into_bits,core_arch,sleef-sys -+ # FIXME: Use `core_arch,sleef-sys` features once they works again -+ cargo_test_impl --release --features=into_bits - else -- cargo_test_impl --release --features=into_bits,core_arch -+ # FIXME: Use `core_arch` feature once it works again -+ cargo_test_impl --release --features=into_bits - fi - - # Verify code generation - if [[ "${NOVERIFY}" != "1" ]]; then - cp -r verify/verify target/verify - export STDSIMD_ASSERT_INSTR_LIMIT=30 - if [[ "${TARGET}" == "i586-unknown-linux-gnu" ]]; then - export STDSIMD_ASSERT_INSTR_LIMIT=50 -diff --git a/third_party/rust/packed_simd/ci/setup_benchmarks.sh b/third_party/rust/packed_simd/ci/setup_benchmarks.sh ---- a/third_party/rust/packed_simd/ci/setup_benchmarks.sh -+++ b/third_party/rust/packed_simd/ci/setup_benchmarks.sh -@@ -1,10 +1,7 @@ - #!/usr/bin/env bash - - set -ex - - # Get latest ISPC binary for the target and put it in the path - git clone https://github.com/gnzlbg/ispc-binaries - cp ispc-binaries/ispc-${TARGET} ispc -- --# Rust-bindgen requires RUSTFMT --rustup component add rustfmt-preview -diff --git a/third_party/rust/packed_simd/src/api.rs b/third_party/rust/packed_simd/src/api.rs ---- a/third_party/rust/packed_simd/src/api.rs -+++ b/third_party/rust/packed_simd/src/api.rs -@@ -1,10 +1,12 @@ - //! Implements the Simd<[T; N]> APIs - -+#[macro_use] -+mod bitmask; - crate mod cast; - #[macro_use] - mod cmp; - #[macro_use] - mod default; - #[macro_use] - mod fmt; - #[macro_use] -@@ -34,17 +36,17 @@ mod swap_bytes; - #[macro_use] - mod bit_manip; - - #[cfg(feature = "into_bits")] - crate mod into_bits; - - macro_rules! impl_i { - ([$elem_ty:ident; $elem_n:expr]: $tuple_id:ident, $mask_ty:ident -- | $ielem_ty:ident | $test_tt:tt | $($elem_ids:ident),* -+ | $ielem_ty:ident, $ibitmask_ty:ident | $test_tt:tt | $($elem_ids:ident),* - | From: $($from_vec_ty:ident),* | $(#[$doc:meta])*) => { - impl_minimal_iuf!([$elem_ty; $elem_n]: $tuple_id | $ielem_ty | $test_tt - | $($elem_ids),* | $(#[$doc])*); - impl_ops_vector_arithmetic!([$elem_ty; $elem_n]: $tuple_id | $test_tt); - impl_ops_scalar_arithmetic!([$elem_ty; $elem_n]: $tuple_id | $test_tt); - impl_ops_vector_bitwise!( - [$elem_ty; $elem_n]: $tuple_id | $test_tt | (!(0 as $elem_ty), 0) - ); -@@ -88,26 +90,27 @@ macro_rules! impl_i { - [$elem_ty; $elem_n]: $tuple_id | $test_tt | (0, 1) - ); - impl_cmp_eq!([$elem_ty; $elem_n]: $tuple_id | $test_tt | (0, 1)); - impl_cmp_vertical!( - [$elem_ty; $elem_n]: $tuple_id, $mask_ty, false, (1, 0) | $test_tt - ); - impl_cmp_partial_ord!([$elem_ty; $elem_n]: $tuple_id | $test_tt); - impl_cmp_ord!([$elem_ty; $elem_n]: $tuple_id | $test_tt | (0, 1)); -+ impl_bitmask!($tuple_id | $ibitmask_ty | (-1, 0) | $test_tt); - - test_select!($elem_ty, $mask_ty, $tuple_id, (1, 2) | $test_tt); - test_cmp_partial_ord_int!([$elem_ty; $elem_n]: $tuple_id | $test_tt); - test_shuffle1_dyn!([$elem_ty; $elem_n]: $tuple_id | $test_tt); - } - } - - macro_rules! impl_u { - ([$elem_ty:ident; $elem_n:expr]: $tuple_id:ident, $mask_ty:ident -- | $ielem_ty:ident | $test_tt:tt | $($elem_ids:ident),* -+ | $ielem_ty:ident, $ibitmask_ty:ident | $test_tt:tt | $($elem_ids:ident),* - | From: $($from_vec_ty:ident),* | $(#[$doc:meta])*) => { - impl_minimal_iuf!([$elem_ty; $elem_n]: $tuple_id | $ielem_ty | $test_tt - | $($elem_ids),* | $(#[$doc])*); - impl_ops_vector_arithmetic!([$elem_ty; $elem_n]: $tuple_id | $test_tt); - impl_ops_scalar_arithmetic!([$elem_ty; $elem_n]: $tuple_id | $test_tt); - impl_ops_vector_bitwise!( - [$elem_ty; $elem_n]: $tuple_id | $test_tt | (!(0 as $elem_ty), 0) - ); -@@ -150,16 +153,18 @@ macro_rules! impl_u { - [$elem_ty; $elem_n]: $tuple_id | $test_tt | (1, 0) - ); - impl_cmp_eq!([$elem_ty; $elem_n]: $tuple_id | $test_tt | (0, 1)); - impl_cmp_vertical!( - [$elem_ty; $elem_n]: $tuple_id, $mask_ty, false, (1, 0) | $test_tt - ); - impl_cmp_partial_ord!([$elem_ty; $elem_n]: $tuple_id | $test_tt); - impl_cmp_ord!([$elem_ty; $elem_n]: $tuple_id | $test_tt | (0, 1)); -+ impl_bitmask!($tuple_id | $ibitmask_ty | ($ielem_ty::max_value(), 0) | -+ $test_tt); - - test_select!($elem_ty, $mask_ty, $tuple_id, (1, 2) | $test_tt); - test_cmp_partial_ord_int!([$elem_ty; $elem_n]: $tuple_id | $test_tt); - test_shuffle1_dyn!([$elem_ty; $elem_n]: $tuple_id | $test_tt); - } - } - - macro_rules! impl_f { -@@ -217,17 +222,18 @@ macro_rules! impl_f { - test_reduction_float_min_max!( - [$elem_ty; $elem_n]: $tuple_id | $test_tt - ); - test_shuffle1_dyn!([$elem_ty; $elem_n]: $tuple_id | $test_tt); - } - } - - macro_rules! impl_m { -- ([$elem_ty:ident; $elem_n:expr]: $tuple_id:ident | $ielem_ty:ident -+ ([$elem_ty:ident; $elem_n:expr]: $tuple_id:ident -+ | $ielem_ty:ident, $ibitmask_ty:ident - | $test_tt:tt | $($elem_ids:ident),* | From: $($from_vec_ty:ident),* - | $(#[$doc:meta])*) => { - impl_minimal_mask!( - [$elem_ty; $elem_n]: $tuple_id | $ielem_ty | $test_tt - | $($elem_ids),* | $(#[$doc])* - ); - impl_ops_vector_mask_bitwise!( - [$elem_ty; $elem_n]: $tuple_id | $test_tt | (true, false) -@@ -260,16 +266,17 @@ macro_rules! impl_m { - | $test_tt - ); - impl_select!([$elem_ty; $elem_n]: $tuple_id | $test_tt); - impl_cmp_partial_ord!([$elem_ty; $elem_n]: $tuple_id | $test_tt); - impl_cmp_ord!( - [$elem_ty; $elem_n]: $tuple_id | $test_tt | (false, true) - ); - impl_shuffle1_dyn!([$elem_ty; $elem_n]: $tuple_id | $test_tt); -+ impl_bitmask!($tuple_id | $ibitmask_ty | (true, false) | $test_tt); - - test_cmp_partial_ord_mask!([$elem_ty; $elem_n]: $tuple_id | $test_tt); - test_shuffle1_dyn_mask!([$elem_ty; $elem_n]: $tuple_id | $test_tt); - } - } - - macro_rules! impl_const_p { - ([$elem_ty:ty; $elem_n:expr]: $tuple_id:ident, $mask_ty:ident, -diff --git a/third_party/rust/packed_simd/src/api/bit_manip.rs b/third_party/rust/packed_simd/src/api/bit_manip.rs ---- a/third_party/rust/packed_simd/src/api/bit_manip.rs -+++ b/third_party/rust/packed_simd/src/api/bit_manip.rs -@@ -32,16 +32,17 @@ macro_rules! impl_bit_manip { - } - } - - test_if! { - $test_tt: - paste::item_with_macros! { - #[allow(overflowing_literals)] - pub mod [<$id _bit_manip>] { -+ #![allow(const_item_mutation)] - use super::*; - - const LANE_WIDTH: usize = mem::size_of::<$elem_ty>() * 8; - - macro_rules! test_func { - ($x:expr, $func:ident) => {{ - let mut actual = $x; - for i in 0..$id::lanes() { -diff --git a/third_party/rust/packed_simd/src/api/bitmask.rs b/third_party/rust/packed_simd/src/api/bitmask.rs -new file mode 100644 ---- /dev/null -+++ b/third_party/rust/packed_simd/src/api/bitmask.rs -@@ -0,0 +1,82 @@ -+//! Bitmask API -+ -+macro_rules! impl_bitmask { -+ ($id:ident | $ibitmask_ty:ident | ($set:expr, $clear:expr) -+ | $test_tt:tt) => { -+ impl $id { -+ /// Creates a bitmask with the MSB of each vector lane. -+ /// -+ /// If the vector has less than 8 lanes, the bits that do not -+ /// correspond to any vector lanes are cleared. -+ #[inline] -+ pub fn bitmask(self) -> $ibitmask_ty { -+ unsafe { codegen::llvm::simd_bitmask(self.0) } -+ } -+ } -+ -+ test_if! { -+ $test_tt: -+ paste::item! { -+ #[cfg(not(any( -+ // FIXME: https://github.com/rust-lang-nursery/packed_simd/issues/210 -+ all(target_arch = "mips", target_endian = "big"), -+ all(target_arch = "mips64", target_endian = "big"), -+ target_arch = "sparc64", -+ target_arch = "s390x", -+ )))] -+ pub mod [<$id _bitmask>] { -+ use super::*; -+ #[cfg_attr(not(target_arch = "wasm32"), test)] -+ #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)] -+ fn bitmask() { -+ // clear all lanes -+ let vec = $id::splat($clear as _); -+ let bitmask: $ibitmask_ty = 0; -+ assert_eq!(vec.bitmask(), bitmask); -+ -+ // set even lanes -+ let mut vec = $id::splat($clear as _); -+ for i in 0..$id::lanes() { -+ if i % 2 == 0 { -+ vec = vec.replace(i, $set as _); -+ } -+ } -+ // create bitmask with even lanes set: -+ let mut bitmask: $ibitmask_ty = 0; -+ for i in 0..$id::lanes() { -+ if i % 2 == 0 { -+ bitmask |= 1 << i; -+ } -+ } -+ assert_eq!(vec.bitmask(), bitmask); -+ -+ -+ // set odd lanes -+ let mut vec = $id::splat($clear as _); -+ for i in 0..$id::lanes() { -+ if i % 2 != 0 { -+ vec = vec.replace(i, $set as _); -+ } -+ } -+ // create bitmask with odd lanes set: -+ let mut bitmask: $ibitmask_ty = 0; -+ for i in 0..$id::lanes() { -+ if i % 2 != 0 { -+ bitmask |= 1 << i; -+ } -+ } -+ assert_eq!(vec.bitmask(), bitmask); -+ -+ // set all lanes -+ let vec = $id::splat($set as _); -+ let mut bitmask: $ibitmask_ty = 0; -+ for i in 0..$id::lanes() { -+ bitmask |= 1 << i; -+ } -+ assert_eq!(vec.bitmask(), bitmask); -+ } -+ } -+ } -+ } -+ }; -+} -diff --git a/third_party/rust/packed_simd/src/api/cast/v128.rs b/third_party/rust/packed_simd/src/api/cast/v128.rs ---- a/third_party/rust/packed_simd/src/api/cast/v128.rs -+++ b/third_party/rust/packed_simd/src/api/cast/v128.rs -@@ -1,10 +1,10 @@ - //! `FromCast` and `IntoCast` implementations for portable 128-bit wide vectors --#![rustfmt::skip] -+#[rustfmt::skip] - - use crate::*; - - impl_from_cast!( - i8x16[test_v128]: u8x16, m8x16, i16x16, u16x16, m16x16, i32x16, u32x16, f32x16, m32x16 - ); - impl_from_cast!( - u8x16[test_v128]: i8x16, m8x16, i16x16, u16x16, m16x16, i32x16, u32x16, f32x16, m32x16 -diff --git a/third_party/rust/packed_simd/src/api/cast/v16.rs b/third_party/rust/packed_simd/src/api/cast/v16.rs ---- a/third_party/rust/packed_simd/src/api/cast/v16.rs -+++ b/third_party/rust/packed_simd/src/api/cast/v16.rs -@@ -1,10 +1,10 @@ - //! `FromCast` and `IntoCast` implementations for portable 16-bit wide vectors --#![rustfmt::skip] -+#[rustfmt::skip] - - use crate::*; - - impl_from_cast!( - i8x2[test_v16]: u8x2, m8x2, i16x2, u16x2, m16x2, i32x2, u32x2, f32x2, m32x2, - i64x2, u64x2, f64x2, m64x2, i128x2, u128x2, m128x2, isizex2, usizex2, msizex2 - ); - impl_from_cast!( -diff --git a/third_party/rust/packed_simd/src/api/cast/v256.rs b/third_party/rust/packed_simd/src/api/cast/v256.rs ---- a/third_party/rust/packed_simd/src/api/cast/v256.rs -+++ b/third_party/rust/packed_simd/src/api/cast/v256.rs -@@ -1,10 +1,10 @@ - //! `FromCast` and `IntoCast` implementations for portable 256-bit wide vectors --#![rustfmt::skip] -+#[rustfmt::skip] - - use crate::*; - - impl_from_cast!(i8x32[test_v256]: u8x32, m8x32, i16x32, u16x32, m16x32); - impl_from_cast!(u8x32[test_v256]: i8x32, m8x32, i16x32, u16x32, m16x32); - impl_from_cast_mask!(m8x32[test_v256]: i8x32, u8x32, i16x32, u16x32, m16x32); - - impl_from_cast!( -diff --git a/third_party/rust/packed_simd/src/api/cast/v32.rs b/third_party/rust/packed_simd/src/api/cast/v32.rs ---- a/third_party/rust/packed_simd/src/api/cast/v32.rs -+++ b/third_party/rust/packed_simd/src/api/cast/v32.rs -@@ -1,10 +1,10 @@ - //! `FromCast` and `IntoCast` implementations for portable 32-bit wide vectors --#![rustfmt::skip] -+#[rustfmt::skip] - - use crate::*; - - impl_from_cast!( - i8x4[test_v32]: u8x4, m8x4, i16x4, u16x4, m16x4, i32x4, u32x4, f32x4, m32x4, - i64x4, u64x4, f64x4, m64x4, i128x4, u128x4, m128x4, isizex4, usizex4, msizex4 - ); - impl_from_cast!( -diff --git a/third_party/rust/packed_simd/src/api/cast/v512.rs b/third_party/rust/packed_simd/src/api/cast/v512.rs ---- a/third_party/rust/packed_simd/src/api/cast/v512.rs -+++ b/third_party/rust/packed_simd/src/api/cast/v512.rs -@@ -1,10 +1,10 @@ - //! `FromCast` and `IntoCast` implementations for portable 512-bit wide vectors --#![rustfmt::skip] -+#[rustfmt::skip] - - use crate::*; - - impl_from_cast!(i8x64[test_v512]: u8x64, m8x64); - impl_from_cast!(u8x64[test_v512]: i8x64, m8x64); - impl_from_cast_mask!(m8x64[test_v512]: i8x64, u8x64); - - impl_from_cast!(i16x32[test_v512]: i8x32, u8x32, m8x32, u16x32, m16x32); -diff --git a/third_party/rust/packed_simd/src/api/cast/v64.rs b/third_party/rust/packed_simd/src/api/cast/v64.rs ---- a/third_party/rust/packed_simd/src/api/cast/v64.rs -+++ b/third_party/rust/packed_simd/src/api/cast/v64.rs -@@ -1,10 +1,10 @@ - //! `FromCast` and `IntoCast` implementations for portable 64-bit wide vectors --#![rustfmt::skip] -+#[rustfmt::skip] - - use crate::*; - - impl_from_cast!( - i8x8[test_v64]: u8x8, m8x8, i16x8, u16x8, m16x8, i32x8, u32x8, f32x8, m32x8, - i64x8, u64x8, f64x8, m64x8, isizex8, usizex8, msizex8 - ); - impl_from_cast!( -diff --git a/third_party/rust/packed_simd/src/api/default.rs b/third_party/rust/packed_simd/src/api/default.rs ---- a/third_party/rust/packed_simd/src/api/default.rs -+++ b/third_party/rust/packed_simd/src/api/default.rs -@@ -7,16 +7,18 @@ macro_rules! impl_default { - fn default() -> Self { - Self::splat($elem_ty::default()) - } - } - - test_if!{ - $test_tt: - paste::item! { -+ // Comparisons use integer casts within mantissa^1 range. -+ #[allow(clippy::float_cmp)] - pub mod [<$id _default>] { - use super::*; - #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)] - fn default() { - let a = $id::default(); - for i in 0..$id::lanes() { - assert_eq!(a.extract(i), $elem_ty::default()); - } -diff --git a/third_party/rust/packed_simd/src/api/from/from_array.rs b/third_party/rust/packed_simd/src/api/from/from_array.rs ---- a/third_party/rust/packed_simd/src/api/from/from_array.rs -+++ b/third_party/rust/packed_simd/src/api/from/from_array.rs -@@ -51,16 +51,18 @@ macro_rules! impl_from_array { - unsafe { U { array: self }.vec } - } - } - */ - - test_if! { - $test_tt: - paste::item! { -+ // Comparisons use integer casts within mantissa^1 range. -+ #[allow(clippy::float_cmp)] - mod [<$id _from>] { - use super::*; - #[test] - fn array() { - let vec: $id = Default::default(); - - // FIXME: Workaround for arrays with more than 32 - // elements. -diff --git a/third_party/rust/packed_simd/src/api/hash.rs b/third_party/rust/packed_simd/src/api/hash.rs ---- a/third_party/rust/packed_simd/src/api/hash.rs -+++ b/third_party/rust/packed_simd/src/api/hash.rs -@@ -31,16 +31,18 @@ macro_rules! impl_hash { - crate::mem::size_of::(), - crate::mem::size_of::<$id>() - ); - #[allow(deprecated)] - let mut a_hash = SipHasher13::new(); - let mut v_hash = a_hash.clone(); - a.hash(&mut a_hash); - -+ // Integer within mantissa^1 range. -+ #[allow(clippy::float_cmp)] - let v = $id::splat(42 as $elem_ty); - v.hash(&mut v_hash); - assert_eq!(a_hash.finish(), v_hash.finish()); - } - } - } - } - }; -diff --git a/third_party/rust/packed_simd/src/api/into_bits/arch_specific.rs b/third_party/rust/packed_simd/src/api/into_bits/arch_specific.rs ---- a/third_party/rust/packed_simd/src/api/into_bits/arch_specific.rs -+++ b/third_party/rust/packed_simd/src/api/into_bits/arch_specific.rs -@@ -1,11 +1,11 @@ - //! `FromBits` and `IntoBits` between portable vector types and the - //! architecture-specific vector types. --#![rustfmt::skip] -+#[rustfmt::skip] - - // FIXME: MIPS FromBits/IntoBits - - #[allow(unused)] - use crate::*; - - /// This macro implements FromBits for the portable and the architecture - /// specific vector types. -@@ -79,17 +79,16 @@ macro_rules! impl_arch { - } - - //////////////////////////////////////////////////////////////////////////////// - // Implementations for the 64-bit wide vector types: - - // FIXME: 64-bit single element types - // FIXME: arm/aarch float16x4_t missing - impl_arch!( -- [x86["x86"]: __m64], [x86_64["x86_64"]: __m64], - [arm["arm"]: int8x8_t, uint8x8_t, poly8x8_t, int16x4_t, uint16x4_t, - poly16x4_t, int32x2_t, uint32x2_t, float32x2_t, int64x1_t, - uint64x1_t], - [aarch64["aarch64"]: int8x8_t, uint8x8_t, poly8x8_t, int16x4_t, uint16x4_t, - poly16x4_t, int32x2_t, uint32x2_t, float32x2_t, int64x1_t, uint64x1_t, - float64x1_t] | - from: i8x8, u8x8, m8x8, i16x4, u16x4, m16x4, i32x2, u32x2, f32x2, m32x2 | - into: i8x8, u8x8, i16x4, u16x4, i32x2, u32x2, f32x2 | -diff --git a/third_party/rust/packed_simd/src/api/into_bits/v128.rs b/third_party/rust/packed_simd/src/api/into_bits/v128.rs ---- a/third_party/rust/packed_simd/src/api/into_bits/v128.rs -+++ b/third_party/rust/packed_simd/src/api/into_bits/v128.rs -@@ -1,10 +1,10 @@ - //! `FromBits` and `IntoBits` implementations for portable 128-bit wide vectors --#![rustfmt::skip] -+#[rustfmt::skip] - - #[allow(unused)] // wasm_bindgen_test - use crate::*; - - impl_from_bits!(i8x16[test_v128]: u8x16, m8x16, i16x8, u16x8, m16x8, i32x4, u32x4, f32x4, m32x4, i64x2, u64x2, f64x2, m64x2, i128x1, u128x1, m128x1); - impl_from_bits!(u8x16[test_v128]: i8x16, m8x16, i16x8, u16x8, m16x8, i32x4, u32x4, f32x4, m32x4, i64x2, u64x2, f64x2, m64x2, i128x1, u128x1, m128x1); - impl_from_bits!(m8x16[test_v128]: m16x8, m32x4, m64x2, m128x1); - -diff --git a/third_party/rust/packed_simd/src/api/into_bits/v16.rs b/third_party/rust/packed_simd/src/api/into_bits/v16.rs ---- a/third_party/rust/packed_simd/src/api/into_bits/v16.rs -+++ b/third_party/rust/packed_simd/src/api/into_bits/v16.rs -@@ -1,9 +1,9 @@ - //! `FromBits` and `IntoBits` implementations for portable 16-bit wide vectors --#![rustfmt::skip] -+#[rustfmt::skip] - - #[allow(unused)] // wasm_bindgen_test - use crate::*; - - impl_from_bits!(i8x2[test_v16]: u8x2, m8x2); - impl_from_bits!(u8x2[test_v16]: i8x2, m8x2); - // note: m8x2 cannot be constructed from all i8x2 or u8x2 bit patterns -diff --git a/third_party/rust/packed_simd/src/api/into_bits/v256.rs b/third_party/rust/packed_simd/src/api/into_bits/v256.rs ---- a/third_party/rust/packed_simd/src/api/into_bits/v256.rs -+++ b/third_party/rust/packed_simd/src/api/into_bits/v256.rs -@@ -1,10 +1,10 @@ - //! `FromBits` and `IntoBits` implementations for portable 256-bit wide vectors --#![rustfmt::skip] -+#[rustfmt::skip] - - #[allow(unused)] // wasm_bindgen_test - use crate::*; - - impl_from_bits!(i8x32[test_v256]: u8x32, m8x32, i16x16, u16x16, m16x16, i32x8, u32x8, f32x8, m32x8, i64x4, u64x4, f64x4, m64x4, i128x2, u128x2, m128x2); - impl_from_bits!(u8x32[test_v256]: i8x32, m8x32, i16x16, u16x16, m16x16, i32x8, u32x8, f32x8, m32x8, i64x4, u64x4, f64x4, m64x4, i128x2, u128x2, m128x2); - impl_from_bits!(m8x32[test_v256]: m16x16, m32x8, m64x4, m128x2); - -diff --git a/third_party/rust/packed_simd/src/api/into_bits/v32.rs b/third_party/rust/packed_simd/src/api/into_bits/v32.rs ---- a/third_party/rust/packed_simd/src/api/into_bits/v32.rs -+++ b/third_party/rust/packed_simd/src/api/into_bits/v32.rs -@@ -1,10 +1,10 @@ - //! `FromBits` and `IntoBits` implementations for portable 32-bit wide vectors --#![rustfmt::skip] -+#[rustfmt::skip] - - #[allow(unused)] // wasm_bindgen_test - use crate::*; - - impl_from_bits!(i8x4[test_v32]: u8x4, m8x4, i16x2, u16x2, m16x2); - impl_from_bits!(u8x4[test_v32]: i8x4, m8x4, i16x2, u16x2, m16x2); - impl_from_bits!(m8x4[test_v32]: m16x2); - -diff --git a/third_party/rust/packed_simd/src/api/into_bits/v512.rs b/third_party/rust/packed_simd/src/api/into_bits/v512.rs ---- a/third_party/rust/packed_simd/src/api/into_bits/v512.rs -+++ b/third_party/rust/packed_simd/src/api/into_bits/v512.rs -@@ -1,10 +1,10 @@ - //! `FromBits` and `IntoBits` implementations for portable 512-bit wide vectors --#![rustfmt::skip] -+#[rustfmt::skip] - - #[allow(unused)] // wasm_bindgen_test - use crate::*; - - impl_from_bits!(i8x64[test_v512]: u8x64, m8x64, i16x32, u16x32, m16x32, i32x16, u32x16, f32x16, m32x16, i64x8, u64x8, f64x8, m64x8, i128x4, u128x4, m128x4); - impl_from_bits!(u8x64[test_v512]: i8x64, m8x64, i16x32, u16x32, m16x32, i32x16, u32x16, f32x16, m32x16, i64x8, u64x8, f64x8, m64x8, i128x4, u128x4, m128x4); - impl_from_bits!(m8x64[test_v512]: m16x32, m32x16, m64x8, m128x4); - -diff --git a/third_party/rust/packed_simd/src/api/into_bits/v64.rs b/third_party/rust/packed_simd/src/api/into_bits/v64.rs ---- a/third_party/rust/packed_simd/src/api/into_bits/v64.rs -+++ b/third_party/rust/packed_simd/src/api/into_bits/v64.rs -@@ -1,10 +1,10 @@ - //! `FromBits` and `IntoBits` implementations for portable 64-bit wide vectors --#![rustfmt::skip] -+#[rustfmt::skip] - - #[allow(unused)] // wasm_bindgen_test - use crate::*; - - impl_from_bits!(i8x8[test_v64]: u8x8, m8x8, i16x4, u16x4, m16x4, i32x2, u32x2, f32x2, m32x2); - impl_from_bits!(u8x8[test_v64]: i8x8, m8x8, i16x4, u16x4, m16x4, i32x2, u32x2, f32x2, m32x2); - impl_from_bits!(m8x8[test_v64]: m16x4, m32x2); - -diff --git a/third_party/rust/packed_simd/src/api/minimal/iuf.rs b/third_party/rust/packed_simd/src/api/minimal/iuf.rs ---- a/third_party/rust/packed_simd/src/api/minimal/iuf.rs -+++ b/third_party/rust/packed_simd/src/api/minimal/iuf.rs -@@ -48,17 +48,17 @@ macro_rules! impl_minimal_iuf { - #[inline] - pub fn extract(self, index: usize) -> $elem_ty { - assert!(index < $elem_count); - unsafe { self.extract_unchecked(index) } - } - - /// Extracts the value at `index`. - /// -- /// # Precondition -+ /// # Safety - /// - /// If `index >= Self::lanes()` the behavior is undefined. - #[inline] - pub unsafe fn extract_unchecked(self, index: usize) -> $elem_ty { - use crate::llvm::simd_extract; - let e: $ielem_ty = simd_extract(self.0, index as u32); - e as $elem_ty - } -@@ -75,17 +75,17 @@ macro_rules! impl_minimal_iuf { - ] - pub fn replace(self, index: usize, new_value: $elem_ty) -> Self { - assert!(index < $elem_count); - unsafe { self.replace_unchecked(index, new_value) } - } - - /// Returns a new vector where the value at `index` is replaced by `new_value`. - /// -- /// # Precondition -+ /// # Safety - /// - /// If `index >= Self::lanes()` the behavior is undefined. - #[inline] - #[must_use = "replace_unchecked does not modify the original value - \ - it returns a new vector with the value at `index` \ - replaced by `new_value`d" - ] - pub unsafe fn replace_unchecked( -@@ -96,16 +96,18 @@ macro_rules! impl_minimal_iuf { - use crate::llvm::simd_insert; - Simd(simd_insert(self.0, index as u32, new_value as $ielem_ty)) - } - } - - test_if!{ - $test_tt: - paste::item! { -+ // Comparisons use integer casts within mantissa^1 range. -+ #[allow(clippy::float_cmp)] - pub mod [<$id _minimal>] { - use super::*; - #[cfg_attr(not(target_arch = "wasm32"), test)] - #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)] - fn minimal() { - // lanes: - assert_eq!($elem_count, $id::lanes()); - -diff --git a/third_party/rust/packed_simd/src/api/minimal/mask.rs b/third_party/rust/packed_simd/src/api/minimal/mask.rs ---- a/third_party/rust/packed_simd/src/api/minimal/mask.rs -+++ b/third_party/rust/packed_simd/src/api/minimal/mask.rs -@@ -53,16 +53,18 @@ macro_rules! impl_minimal_mask { - #[inline] - pub fn extract(self, index: usize) -> bool { - assert!(index < $elem_count); - unsafe { self.extract_unchecked(index) } - } - - /// Extracts the value at `index`. - /// -+ /// # Safety -+ /// - /// If `index >= Self::lanes()` the behavior is undefined. - #[inline] - pub unsafe fn extract_unchecked(self, index: usize) -> bool { - use crate::llvm::simd_extract; - let x: $ielem_ty = simd_extract(self.0, index as u32); - x != 0 - } - -@@ -80,19 +82,19 @@ macro_rules! impl_minimal_mask { - pub fn replace(self, index: usize, new_value: bool) -> Self { - assert!(index < $elem_count); - unsafe { self.replace_unchecked(index, new_value) } - } - - /// Returns a new vector where the value at `index` is replaced by - /// `new_value`. - /// -- /// # Panics -+ /// # Safety - /// -- /// If `index >= Self::lanes()`. -+ /// If `index >= Self::lanes()` the behavior is undefined. - #[inline] - #[must_use = "replace_unchecked does not modify the original value - \ - it returns a new vector with the value at `index` \ - replaced by `new_value`d" - ] - pub unsafe fn replace_unchecked( - self, - index: usize, -diff --git a/third_party/rust/packed_simd/src/api/minimal/ptr.rs b/third_party/rust/packed_simd/src/api/minimal/ptr.rs ---- a/third_party/rust/packed_simd/src/api/minimal/ptr.rs -+++ b/third_party/rust/packed_simd/src/api/minimal/ptr.rs -@@ -63,17 +63,17 @@ macro_rules! impl_minimal_p { - #[inline] - pub fn extract(self, index: usize) -> $elem_ty { - assert!(index < $elem_count); - unsafe { self.extract_unchecked(index) } - } - - /// Extracts the value at `index`. - /// -- /// # Precondition -+ /// # Safety - /// - /// If `index >= Self::lanes()` the behavior is undefined. - #[inline] - pub unsafe fn extract_unchecked(self, index: usize) -> $elem_ty { - use crate::llvm::simd_extract; - simd_extract(self.0, index as u32) - } - -@@ -91,17 +91,17 @@ macro_rules! impl_minimal_p { - #[allow(clippy::not_unsafe_ptr_arg_deref)] - pub fn replace(self, index: usize, new_value: $elem_ty) -> Self { - assert!(index < $elem_count); - unsafe { self.replace_unchecked(index, new_value) } - } - - /// Returns a new vector where the value at `index` is replaced by `new_value`. - /// -- /// # Precondition -+ /// # Safety - /// - /// If `index >= Self::lanes()` the behavior is undefined. - #[inline] - #[must_use = "replace_unchecked does not modify the original value - \ - it returns a new vector with the value at `index` \ - replaced by `new_value`d" - ] - pub unsafe fn replace_unchecked( -@@ -210,17 +210,17 @@ macro_rules! impl_minimal_p { - impl crate::fmt::Debug for $id { - #[allow(clippy::missing_inline_in_public_items)] - fn fmt(&self, f: &mut crate::fmt::Formatter<'_>) - -> crate::fmt::Result { - write!( - f, - "{}<{}>(", - stringify!($id), -- unsafe { crate::intrinsics::type_name::() } -+ crate::intrinsics::type_name::() - )?; - for i in 0..$elem_count { - if i > 0 { - write!(f, ", ")?; - } - self.extract(i).fmt(f)?; - } - write!(f, ")") -@@ -545,21 +545,17 @@ macro_rules! impl_minimal_p { - let values = [1_i32; $elem_count]; - - let mut vec: $id = Default::default(); - let mut array = [ - $id::::null().extract(0); $elem_count - ]; - - for i in 0..$elem_count { -- let ptr = unsafe { -- crate::mem::transmute( -- &values[i] as *const i32 -- ) -- }; -+ let ptr = &values[i] as *const i32 as *mut i32; - vec = vec.replace(i, ptr); - array[i] = ptr; - } - - // FIXME: there is no impl of From<$id> for [$elem_ty; N] - // let a0 = From::from(vec); - // assert_eq!(a0, array); - #[allow(unused_assignments)] -@@ -606,30 +602,30 @@ macro_rules! impl_minimal_p { - unsafe { - assert!(slice.len() >= $elem_count); - Self::from_slice_unaligned_unchecked(slice) - } - } - - /// Instantiates a new vector with the values of the `slice`. - /// -- /// # Precondition -+ /// # Safety - /// - /// If `slice.len() < Self::lanes()` or `&slice[0]` is not aligned - /// to an `align_of::()` boundary, the behavior is undefined. - #[inline] - pub unsafe fn from_slice_aligned_unchecked(slice: &[$elem_ty]) - -> Self { - #[allow(clippy::cast_ptr_alignment)] - *(slice.get_unchecked(0) as *const $elem_ty as *const Self) - } - - /// Instantiates a new vector with the values of the `slice`. - /// -- /// # Precondition -+ /// # Safety - /// - /// If `slice.len() < Self::lanes()` the behavior is undefined. - #[inline] - pub unsafe fn from_slice_unaligned_unchecked( - slice: &[$elem_ty], - ) -> Self { - use crate::mem::size_of; - let target_ptr = -@@ -822,33 +818,33 @@ macro_rules! impl_minimal_p { - unsafe { - assert!(slice.len() >= $elem_count); - self.write_to_slice_unaligned_unchecked(slice); - } - } - - /// Writes the values of the vector to the `slice`. - /// -- /// # Precondition -+ /// # Safety - /// - /// If `slice.len() < Self::lanes()` or `&slice[0]` is not - /// aligned to an `align_of::()` boundary, the behavior is - /// undefined. - #[inline] - pub unsafe fn write_to_slice_aligned_unchecked( - self, slice: &mut [$elem_ty], - ) { - #[allow(clippy::cast_ptr_alignment)] - *(slice.get_unchecked_mut(0) as *mut $elem_ty as *mut Self) = - self; - } - - /// Writes the values of the vector to the `slice`. - /// -- /// # Precondition -+ /// # Safety - /// - /// If `slice.len() < Self::lanes()` the behavior is undefined. - #[inline] - pub unsafe fn write_to_slice_unaligned_unchecked( - self, slice: &mut [$elem_ty], - ) { - let target_ptr = - slice.get_unchecked_mut(0) as *mut $elem_ty as *mut u8; -@@ -1020,21 +1016,17 @@ macro_rules! impl_minimal_p { - - let mut vec: $id = Default::default(); - let mut array = [ - $id::::null().extract(0); - $elem_count - ]; - - for i in 0..$elem_count { -- let ptr = unsafe { -- crate::mem::transmute( -- &values[i] as *const i32 -- ) -- }; -+ let ptr = &values[i] as *const i32 as *mut i32; - vec = vec.replace(i, ptr); - array[i] = ptr; - } - - #[allow(deprecated)] - let mut a_hash = SipHasher13::new(); - let mut v_hash = a_hash.clone(); - array.hash(&mut a_hash); -@@ -1146,17 +1138,17 @@ macro_rules! impl_minimal_p { - /// allocation. For instance, no known 64-bit platform can ever - /// serve a request for 263 bytes due to page-table limitations or - /// splitting the address space. However, some 32-bit and 16-bit - /// platforms may successfully serve a request for more than - /// `isize::MAX` bytes with things like Physical Address Extension. - /// As such, memory acquired directly from allocators or memory - /// mapped files may be too large to handle with this function. - /// -- /// Consider using wrapping_offset_from instead if these constraints -+ /// Consider using `wrapping_offset_from` instead if these constraints - /// are difficult to satisfy. The only advantage of this method is - /// that it enables more aggressive compiler optimizations. - #[inline] - pub unsafe fn offset_from(self, origin: Self) -> $isize_ty { - // FIXME: should use LLVM's `sub nsw nuw`. - self.wrapping_offset_from(origin) - } - -diff --git a/third_party/rust/packed_simd/src/api/ops/vector_float_min_max.rs b/third_party/rust/packed_simd/src/api/ops/vector_float_min_max.rs ---- a/third_party/rust/packed_simd/src/api/ops/vector_float_min_max.rs -+++ b/third_party/rust/packed_simd/src/api/ops/vector_float_min_max.rs -@@ -21,16 +21,21 @@ macro_rules! impl_ops_vector_float_min_m - pub fn max(self, x: Self) -> Self { - use crate::llvm::simd_fmax; - unsafe { Simd(simd_fmax(self.0, x.0)) } - } - } - test_if!{ - $test_tt: - paste::item! { -+ #[cfg(not(any( -+ // FIXME: https://github.com/rust-lang-nursery/packed_simd/issues/223 -+ all(target_arch = "mips", target_endian = "big"), -+ target_arch = "mips64", -+ )))] - pub mod [<$id _ops_vector_min_max>] { - use super::*; - #[cfg_attr(not(target_arch = "wasm32"), test)] #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)] - fn min_max() { - let n = crate::$elem_ty::NAN; - let o = $id::splat(1. as $elem_ty); - let t = $id::splat(2. as $elem_ty); - -diff --git a/third_party/rust/packed_simd/src/api/ptr/gather_scatter.rs b/third_party/rust/packed_simd/src/api/ptr/gather_scatter.rs ---- a/third_party/rust/packed_simd/src/api/ptr/gather_scatter.rs -+++ b/third_party/rust/packed_simd/src/api/ptr/gather_scatter.rs -@@ -44,19 +44,19 @@ macro_rules! impl_ptr_read { - let mut v = [0_i32; $elem_count]; - for i in 0..$elem_count { - v[i] = i as i32; - } - - let mut ptr = $id::::null(); - - for i in 0..$elem_count { -- ptr = ptr.replace(i, unsafe { -- crate::mem::transmute(&v[i] as *const i32) -- }); -+ ptr = ptr.replace(i, -+ &v[i] as *const i32 as *mut i32 -+ ); - } - - // all mask elements are true: - let mask = $mask_ty::splat(true); - let def = Simd::<[i32; $elem_count]>::splat(42_i32); - let r: Simd<[i32; $elem_count]> = unsafe { - ptr.read(mask, def) - }; -@@ -130,42 +130,18 @@ macro_rules! impl_ptr_write { - #[inline] - pub unsafe fn write( - self, mask: Simd<[M; $elem_count]>, - value: Simd<[T; $elem_count]>, - ) where - M: sealed::Mask, - [M; $elem_count]: sealed::SimdArray, - { -- // FIXME: -- // https://github.com/rust-lang-nursery/packed_simd/issues/85 -- #[cfg(not(target_arch = "mips"))] -- { -- use crate::llvm::simd_scatter; -- simd_scatter(value.0, self.0, mask.0) -- } -- #[cfg(target_arch = "mips")] -- { -- let m_ptr = -- &mask as *const Simd<[M; $elem_count]> as *const M; -- for i in 0..$elem_count { -- let m = ptr::read(m_ptr.add(i)); -- if m.test() { -- let t_ptr = &self -- as *const Simd<[*mut T; $elem_count]> -- as *mut *mut T; -- let v_ptr = &value as *const Simd<[T; $elem_count]> -- as *const T; -- ptr::write( -- ptr::read(t_ptr.add(i)), -- ptr::read(v_ptr.add(i)), -- ); -- } -- } -- } -+ use crate::llvm::simd_scatter; -+ simd_scatter(value.0, self.0, mask.0) - } - } - - test_if! { - $test_tt: - paste::item! { - mod [<$id _write>] { - use super::*; -@@ -180,17 +156,17 @@ macro_rules! impl_ptr_write { - for i in 0..$elem_count { - arr[i] = i as i32; - } - // arr = [0, 1, 2, ...] - - let mut ptr = $id::::null(); - for i in 0..$elem_count { - ptr = ptr.replace(i, unsafe { -- crate::mem::transmute(arr.as_ptr().add(i)) -+ arr.as_ptr().add(i) as *mut i32 - }); - } - // ptr = [&arr[0], &arr[1], ...] - - // write `fourty_two` to all elements of `v` - { - let backup = arr; - unsafe { -diff --git a/third_party/rust/packed_simd/src/api/reductions/float_arithmetic.rs b/third_party/rust/packed_simd/src/api/reductions/float_arithmetic.rs ---- a/third_party/rust/packed_simd/src/api/reductions/float_arithmetic.rs -+++ b/third_party/rust/packed_simd/src/api/reductions/float_arithmetic.rs -@@ -88,16 +88,18 @@ macro_rules! impl_reduction_float_arithm - fn product>(iter: I) -> $id { - iter.fold($id::splat(1.), |a, b| crate::ops::Mul::mul(a, *b)) - } - } - - test_if! { - $test_tt: - paste::item! { -+ // Comparisons use integer casts within mantissa^1 range. -+ #[allow(clippy::float_cmp)] - pub mod [<$id _reduction_float_arith>] { - use super::*; - fn alternating(x: usize) -> $id { - let mut v = $id::splat(1 as $elem_ty); - for i in 0..$id::lanes() { - if i % x == 0 { - v = v.replace(i, 2 as $elem_ty); - } -@@ -220,17 +222,17 @@ macro_rules! impl_reduction_float_arithm - } - - let mut start = crate::$elem_ty::EPSILON; - let mut scalar_reduction = 0. as $elem_ty; - - let mut v = $id::splat(0. as $elem_ty); - for i in 0..$id::lanes() { - let c = if i % 2 == 0 { 1e3 } else { -1. }; -- start *= 3.14 * c; -+ start *= ::core::$elem_ty::consts::PI * c; - scalar_reduction += start; - v = v.replace(i, start); - } - let simd_reduction = v.sum(); - - let mut a = [0. as $elem_ty; $id::lanes()]; - v.write_to_slice_unaligned(&mut a); - let tree_reduction = tree_reduce_sum(&a); -@@ -252,16 +254,17 @@ macro_rules! impl_reduction_float_arithm - scalar_reduction - ); - } - - #[cfg_attr(not(target_arch = "wasm32"), test)] - #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)] - #[allow(unused, dead_code)] - fn product_roundoff() { -+ use ::core::convert::TryInto; - // Performs a tree-reduction - fn tree_reduce_product(a: &[$elem_ty]) -> $elem_ty { - assert!(!a.is_empty()); - if a.len() == 1 { - a[0] - } else if a.len() == 2 { - a[0] * a[1] - } else { -@@ -273,35 +276,37 @@ macro_rules! impl_reduction_float_arithm - } - - let mut start = crate::$elem_ty::EPSILON; - let mut scalar_reduction = 1. as $elem_ty; - - let mut v = $id::splat(0. as $elem_ty); - for i in 0..$id::lanes() { - let c = if i % 2 == 0 { 1e3 } else { -1. }; -- start *= 3.14 * c; -+ start *= ::core::$elem_ty::consts::PI * c; - scalar_reduction *= start; - v = v.replace(i, start); - } - let simd_reduction = v.product(); - - let mut a = [0. as $elem_ty; $id::lanes()]; - v.write_to_slice_unaligned(&mut a); - let tree_reduction = tree_reduce_product(&a); - -- // tolerate 1 ULP difference: -+ // FIXME: Too imprecise, even only for product(f32x8). -+ // Figure out how to narrow this down. -+ let ulp_limit = $id::lanes() / 2; - let red_bits = simd_reduction.to_bits(); - let tree_bits = tree_reduction.to_bits(); - assert!( - if red_bits > tree_bits { - red_bits - tree_bits - } else { - tree_bits - red_bits -- } < 2, -+ } < ulp_limit.try_into().unwrap(), - "vector: {:?} | simd_reduction: {:?} | \ - tree_reduction: {} | scalar_reduction: {}", - v, - simd_reduction, - tree_reduction, - scalar_reduction - ); - } -diff --git a/third_party/rust/packed_simd/src/api/reductions/min_max.rs b/third_party/rust/packed_simd/src/api/reductions/min_max.rs ---- a/third_party/rust/packed_simd/src/api/reductions/min_max.rs -+++ b/third_party/rust/packed_simd/src/api/reductions/min_max.rs -@@ -71,16 +71,18 @@ macro_rules! impl_reduction_min_max { - x = x.min(self.extract(i)); - } - x - } - } - } - test_if! {$test_tt: - paste::item! { -+ // Comparisons use integer casts within mantissa^1 range. -+ #[allow(clippy::float_cmp)] - pub mod [<$id _reduction_min_max>] { - use super::*; - #[cfg_attr(not(target_arch = "wasm32"), test)] - #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)] - pub fn max_element() { - let v = $id::splat(0 as $elem_ty); - assert_eq!(v.max_element(), 0 as $elem_ty); - if $id::lanes() > 1 { -@@ -119,16 +121,18 @@ macro_rules! impl_reduction_min_max { - }; - } - - macro_rules! test_reduction_float_min_max { - ([$elem_ty:ident; $elem_count:expr]: $id:ident | $test_tt:tt) => { - test_if!{ - $test_tt: - paste::item! { -+ // Comparisons use integer casts within mantissa^1 range. -+ #[allow(clippy::float_cmp)] - pub mod [<$id _reduction_min_max_nan>] { - use super::*; - #[cfg_attr(not(target_arch = "wasm32"), test)] - #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)] - fn min_element_test() { - let n = crate::$elem_ty::NAN; - - assert_eq!(n.min(-3.), -3.); -diff --git a/third_party/rust/packed_simd/src/api/slice/from_slice.rs b/third_party/rust/packed_simd/src/api/slice/from_slice.rs ---- a/third_party/rust/packed_simd/src/api/slice/from_slice.rs -+++ b/third_party/rust/packed_simd/src/api/slice/from_slice.rs -@@ -33,17 +33,17 @@ macro_rules! impl_slice_from_slice { - unsafe { - assert!(slice.len() >= $elem_count); - Self::from_slice_unaligned_unchecked(slice) - } - } - - /// Instantiates a new vector with the values of the `slice`. - /// -- /// # Precondition -+ /// # Safety - /// - /// If `slice.len() < Self::lanes()` or `&slice[0]` is not aligned - /// to an `align_of::()` boundary, the behavior is undefined. - #[inline] - pub unsafe fn from_slice_aligned_unchecked( - slice: &[$elem_ty], - ) -> Self { - debug_assert!(slice.len() >= $elem_count); -@@ -54,17 +54,17 @@ macro_rules! impl_slice_from_slice { - ); - - #[allow(clippy::cast_ptr_alignment)] - *(target_ptr as *const Self) - } - - /// Instantiates a new vector with the values of the `slice`. - /// -- /// # Precondition -+ /// # Safety - /// - /// If `slice.len() < Self::lanes()` the behavior is undefined. - #[inline] - pub unsafe fn from_slice_unaligned_unchecked( - slice: &[$elem_ty], - ) -> Self { - use crate::mem::size_of; - debug_assert!(slice.len() >= $elem_count); -@@ -79,16 +79,18 @@ macro_rules! impl_slice_from_slice { - ); - x - } - } - - test_if! { - $test_tt: - paste::item! { -+ // Comparisons use integer casts within mantissa^1 range. -+ #[allow(clippy::float_cmp)] - pub mod [<$id _slice_from_slice>] { - use super::*; - use crate::iter::Iterator; - - #[cfg_attr(not(target_arch = "wasm32"), test)] - #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)] - fn from_slice_unaligned() { - let mut unaligned = [42 as $elem_ty; $id::lanes() + 1]; -diff --git a/third_party/rust/packed_simd/src/api/slice/write_to_slice.rs b/third_party/rust/packed_simd/src/api/slice/write_to_slice.rs ---- a/third_party/rust/packed_simd/src/api/slice/write_to_slice.rs -+++ b/third_party/rust/packed_simd/src/api/slice/write_to_slice.rs -@@ -34,17 +34,17 @@ macro_rules! impl_slice_write_to_slice { - unsafe { - assert!(slice.len() >= $elem_count); - self.write_to_slice_unaligned_unchecked(slice); - } - } - - /// Writes the values of the vector to the `slice`. - /// -- /// # Precondition -+ /// # Safety - /// - /// If `slice.len() < Self::lanes()` or `&slice[0]` is not - /// aligned to an `align_of::()` boundary, the behavior is - /// undefined. - #[inline] - pub unsafe fn write_to_slice_aligned_unchecked( - self, slice: &mut [$elem_ty], - ) { -@@ -59,17 +59,17 @@ macro_rules! impl_slice_write_to_slice { - #[allow(clippy::cast_ptr_alignment)] - #[allow(clippy::cast_ptr_alignment)] - #[allow(clippy::cast_ptr_alignment)] - *(target_ptr as *mut Self) = self; - } - - /// Writes the values of the vector to the `slice`. - /// -- /// # Precondition -+ /// # Safety - /// - /// If `slice.len() < Self::lanes()` the behavior is undefined. - #[inline] - pub unsafe fn write_to_slice_unaligned_unchecked( - self, slice: &mut [$elem_ty], - ) { - debug_assert!(slice.len() >= $elem_count); - let target_ptr = -@@ -81,16 +81,18 @@ macro_rules! impl_slice_write_to_slice { - crate::mem::size_of::(), - ); - } - } - - test_if! { - $test_tt: - paste::item! { -+ // Comparisons use integer casts within mantissa^1 range. -+ #[allow(clippy::float_cmp)] - pub mod [<$id _slice_write_to_slice>] { - use super::*; - use crate::iter::Iterator; - - #[cfg_attr(not(target_arch = "wasm32"), test)] - #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)] - fn write_to_slice_unaligned() { - let mut unaligned = [0 as $elem_ty; $id::lanes() + 1]; -diff --git a/third_party/rust/packed_simd/src/codegen.rs b/third_party/rust/packed_simd/src/codegen.rs ---- a/third_party/rust/packed_simd/src/codegen.rs -+++ b/third_party/rust/packed_simd/src/codegen.rs -@@ -11,23 +11,26 @@ crate mod swap_bytes; - macro_rules! impl_simd_array { - ([$elem_ty:ident; $elem_count:expr]: - $tuple_id:ident | $($elem_tys:ident),*) => { - #[derive(Copy, Clone)] - #[repr(simd)] - pub struct $tuple_id($(crate $elem_tys),*); - //^^^^^^^ leaked through SimdArray - -+ impl crate::sealed::Seal for [$elem_ty; $elem_count] {} -+ - impl crate::sealed::SimdArray for [$elem_ty; $elem_count] { - type Tuple = $tuple_id; - type T = $elem_ty; - const N: usize = $elem_count; - type NT = [u32; $elem_count]; - } - -+ impl crate::sealed::Seal for $tuple_id {} - impl crate::sealed::Simd for $tuple_id { - type Element = $elem_ty; - const LANES: usize = $elem_count; - type LanesType = [u32; $elem_count]; - } - - } - } -diff --git a/third_party/rust/packed_simd/src/codegen/bit_manip.rs b/third_party/rust/packed_simd/src/codegen/bit_manip.rs ---- a/third_party/rust/packed_simd/src/codegen/bit_manip.rs -+++ b/third_party/rust/packed_simd/src/codegen/bit_manip.rs -@@ -1,10 +1,10 @@ - //! LLVM bit manipulation intrinsics. --#![rustfmt::skip] -+#[rustfmt::skip] - - use crate::*; - - #[allow(improper_ctypes, dead_code)] - extern "C" { - #[link_name = "llvm.ctlz.v2i8"] - fn ctlz_u8x2(x: u8x2, is_zero_undef: bool) -> u8x2; - #[link_name = "llvm.ctlz.v4i8"] -diff --git a/third_party/rust/packed_simd/src/codegen/llvm.rs b/third_party/rust/packed_simd/src/codegen/llvm.rs ---- a/third_party/rust/packed_simd/src/codegen/llvm.rs -+++ b/third_party/rust/packed_simd/src/codegen/llvm.rs -@@ -5,41 +5,47 @@ use crate::sealed::Shuffle; - #[allow(unused_imports)] // FIXME: spurious warning? - use crate::sealed::Simd; - - // Shuffle intrinsics: expanded in users' crates, therefore public. - extern "platform-intrinsic" { - // FIXME: Passing this intrinsics an `idx` array with an index that is - // out-of-bounds will produce a monomorphization-time error. - // https://github.com/rust-lang-nursery/packed_simd/issues/21 -+ #[rustc_args_required_const(2)] - pub fn simd_shuffle2(x: T, y: T, idx: [u32; 2]) -> U - where - T: Simd, - ::Element: Shuffle<[u32; 2], Output = U>; - -+ #[rustc_args_required_const(2)] - pub fn simd_shuffle4(x: T, y: T, idx: [u32; 4]) -> U - where - T: Simd, - ::Element: Shuffle<[u32; 4], Output = U>; - -+ #[rustc_args_required_const(2)] - pub fn simd_shuffle8(x: T, y: T, idx: [u32; 8]) -> U - where - T: Simd, - ::Element: Shuffle<[u32; 8], Output = U>; - -+ #[rustc_args_required_const(2)] - pub fn simd_shuffle16(x: T, y: T, idx: [u32; 16]) -> U - where - T: Simd, - ::Element: Shuffle<[u32; 16], Output = U>; - -+ #[rustc_args_required_const(2)] - pub fn simd_shuffle32(x: T, y: T, idx: [u32; 32]) -> U - where - T: Simd, - ::Element: Shuffle<[u32; 32], Output = U>; - -+ #[rustc_args_required_const(2)] - pub fn simd_shuffle64(x: T, y: T, idx: [u32; 64]) -> U - where - T: Simd, - ::Element: Shuffle<[u32; 64], Output = U>; - } - - pub use self::simd_shuffle16 as __shuffle_vector16; - pub use self::simd_shuffle2 as __shuffle_vector2; -@@ -91,9 +97,11 @@ extern "platform-intrinsic" { - crate fn simd_fmin(a: T, b: T) -> T; - crate fn simd_fmax(a: T, b: T) -> T; - - crate fn simd_fsqrt(a: T) -> T; - crate fn simd_fma(a: T, b: T, c: T) -> T; - - crate fn simd_gather(value: T, pointers: P, mask: M) -> T; - crate fn simd_scatter(value: T, pointers: P, mask: M); -+ -+ crate fn simd_bitmask(value: T) -> U; - } -diff --git a/third_party/rust/packed_simd/src/codegen/reductions/mask/x86.rs b/third_party/rust/packed_simd/src/codegen/reductions/mask/x86.rs ---- a/third_party/rust/packed_simd/src/codegen/reductions/mask/x86.rs -+++ b/third_party/rust/packed_simd/src/codegen/reductions/mask/x86.rs -@@ -14,23 +14,17 @@ mod avx; - - #[cfg(target_feature = "avx2")] - #[macro_use] - mod avx2; - - /// x86 64-bit m8x8 implementation - macro_rules! x86_m8x8_impl { - ($id:ident) => { -- cfg_if! { -- if #[cfg(all(target_arch = "x86_64", target_feature = "sse"))] { -- x86_m8x8_sse_impl!($id); -- } else { -- fallback_impl!($id); -- } -- } -+ fallback_impl!($id); - }; - } - - /// x86 128-bit m8x16 implementation - macro_rules! x86_m8x16_impl { - ($id:ident) => { - cfg_if! { - if #[cfg(target_feature = "sse2")] { -diff --git a/third_party/rust/packed_simd/src/codegen/reductions/mask/x86/sse.rs b/third_party/rust/packed_simd/src/codegen/reductions/mask/x86/sse.rs ---- a/third_party/rust/packed_simd/src/codegen/reductions/mask/x86/sse.rs -+++ b/third_party/rust/packed_simd/src/codegen/reductions/mask/x86/sse.rs -@@ -29,40 +29,8 @@ macro_rules! x86_m32x4_sse_impl { - #[cfg(target_arch = "x86_64")] - use crate::arch::x86_64::_mm_movemask_ps; - - _mm_movemask_ps(crate::mem::transmute(self)) != 0 - } - } - }; - } -- --macro_rules! x86_m8x8_sse_impl { -- ($id:ident) => { -- impl All for $id { -- #[inline] -- #[target_feature(enable = "sse")] -- unsafe fn all(self) -> bool { -- #[cfg(target_arch = "x86")] -- use crate::arch::x86::_mm_movemask_pi8; -- #[cfg(target_arch = "x86_64")] -- use crate::arch::x86_64::_mm_movemask_pi8; -- // _mm_movemask_pi8(a) creates an 8bit mask containing the most -- // significant bit of each byte of `a`. If all bits are set, -- // then all 8 lanes of the mask are true. -- _mm_movemask_pi8(crate::mem::transmute(self)) -- == u8::max_value() as i32 -- } -- } -- impl Any for $id { -- #[inline] -- #[target_feature(enable = "sse")] -- unsafe fn any(self) -> bool { -- #[cfg(target_arch = "x86")] -- use crate::arch::x86::_mm_movemask_pi8; -- #[cfg(target_arch = "x86_64")] -- use crate::arch::x86_64::_mm_movemask_pi8; -- -- _mm_movemask_pi8(crate::mem::transmute(self)) != 0 -- } -- } -- }; --} -diff --git a/third_party/rust/packed_simd/src/codegen/shuffle.rs b/third_party/rust/packed_simd/src/codegen/shuffle.rs ---- a/third_party/rust/packed_simd/src/codegen/shuffle.rs -+++ b/third_party/rust/packed_simd/src/codegen/shuffle.rs -@@ -1,302 +1,150 @@ - //! Implementations of the `ShuffleResult` trait for the different numbers of - //! lanes and vector element types. - - use crate::masks::*; --use crate::sealed::Shuffle; -- --impl Shuffle<[u32; 2]> for i8 { -- type Output = crate::codegen::i8x2; --} --impl Shuffle<[u32; 4]> for i8 { -- type Output = crate::codegen::i8x4; --} --impl Shuffle<[u32; 8]> for i8 { -- type Output = crate::codegen::i8x8; --} --impl Shuffle<[u32; 16]> for i8 { -- type Output = crate::codegen::i8x16; --} --impl Shuffle<[u32; 32]> for i8 { -- type Output = crate::codegen::i8x32; --} --impl Shuffle<[u32; 64]> for i8 { -- type Output = crate::codegen::i8x64; --} -- --impl Shuffle<[u32; 2]> for u8 { -- type Output = crate::codegen::u8x2; --} --impl Shuffle<[u32; 4]> for u8 { -- type Output = crate::codegen::u8x4; --} --impl Shuffle<[u32; 8]> for u8 { -- type Output = crate::codegen::u8x8; --} --impl Shuffle<[u32; 16]> for u8 { -- type Output = crate::codegen::u8x16; --} --impl Shuffle<[u32; 32]> for u8 { -- type Output = crate::codegen::u8x32; --} --impl Shuffle<[u32; 64]> for u8 { -- type Output = crate::codegen::u8x64; --} -- --impl Shuffle<[u32; 2]> for m8 { -- type Output = crate::codegen::m8x2; --} --impl Shuffle<[u32; 4]> for m8 { -- type Output = crate::codegen::m8x4; --} --impl Shuffle<[u32; 8]> for m8 { -- type Output = crate::codegen::m8x8; --} --impl Shuffle<[u32; 16]> for m8 { -- type Output = crate::codegen::m8x16; --} --impl Shuffle<[u32; 32]> for m8 { -- type Output = crate::codegen::m8x32; --} --impl Shuffle<[u32; 64]> for m8 { -- type Output = crate::codegen::m8x64; --} -+use crate::sealed::{Shuffle, Seal}; - --impl Shuffle<[u32; 2]> for i16 { -- type Output = crate::codegen::i16x2; --} --impl Shuffle<[u32; 4]> for i16 { -- type Output = crate::codegen::i16x4; --} --impl Shuffle<[u32; 8]> for i16 { -- type Output = crate::codegen::i16x8; --} --impl Shuffle<[u32; 16]> for i16 { -- type Output = crate::codegen::i16x16; --} --impl Shuffle<[u32; 32]> for i16 { -- type Output = crate::codegen::i16x32; --} -- --impl Shuffle<[u32; 2]> for u16 { -- type Output = crate::codegen::u16x2; --} --impl Shuffle<[u32; 4]> for u16 { -- type Output = crate::codegen::u16x4; --} --impl Shuffle<[u32; 8]> for u16 { -- type Output = crate::codegen::u16x8; --} --impl Shuffle<[u32; 16]> for u16 { -- type Output = crate::codegen::u16x16; --} --impl Shuffle<[u32; 32]> for u16 { -- type Output = crate::codegen::u16x32; --} -- --impl Shuffle<[u32; 2]> for m16 { -- type Output = crate::codegen::m16x2; --} --impl Shuffle<[u32; 4]> for m16 { -- type Output = crate::codegen::m16x4; --} --impl Shuffle<[u32; 8]> for m16 { -- type Output = crate::codegen::m16x8; --} --impl Shuffle<[u32; 16]> for m16 { -- type Output = crate::codegen::m16x16; --} --impl Shuffle<[u32; 32]> for m16 { -- type Output = crate::codegen::m16x32; --} -- --impl Shuffle<[u32; 2]> for i32 { -- type Output = crate::codegen::i32x2; --} --impl Shuffle<[u32; 4]> for i32 { -- type Output = crate::codegen::i32x4; --} --impl Shuffle<[u32; 8]> for i32 { -- type Output = crate::codegen::i32x8; --} --impl Shuffle<[u32; 16]> for i32 { -- type Output = crate::codegen::i32x16; -+macro_rules! impl_shuffle { -+ ($array:ty, $base:ty, $out:ty) => { -+ impl Seal<$array> for $base {} -+ impl Shuffle<$array> for $base { -+ type Output = $out; -+ } -+ } - } - --impl Shuffle<[u32; 2]> for u32 { -- type Output = crate::codegen::u32x2; --} --impl Shuffle<[u32; 4]> for u32 { -- type Output = crate::codegen::u32x4; --} --impl Shuffle<[u32; 8]> for u32 { -- type Output = crate::codegen::u32x8; --} --impl Shuffle<[u32; 16]> for u32 { -- type Output = crate::codegen::u32x16; --} -+impl_shuffle! { [u32; 2], i8, crate::codegen::i8x2 } -+impl_shuffle! { [u32; 4], i8, crate::codegen::i8x4 } -+impl_shuffle! { [u32; 8], i8, crate::codegen::i8x8 } -+impl_shuffle! { [u32; 16], i8, crate::codegen::i8x16 } -+impl_shuffle! { [u32; 32], i8, crate::codegen::i8x32 } -+impl_shuffle! { [u32; 64], i8, crate::codegen::i8x64 } - --impl Shuffle<[u32; 2]> for f32 { -- type Output = crate::codegen::f32x2; --} --impl Shuffle<[u32; 4]> for f32 { -- type Output = crate::codegen::f32x4; --} --impl Shuffle<[u32; 8]> for f32 { -- type Output = crate::codegen::f32x8; --} --impl Shuffle<[u32; 16]> for f32 { -- type Output = crate::codegen::f32x16; --} -+impl_shuffle! { [u32; 2], u8, crate::codegen::u8x2 } -+impl_shuffle! { [u32; 4], u8, crate::codegen::u8x4 } -+impl_shuffle! { [u32; 8], u8, crate::codegen::u8x8 } -+impl_shuffle! { [u32; 16], u8, crate::codegen::u8x16 } -+impl_shuffle! { [u32; 32], u8, crate::codegen::u8x32 } -+impl_shuffle! { [u32; 64], u8, crate::codegen::u8x64 } -+ -+impl_shuffle! { [u32; 2], m8, crate::codegen::m8x2 } -+impl_shuffle! { [u32; 4], m8, crate::codegen::m8x4 } -+impl_shuffle! { [u32; 8], m8, crate::codegen::m8x8 } -+impl_shuffle! { [u32; 16], m8, crate::codegen::m8x16 } -+impl_shuffle! { [u32; 32], m8, crate::codegen::m8x32 } -+impl_shuffle! { [u32; 64], m8, crate::codegen::m8x64 } -+ -+impl_shuffle! { [u32; 2], i16, crate::codegen::i16x2 } -+impl_shuffle! { [u32; 4], i16, crate::codegen::i16x4 } -+impl_shuffle! { [u32; 8], i16, crate::codegen::i16x8 } -+impl_shuffle! { [u32; 16], i16, crate::codegen::i16x16 } -+impl_shuffle! { [u32; 32], i16, crate::codegen::i16x32 } - --impl Shuffle<[u32; 2]> for m32 { -- type Output = crate::codegen::m32x2; --} --impl Shuffle<[u32; 4]> for m32 { -- type Output = crate::codegen::m32x4; --} --impl Shuffle<[u32; 8]> for m32 { -- type Output = crate::codegen::m32x8; --} --impl Shuffle<[u32; 16]> for m32 { -- type Output = crate::codegen::m32x16; --} -+impl_shuffle! { [u32; 2], u16, crate::codegen::u16x2 } -+impl_shuffle! { [u32; 4], u16, crate::codegen::u16x4 } -+impl_shuffle! { [u32; 8], u16, crate::codegen::u16x8 } -+impl_shuffle! { [u32; 16], u16, crate::codegen::u16x16 } -+impl_shuffle! { [u32; 32], u16, crate::codegen::u16x32 } -+ -+impl_shuffle! { [u32; 2], m16, crate::codegen::m16x2 } -+impl_shuffle! { [u32; 4], m16, crate::codegen::m16x4 } -+impl_shuffle! { [u32; 8], m16, crate::codegen::m16x8 } -+impl_shuffle! { [u32; 16], m16, crate::codegen::m16x16 } - --/* FIXME: 64-bit single element vector --impl Shuffle<[u32; 1]> for i64 { -- type Output = crate::codegen::i64x1; --} --*/ --impl Shuffle<[u32; 2]> for i64 { -- type Output = crate::codegen::i64x2; --} --impl Shuffle<[u32; 4]> for i64 { -- type Output = crate::codegen::i64x4; --} --impl Shuffle<[u32; 8]> for i64 { -- type Output = crate::codegen::i64x8; --} -+impl_shuffle! { [u32; 2], i32, crate::codegen::i32x2 } -+impl_shuffle! { [u32; 4], i32, crate::codegen::i32x4 } -+impl_shuffle! { [u32; 8], i32, crate::codegen::i32x8 } -+impl_shuffle! { [u32; 16], i32, crate::codegen::i32x16 } -+ -+impl_shuffle! { [u32; 2], u32, crate::codegen::u32x2 } -+impl_shuffle! { [u32; 4], u32, crate::codegen::u32x4 } -+impl_shuffle! { [u32; 8], u32, crate::codegen::u32x8 } -+impl_shuffle! { [u32; 16], u32, crate::codegen::u32x16 } -+ -+impl_shuffle! { [u32; 2], f32, crate::codegen::f32x2 } -+impl_shuffle! { [u32; 4], f32, crate::codegen::f32x4 } -+impl_shuffle! { [u32; 8], f32, crate::codegen::f32x8 } -+impl_shuffle! { [u32; 16], f32, crate::codegen::f32x16 } -+ -+impl_shuffle! { [u32; 2], m32, crate::codegen::m32x2 } -+impl_shuffle! { [u32; 4], m32, crate::codegen::m32x4 } -+impl_shuffle! { [u32; 8], m32, crate::codegen::m32x8 } -+impl_shuffle! { [u32; 16], m32, crate::codegen::m32x16 } - - /* FIXME: 64-bit single element vector --impl Shuffle<[u32; 1]> for u64 { -- type Output = crate::codegen::u64x1; --} -+impl_shuffle! { [u32; 1], i64, crate::codegen::i64x1 } - */ --impl Shuffle<[u32; 2]> for u64 { -- type Output = crate::codegen::u64x2; --} --impl Shuffle<[u32; 4]> for u64 { -- type Output = crate::codegen::u64x4; --} --impl Shuffle<[u32; 8]> for u64 { -- type Output = crate::codegen::u64x8; --} -+impl_shuffle! { [u32; 2], i64, crate::codegen::i64x2 } -+impl_shuffle! { [u32; 4], i64, crate::codegen::i64x4 } -+impl_shuffle! { [u32; 8], i64, crate::codegen::i64x8 } - - /* FIXME: 64-bit single element vector --impl Shuffle<[u32; 1]> for f64 { -- type Output = crate::codegen::f64x1; --} -+impl_shuffle! { [u32; 1], i64, crate::codegen::i64x1 } - */ --impl Shuffle<[u32; 2]> for f64 { -- type Output = crate::codegen::f64x2; --} --impl Shuffle<[u32; 4]> for f64 { -- type Output = crate::codegen::f64x4; --} --impl Shuffle<[u32; 8]> for f64 { -- type Output = crate::codegen::f64x8; --} -+impl_shuffle! { [u32; 2], u64, crate::codegen::u64x2 } -+impl_shuffle! { [u32; 4], u64, crate::codegen::u64x4 } -+impl_shuffle! { [u32; 8], u64, crate::codegen::u64x8 } - - /* FIXME: 64-bit single element vector --impl Shuffle<[u32; 1]> for m64 { -- type Output = crate::codegen::m64x1; --} -+impl_shuffle! { [u32; 1], i64, crate::codegen::i64x1 } - */ --impl Shuffle<[u32; 2]> for m64 { -- type Output = crate::codegen::m64x2; --} --impl Shuffle<[u32; 4]> for m64 { -- type Output = crate::codegen::m64x4; --} --impl Shuffle<[u32; 8]> for m64 { -- type Output = crate::codegen::m64x8; --} -+impl_shuffle! { [u32; 2], f64, crate::codegen::f64x2 } -+impl_shuffle! { [u32; 4], f64, crate::codegen::f64x4 } -+impl_shuffle! { [u32; 8], f64, crate::codegen::f64x8 } -+ -+/* FIXME: 64-bit single element vector -+impl_shuffle! { [u32; 1], i64, crate::codegen::i64x1 } -+*/ -+impl_shuffle! { [u32; 2], m64, crate::codegen::m64x2 } -+impl_shuffle! { [u32; 4], m64, crate::codegen::m64x4 } -+impl_shuffle! { [u32; 8], m64, crate::codegen::m64x8 } - --impl Shuffle<[u32; 2]> for isize { -- type Output = crate::codegen::isizex2; --} --impl Shuffle<[u32; 4]> for isize { -- type Output = crate::codegen::isizex4; --} --impl Shuffle<[u32; 8]> for isize { -- type Output = crate::codegen::isizex8; --} -+impl_shuffle! { [u32; 2], isize, crate::codegen::isizex2 } -+impl_shuffle! { [u32; 4], isize, crate::codegen::isizex4 } -+impl_shuffle! { [u32; 8], isize, crate::codegen::isizex8 } - --impl Shuffle<[u32; 2]> for usize { -- type Output = crate::codegen::usizex2; --} --impl Shuffle<[u32; 4]> for usize { -- type Output = crate::codegen::usizex4; --} --impl Shuffle<[u32; 8]> for usize { -- type Output = crate::codegen::usizex8; --} -+impl_shuffle! { [u32; 2], usize, crate::codegen::usizex2 } -+impl_shuffle! { [u32; 4], usize, crate::codegen::usizex4 } -+impl_shuffle! { [u32; 8], usize, crate::codegen::usizex8 } - -+impl_shuffle! { [u32; 2], msize, crate::codegen::msizex2 } -+impl_shuffle! { [u32; 4], msize, crate::codegen::msizex4 } -+impl_shuffle! { [u32; 8], msize, crate::codegen::msizex8 } -+ -+impl Seal<[u32; 2]> for *const T {} - impl Shuffle<[u32; 2]> for *const T { - type Output = crate::codegen::cptrx2; - } -+impl Seal<[u32; 4]> for *const T {} - impl Shuffle<[u32; 4]> for *const T { - type Output = crate::codegen::cptrx4; - } -+impl Seal<[u32; 8]> for *const T {} - impl Shuffle<[u32; 8]> for *const T { - type Output = crate::codegen::cptrx8; - } - -+impl Seal<[u32; 2]> for *mut T {} - impl Shuffle<[u32; 2]> for *mut T { - type Output = crate::codegen::mptrx2; - } -+impl Seal<[u32; 4]> for *mut T {} - impl Shuffle<[u32; 4]> for *mut T { - type Output = crate::codegen::mptrx4; - } -+impl Seal<[u32; 8]> for *mut T {} - impl Shuffle<[u32; 8]> for *mut T { - type Output = crate::codegen::mptrx8; - } - --impl Shuffle<[u32; 2]> for msize { -- type Output = crate::codegen::msizex2; --} --impl Shuffle<[u32; 4]> for msize { -- type Output = crate::codegen::msizex4; --} --impl Shuffle<[u32; 8]> for msize { -- type Output = crate::codegen::msizex8; --} -- --impl Shuffle<[u32; 1]> for i128 { -- type Output = crate::codegen::i128x1; --} --impl Shuffle<[u32; 2]> for i128 { -- type Output = crate::codegen::i128x2; --} --impl Shuffle<[u32; 4]> for i128 { -- type Output = crate::codegen::i128x4; --} -+impl_shuffle! { [u32; 1], i128, crate::codegen::i128x1 } -+impl_shuffle! { [u32; 2], i128, crate::codegen::i128x2 } -+impl_shuffle! { [u32; 4], i128, crate::codegen::i128x4 } - --impl Shuffle<[u32; 1]> for u128 { -- type Output = crate::codegen::u128x1; --} --impl Shuffle<[u32; 2]> for u128 { -- type Output = crate::codegen::u128x2; --} --impl Shuffle<[u32; 4]> for u128 { -- type Output = crate::codegen::u128x4; --} -+impl_shuffle! { [u32; 1], u128, crate::codegen::u128x1 } -+impl_shuffle! { [u32; 2], u128, crate::codegen::u128x2 } -+impl_shuffle! { [u32; 4], u128, crate::codegen::u128x4 } - --impl Shuffle<[u32; 1]> for m128 { -- type Output = crate::codegen::m128x1; --} --impl Shuffle<[u32; 2]> for m128 { -- type Output = crate::codegen::m128x2; --} --impl Shuffle<[u32; 4]> for m128 { -- type Output = crate::codegen::m128x4; --} -+impl_shuffle! { [u32; 1], m128, crate::codegen::m128x1 } -+impl_shuffle! { [u32; 2], m128, crate::codegen::m128x2 } -+impl_shuffle! { [u32; 4], m128, crate::codegen::m128x4 } -diff --git a/third_party/rust/packed_simd/src/codegen/shuffle1_dyn.rs b/third_party/rust/packed_simd/src/codegen/shuffle1_dyn.rs ---- a/third_party/rust/packed_simd/src/codegen/shuffle1_dyn.rs -+++ b/third_party/rust/packed_simd/src/codegen/shuffle1_dyn.rs -@@ -23,53 +23,32 @@ macro_rules! impl_fallback { - } - } - }; - } - - macro_rules! impl_shuffle1_dyn { - (u8x8) => { - cfg_if! { -- if #[cfg(all(any(target_arch = "x86", target_arch = "x86_64"), -- target_feature = "ssse3"))] { -- impl Shuffle1Dyn for u8x8 { -- type Indices = Self; -- #[inline] -- fn shuffle1_dyn(self, indices: Self::Indices) -> Self { -- #[cfg(target_arch = "x86")] -- use crate::arch::x86::_mm_shuffle_pi8; -- #[cfg(target_arch = "x86_64")] -- use crate::arch::x86_64::_mm_shuffle_pi8; -- -- unsafe { -- crate::mem::transmute( -- _mm_shuffle_pi8( -- crate::mem::transmute(self.0), -- crate::mem::transmute(indices.0) -- ) -- ) -- } -- } -- } -- } else if #[cfg(all( -+ if #[cfg(all( - any( -- all(target_aarch = "aarch64", target_feature = "neon"), -- all(target_aarch = "arm", target_feature = "v7", -+ all(target_arch = "aarch64", target_feature = "neon"), -+ all(target_arch = "doesnotexist", target_feature = "v7", - target_feature = "neon") - ), - any(feature = "core_arch", libcore_neon) - ) - )] { - impl Shuffle1Dyn for u8x8 { - type Indices = Self; - #[inline] - fn shuffle1_dyn(self, indices: Self::Indices) -> Self { -- #[cfg(targt_arch = "aarch64")] -+ #[cfg(target_arch = "aarch64")] - use crate::arch::aarch64::vtbl1_u8; -- #[cfg(targt_arch = "arm")] -+ #[cfg(target_arch = "doesnotexist")] - use crate::arch::arm::vtbl1_u8; - - // This is safe because the binary is compiled with - // neon enabled at compile-time and can therefore only - // run on CPUs that have it enabled. - unsafe { - Simd(mem::transmute( - vtbl1_u8(mem::transmute(self.0), -@@ -101,17 +80,17 @@ macro_rules! impl_shuffle1_dyn { - unsafe { - Simd(mem::transmute( - _mm_shuffle_epi8(mem::transmute(self.0), - crate::mem::transmute(indices)) - )) - } - } - } -- } else if #[cfg(all(target_aarch = "aarch64", target_feature = "neon", -+ } else if #[cfg(all(target_arch = "aarch64", target_feature = "neon", - any(feature = "core_arch", libcore_neon)))] { - impl Shuffle1Dyn for u8x16 { - type Indices = Self; - #[inline] - fn shuffle1_dyn(self, indices: Self::Indices) -> Self { - use crate::arch::aarch64::vqtbl1q_u8; - - // This is safe because the binary is compiled with -@@ -120,17 +99,17 @@ macro_rules! impl_shuffle1_dyn { - unsafe { - Simd(mem::transmute( - vqtbl1q_u8(mem::transmute(self.0), - crate::mem::transmute(indices.0)) - )) - } - } - } -- } else if #[cfg(all(target_aarch = "arm", target_feature = "v7", -+ } else if #[cfg(all(target_arch = "doesnotexist", target_feature = "v7", - target_feature = "neon", - any(feature = "core_arch", libcore_neon)))] { - impl Shuffle1Dyn for u8x16 { - type Indices = Self; - #[inline] - fn shuffle1_dyn(self, indices: Self::Indices) -> Self { - use crate::arch::arm::vtbl2_u8; - -diff --git a/third_party/rust/packed_simd/src/codegen/vPtr.rs b/third_party/rust/packed_simd/src/codegen/vPtr.rs ---- a/third_party/rust/packed_simd/src/codegen/vPtr.rs -+++ b/third_party/rust/packed_simd/src/codegen/vPtr.rs -@@ -3,23 +3,25 @@ - macro_rules! impl_simd_ptr { - ([$ptr_ty:ty; $elem_count:expr]: $tuple_id:ident | $ty:ident - | $($tys:ty),*) => { - #[derive(Copy, Clone)] - #[repr(simd)] - pub struct $tuple_id<$ty>($(crate $tys),*); - //^^^^^^^ leaked through SimdArray - -+ impl<$ty> crate::sealed::Seal for [$ptr_ty; $elem_count] {} - impl<$ty> crate::sealed::SimdArray for [$ptr_ty; $elem_count] { - type Tuple = $tuple_id<$ptr_ty>; - type T = $ptr_ty; - const N: usize = $elem_count; - type NT = [u32; $elem_count]; - } - -+ impl<$ty> crate::sealed::Seal for $tuple_id<$ptr_ty> {} - impl<$ty> crate::sealed::Simd for $tuple_id<$ptr_ty> { - type Element = $ptr_ty; - const LANES: usize = $elem_count; - type LanesType = [u32; $elem_count]; - } - - } - } -diff --git a/third_party/rust/packed_simd/src/lib.rs b/third_party/rust/packed_simd/src/lib.rs ---- a/third_party/rust/packed_simd/src/lib.rs -+++ b/third_party/rust/packed_simd/src/lib.rs -@@ -196,40 +196,45 @@ - //! - //! * casting from an `f64` to an `f32` **rounds to nearest, ties to even**. - //! - //! Numeric casts are not very "precise": sometimes lossy, sometimes value - //! preserving, etc. - - #![feature( - repr_simd, -+ rustc_attrs, - const_fn, - platform_intrinsics, - stdsimd, - aarch64_target_feature, - arm_target_feature, - link_llvm_intrinsics, - core_intrinsics, - stmt_expr_attributes, -- align_offset, -- mmx_target_feature, - crate_visibility_modifier, - custom_inner_attributes - )] - #![allow(non_camel_case_types, non_snake_case, -- clippy::cast_possible_truncation, -- clippy::cast_lossless, -- clippy::cast_possible_wrap, -- clippy::cast_precision_loss, -- // This lint is currently broken for generic code -- // See https://github.com/rust-lang/rust-clippy/issues/3410 -- clippy::use_self -+ // FIXME: these types are unsound in C FFI already -+ // See https://github.com/rust-lang/rust/issues/53346 -+ improper_ctypes_definitions, -+ clippy::cast_possible_truncation, -+ clippy::cast_lossless, -+ clippy::cast_possible_wrap, -+ clippy::cast_precision_loss, -+ // TODO: manually add the `#[must_use]` attribute where appropriate -+ clippy::must_use_candidate, -+ // This lint is currently broken for generic code -+ // See https://github.com/rust-lang/rust-clippy/issues/3410 -+ clippy::use_self, -+ clippy::wrong_self_convention, - )] - #![cfg_attr(test, feature(hashmap_internals))] --#![deny(warnings, rust_2018_idioms, clippy::missing_inline_in_public_items)] -+#![deny(rust_2018_idioms, clippy::missing_inline_in_public_items)] - #![no_std] - - use cfg_if::cfg_if; - - cfg_if! { - if #[cfg(feature = "core_arch")] { - #[allow(unused_imports)] - use core_arch as arch; -@@ -251,16 +256,18 @@ use core::{ - - #[macro_use] - mod testing; - #[macro_use] - mod api; - mod codegen; - mod sealed; - -+pub use crate::sealed::{Simd as SimdVector, Shuffle, SimdArray, Mask}; -+ - /// Packed SIMD vector type. - /// - /// # Examples - /// - /// ``` - /// # use packed_simd::Simd; - /// let v = Simd::<[i32; 4]>::new(0, 1, 2, 3); - /// assert_eq!(v.extract(2), 2); -@@ -271,16 +278,18 @@ pub struct Simd( - // FIXME: this type should be private, - // but it currently must be public for the - // `shuffle!` macro to work: it needs to - // access the internal `repr(simd)` type - // to call the shuffle intrinsics. - #[doc(hidden)] pub ::Tuple, - ); - -+impl sealed::Seal for Simd {} -+ - /// Wrapper over `T` implementing a lexicoraphical order via the `PartialOrd` - /// and/or `Ord` traits. - #[repr(transparent)] - #[derive(Copy, Clone, Debug)] - #[allow(clippy::missing_inline_in_public_items)] - pub struct LexicographicallyOrdered(T); - - mod masks; -diff --git a/third_party/rust/packed_simd/src/masks.rs b/third_party/rust/packed_simd/src/masks.rs ---- a/third_party/rust/packed_simd/src/masks.rs -+++ b/third_party/rust/packed_simd/src/masks.rs -@@ -1,17 +1,19 @@ - //! Mask types - - macro_rules! impl_mask_ty { - ($id:ident : $elem_ty:ident | #[$doc:meta]) => { - #[$doc] - #[derive(Copy, Clone)] - pub struct $id($elem_ty); - -+ impl crate::sealed::Seal for $id {} - impl crate::sealed::Mask for $id { -+ #[inline] - fn test(&self) -> bool { - $id::test(self) - } - } - - impl $id { - /// Instantiate a mask with `value` - #[inline] -diff --git a/third_party/rust/packed_simd/src/sealed.rs b/third_party/rust/packed_simd/src/sealed.rs ---- a/third_party/rust/packed_simd/src/sealed.rs -+++ b/third_party/rust/packed_simd/src/sealed.rs -@@ -1,41 +1,42 @@ - //! Sealed traits - -+/// A sealed trait, this is logically private to the crate -+/// and will prevent implementations from outside the crate -+pub trait Seal {} -+ - /// Trait implemented by arrays that can be SIMD types. --#[doc(hidden)] --pub trait SimdArray { -+pub trait SimdArray: Seal { - /// The type of the #[repr(simd)] type. - type Tuple: Copy + Clone; - /// The element type of the vector. - type T; - /// The number of elements in the array. - const N: usize; - /// The type: `[u32; Self::N]`. - type NT; - } - - /// This traits is used to constraint the arguments - /// and result type of the portable shuffles. - #[doc(hidden)] --pub trait Shuffle { -+pub trait Shuffle: Seal { - // Lanes is a `[u32; N]` where `N` is the number of vector lanes - - /// The result type of the shuffle. - type Output; - } - - /// This trait is implemented by all SIMD vector types. --#[doc(hidden)] --pub trait Simd { -+pub trait Simd: Seal { - /// Element type of the SIMD vector - type Element; - /// The number of elements in the SIMD vector. - const LANES: usize; - /// The type: `[u32; Self::N]`. - type LanesType; - } - - /// This trait is implemented by all mask types --#[doc(hidden)] --pub trait Mask { -+pub trait Mask: Seal { - fn test(&self) -> bool; - } -diff --git a/third_party/rust/packed_simd/src/testing/utils.rs b/third_party/rust/packed_simd/src/testing/utils.rs ---- a/third_party/rust/packed_simd/src/testing/utils.rs -+++ b/third_party/rust/packed_simd/src/testing/utils.rs -@@ -1,11 +1,13 @@ - //! Testing utilities - - #![allow(dead_code)] -+// FIXME: Or don't. But it's true this is a problematic comparison. -+#![allow(clippy::neg_cmp_op_on_partial_ord)] - - use crate::{cmp::PartialOrd, fmt::Debug, LexicographicallyOrdered}; - - /// Tests PartialOrd for `a` and `b` where `a < b` is true. - pub fn test_lt( - a: LexicographicallyOrdered, b: LexicographicallyOrdered, - ) where - LexicographicallyOrdered: Debug + PartialOrd, -@@ -14,37 +16,42 @@ pub fn test_lt( - assert!(b > a, "{:?}, {:?}", a, b); - - assert!(!(a == b), "{:?}, {:?}", a, b); - assert!(a != b, "{:?}, {:?}", a, b); - - assert!(a <= b, "{:?}, {:?}", a, b); - assert!(b >= a, "{:?}, {:?}", a, b); - -- // Irreflexivity -- assert!(!(a < a), "{:?}, {:?}", a, b); -- assert!(!(b < b), "{:?}, {:?}", a, b); -- assert!(!(a > a), "{:?}, {:?}", a, b); -- assert!(!(b > b), "{:?}, {:?}", a, b); -+ // The elegance of the mathematical expression of irreflexivity is more -+ // than clippy can handle. -+ #[allow(clippy::eq_op)] -+ { -+ // Irreflexivity -+ assert!(!(a < a), "{:?}, {:?}", a, b); -+ assert!(!(b < b), "{:?}, {:?}", a, b); -+ assert!(!(a > a), "{:?}, {:?}", a, b); -+ assert!(!(b > b), "{:?}, {:?}", a, b); - -- assert!(a <= a, "{:?}, {:?}", a, b); -- assert!(b <= b, "{:?}, {:?}", a, b); -+ assert!(a <= a, "{:?}, {:?}", a, b); -+ assert!(b <= b, "{:?}, {:?}", a, b); -+ } - } - - /// Tests PartialOrd for `a` and `b` where `a <= b` is true. - pub fn test_le( - a: LexicographicallyOrdered, b: LexicographicallyOrdered, - ) where - LexicographicallyOrdered: Debug + PartialOrd, - { - assert!(a <= b, "{:?}, {:?}", a, b); - assert!(b >= a, "{:?}, {:?}", a, b); - -- assert!(a == b || a < b, "{:?}, {:?}", a, b); -- assert!(a == b || b > a, "{:?}, {:?}", a, b); -+ assert!(a <= b, "{:?}, {:?}", a, b); -+ assert!(b >= a, "{:?}, {:?}", a, b); - - if a == b { - assert!(!(a < b), "{:?}, {:?}", a, b); - assert!(!(b > a), "{:?}, {:?}", a, b); - - assert!(!(a != b), "{:?}, {:?}", a, b); - } else { - assert!(a != b, "{:?}, {:?}", a, b); -diff --git a/third_party/rust/packed_simd/src/v128.rs b/third_party/rust/packed_simd/src/v128.rs ---- a/third_party/rust/packed_simd/src/v128.rs -+++ b/third_party/rust/packed_simd/src/v128.rs -@@ -1,80 +1,80 @@ - //! 128-bit wide vector types --#![rustfmt::skip] -+#[rustfmt::skip] - - use crate::*; - --impl_i!([i8; 16]: i8x16, m8x16 | i8 | test_v128 | -+impl_i!([i8; 16]: i8x16, m8x16 | i8, u16 | test_v128 | - x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15 | - From: | - /// A 128-bit vector with 16 `i8` lanes. - ); --impl_u!([u8; 16]: u8x16, m8x16 | u8 | test_v128 | -+impl_u!([u8; 16]: u8x16, m8x16 | u8, u16 | test_v128 | - x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15 | - From: | - /// A 128-bit vector with 16 `u8` lanes. - ); --impl_m!([m8; 16]: m8x16 | i8 | test_v128 | -+impl_m!([m8; 16]: m8x16 | i8, u16 | test_v128 | - x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15 | - From: m16x16 | - /// A 128-bit vector mask with 16 `m8` lanes. - ); - --impl_i!([i16; 8]: i16x8, m16x8 | i16 | test_v128 | x0, x1, x2, x3, x4, x5, x6, x7 | -+impl_i!([i16; 8]: i16x8, m16x8 | i16, u8 | test_v128 | x0, x1, x2, x3, x4, x5, x6, x7 | - From: i8x8, u8x8 | - /// A 128-bit vector with 8 `i16` lanes. - ); --impl_u!([u16; 8]: u16x8, m16x8 | u16| test_v128 | x0, x1, x2, x3, x4, x5, x6, x7 | -+impl_u!([u16; 8]: u16x8, m16x8 | u16, u8 | test_v128 | x0, x1, x2, x3, x4, x5, x6, x7 | - From: u8x8 | - /// A 128-bit vector with 8 `u16` lanes. - ); --impl_m!([m16; 8]: m16x8 | i16 | test_v128 | x0, x1, x2, x3, x4, x5, x6, x7 | -+impl_m!([m16; 8]: m16x8 | i16, u8 | test_v128 | x0, x1, x2, x3, x4, x5, x6, x7 | - From: m8x8, m32x8 | - /// A 128-bit vector mask with 8 `m16` lanes. - ); - --impl_i!([i32; 4]: i32x4, m32x4 | i32 | test_v128 | x0, x1, x2, x3 | -+impl_i!([i32; 4]: i32x4, m32x4 | i32, u8 | test_v128 | x0, x1, x2, x3 | - From: i8x4, u8x4, i16x4, u16x4 | - /// A 128-bit vector with 4 `i32` lanes. - ); --impl_u!([u32; 4]: u32x4, m32x4 | u32| test_v128 | x0, x1, x2, x3 | -+impl_u!([u32; 4]: u32x4, m32x4 | u32, u8 | test_v128 | x0, x1, x2, x3 | - From: u8x4, u16x4 | - /// A 128-bit vector with 4 `u32` lanes. - ); - impl_f!([f32; 4]: f32x4, m32x4 | f32 | test_v128 | x0, x1, x2, x3 | - From: i8x4, u8x4, i16x4, u16x4 | - /// A 128-bit vector with 4 `f32` lanes. - ); --impl_m!([m32; 4]: m32x4 | i32 | test_v128 | x0, x1, x2, x3 | -+impl_m!([m32; 4]: m32x4 | i32, u8 | test_v128 | x0, x1, x2, x3 | - From: m8x4, m16x4, m64x4 | - /// A 128-bit vector mask with 4 `m32` lanes. - ); - --impl_i!([i64; 2]: i64x2, m64x2 | i64 | test_v128 | x0, x1 | -+impl_i!([i64; 2]: i64x2, m64x2 | i64, u8 | test_v128 | x0, x1 | - From: i8x2, u8x2, i16x2, u16x2, i32x2, u32x2 | - /// A 128-bit vector with 2 `i64` lanes. - ); --impl_u!([u64; 2]: u64x2, m64x2 | u64 | test_v128 | x0, x1 | -+impl_u!([u64; 2]: u64x2, m64x2 | u64, u8 | test_v128 | x0, x1 | - From: u8x2, u16x2, u32x2 | - /// A 128-bit vector with 2 `u64` lanes. - ); - impl_f!([f64; 2]: f64x2, m64x2 | f64 | test_v128 | x0, x1 | - From: i8x2, u8x2, i16x2, u16x2, i32x2, u32x2, f32x2 | - /// A 128-bit vector with 2 `f64` lanes. - ); --impl_m!([m64; 2]: m64x2 | i64 | test_v128 | x0, x1 | -+impl_m!([m64; 2]: m64x2 | i64, u8 | test_v128 | x0, x1 | - From: m8x2, m16x2, m32x2, m128x2 | - /// A 128-bit vector mask with 2 `m64` lanes. - ); - --impl_i!([i128; 1]: i128x1, m128x1 | i128 | test_v128 | x0 | -+impl_i!([i128; 1]: i128x1, m128x1 | i128, u8 | test_v128 | x0 | - From: /*i8x1, u8x1, i16x1, u16x1, i32x1, u32x1, i64x1, u64x1 */ | // FIXME: unary small vector types - /// A 128-bit vector with 1 `i128` lane. - ); --impl_u!([u128; 1]: u128x1, m128x1 | u128 | test_v128 | x0 | -+impl_u!([u128; 1]: u128x1, m128x1 | u128, u8 | test_v128 | x0 | - From: /*u8x1, u16x1, u32x1, u64x1 */ | // FIXME: unary small vector types - /// A 128-bit vector with 1 `u128` lane. - ); --impl_m!([m128; 1]: m128x1 | i128 | test_v128 | x0 | -+impl_m!([m128; 1]: m128x1 | i128, u8 | test_v128 | x0 | - From: /*m8x1, m16x1, m32x1, m64x1 */ | // FIXME: unary small vector types - /// A 128-bit vector mask with 1 `m128` lane. - ); -diff --git a/third_party/rust/packed_simd/src/v16.rs b/third_party/rust/packed_simd/src/v16.rs ---- a/third_party/rust/packed_simd/src/v16.rs -+++ b/third_party/rust/packed_simd/src/v16.rs -@@ -1,16 +1,16 @@ - //! 16-bit wide vector types - - use crate::*; - --impl_i!([i8; 2]: i8x2, m8x2 | i8 | test_v16 | x0, x1 | -+impl_i!([i8; 2]: i8x2, m8x2 | i8, u8 | test_v16 | x0, x1 | - From: | - /// A 16-bit vector with 2 `i8` lanes. - ); --impl_u!([u8; 2]: u8x2, m8x2 | u8 | test_v16 | x0, x1 | -+impl_u!([u8; 2]: u8x2, m8x2 | u8, u8 | test_v16 | x0, x1 | - From: | - /// A 16-bit vector with 2 `u8` lanes. - ); --impl_m!([m8; 2]: m8x2 | i8 | test_v16 | x0, x1 | -+impl_m!([m8; 2]: m8x2 | i8, u8 | test_v16 | x0, x1 | - From: m16x2, m32x2, m64x2, m128x2 | - /// A 16-bit vector mask with 2 `m8` lanes. - ); -diff --git a/third_party/rust/packed_simd/src/v256.rs b/third_party/rust/packed_simd/src/v256.rs ---- a/third_party/rust/packed_simd/src/v256.rs -+++ b/third_party/rust/packed_simd/src/v256.rs -@@ -1,86 +1,86 @@ - //! 256-bit wide vector types --#![rustfmt::skip] -+#[rustfmt::skip] - - use crate::*; - --impl_i!([i8; 32]: i8x32, m8x32 | i8 | test_v256 | -+impl_i!([i8; 32]: i8x32, m8x32 | i8, u32 | test_v256 | - x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, - x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31 | - From: | - /// A 256-bit vector with 32 `i8` lanes. - ); --impl_u!([u8; 32]: u8x32, m8x32 | u8 | test_v256 | -+impl_u!([u8; 32]: u8x32, m8x32 | u8, u32 | test_v256 | - x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, - x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31 | - From: | - /// A 256-bit vector with 32 `u8` lanes. - ); --impl_m!([m8; 32]: m8x32 | i8 | test_v256 | -+impl_m!([m8; 32]: m8x32 | i8, u32 | test_v256 | - x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, - x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31 | - From: | - /// A 256-bit vector mask with 32 `m8` lanes. - ); - --impl_i!([i16; 16]: i16x16, m16x16 | i16 | test_v256 | -+impl_i!([i16; 16]: i16x16, m16x16 | i16, u16 | test_v256 | - x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15 | - From: i8x16, u8x16 | - /// A 256-bit vector with 16 `i16` lanes. - ); --impl_u!([u16; 16]: u16x16, m16x16 | u16 | test_v256 | -+impl_u!([u16; 16]: u16x16, m16x16 | u16, u16 | test_v256 | - x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15 | - From: u8x16 | - /// A 256-bit vector with 16 `u16` lanes. - ); --impl_m!([m16; 16]: m16x16 | i16 | test_v256 | -+impl_m!([m16; 16]: m16x16 | i16, u16 | test_v256 | - x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15 | - From: m8x16 | - /// A 256-bit vector mask with 16 `m16` lanes. - ); - --impl_i!([i32; 8]: i32x8, m32x8 | i32 | test_v256 | x0, x1, x2, x3, x4, x5, x6, x7 | -+impl_i!([i32; 8]: i32x8, m32x8 | i32, u8 | test_v256 | x0, x1, x2, x3, x4, x5, x6, x7 | - From: i8x8, u8x8, i16x8, u16x8 | - /// A 256-bit vector with 8 `i32` lanes. - ); --impl_u!([u32; 8]: u32x8, m32x8 | u32 | test_v256 | x0, x1, x2, x3, x4, x5, x6, x7 | -+impl_u!([u32; 8]: u32x8, m32x8 | u32, u8 | test_v256 | x0, x1, x2, x3, x4, x5, x6, x7 | - From: u8x8, u16x8 | - /// A 256-bit vector with 8 `u32` lanes. - ); - impl_f!([f32; 8]: f32x8, m32x8 | f32 | test_v256 | x0, x1, x2, x3, x4, x5, x6, x7 | - From: i8x8, u8x8, i16x8, u16x8 | - /// A 256-bit vector with 8 `f32` lanes. - ); --impl_m!([m32; 8]: m32x8 | i32 | test_v256 | x0, x1, x2, x3, x4, x5, x6, x7 | -+impl_m!([m32; 8]: m32x8 | i32, u8 | test_v256 | x0, x1, x2, x3, x4, x5, x6, x7 | - From: m8x8, m16x8 | - /// A 256-bit vector mask with 8 `m32` lanes. - ); - --impl_i!([i64; 4]: i64x4, m64x4 | i64 | test_v256 | x0, x1, x2, x3 | -+impl_i!([i64; 4]: i64x4, m64x4 | i64, u8 | test_v256 | x0, x1, x2, x3 | - From: i8x4, u8x4, i16x4, u16x4, i32x4, u32x4 | - /// A 256-bit vector with 4 `i64` lanes. - ); --impl_u!([u64; 4]: u64x4, m64x4 | u64 | test_v256 | x0, x1, x2, x3 | -+impl_u!([u64; 4]: u64x4, m64x4 | u64, u8 | test_v256 | x0, x1, x2, x3 | - From: u8x4, u16x4, u32x4 | - /// A 256-bit vector with 4 `u64` lanes. - ); - impl_f!([f64; 4]: f64x4, m64x4 | f64 | test_v256 | x0, x1, x2, x3 | - From: i8x4, u8x4, i16x4, u16x4, i32x4, u32x4, f32x4 | - /// A 256-bit vector with 4 `f64` lanes. - ); --impl_m!([m64; 4]: m64x4 | i64 | test_v256 | x0, x1, x2, x3 | -+impl_m!([m64; 4]: m64x4 | i64, u8 | test_v256 | x0, x1, x2, x3 | - From: m8x4, m16x4, m32x4 | - /// A 256-bit vector mask with 4 `m64` lanes. - ); - --impl_i!([i128; 2]: i128x2, m128x2 | i128 | test_v256 | x0, x1 | -+impl_i!([i128; 2]: i128x2, m128x2 | i128, u8 | test_v256 | x0, x1 | - From: i8x2, u8x2, i16x2, u16x2, i32x2, u32x2, i64x2, u64x2 | - /// A 256-bit vector with 2 `i128` lanes. - ); --impl_u!([u128; 2]: u128x2, m128x2 | u128 | test_v256 | x0, x1 | -+impl_u!([u128; 2]: u128x2, m128x2 | u128, u8 | test_v256 | x0, x1 | - From: u8x2, u16x2, u32x2, u64x2 | - /// A 256-bit vector with 2 `u128` lanes. - ); --impl_m!([m128; 2]: m128x2 | i128 | test_v256 | x0, x1 | -+impl_m!([m128; 2]: m128x2 | i128, u8 | test_v256 | x0, x1 | - From: m8x2, m16x2, m32x2, m64x2 | - /// A 256-bit vector mask with 2 `m128` lanes. - ); -diff --git a/third_party/rust/packed_simd/src/v32.rs b/third_party/rust/packed_simd/src/v32.rs ---- a/third_party/rust/packed_simd/src/v32.rs -+++ b/third_party/rust/packed_simd/src/v32.rs -@@ -1,29 +1,29 @@ - //! 32-bit wide vector types - - use crate::*; - --impl_i!([i8; 4]: i8x4, m8x4 | i8 | test_v32 | x0, x1, x2, x3 | -+impl_i!([i8; 4]: i8x4, m8x4 | i8, u8 | test_v32 | x0, x1, x2, x3 | - From: | - /// A 32-bit vector with 4 `i8` lanes. - ); --impl_u!([u8; 4]: u8x4, m8x4 | u8 | test_v32 | x0, x1, x2, x3 | -+impl_u!([u8; 4]: u8x4, m8x4 | u8, u8 | test_v32 | x0, x1, x2, x3 | - From: | - /// A 32-bit vector with 4 `u8` lanes. - ); --impl_m!([m8; 4]: m8x4 | i8 | test_v32 | x0, x1, x2, x3 | -+impl_m!([m8; 4]: m8x4 | i8, u8 | test_v32 | x0, x1, x2, x3 | - From: m16x4, m32x4, m64x4 | - /// A 32-bit vector mask with 4 `m8` lanes. - ); - --impl_i!([i16; 2]: i16x2, m16x2 | i16 | test_v32 | x0, x1 | -+impl_i!([i16; 2]: i16x2, m16x2 | i16, u8 | test_v32 | x0, x1 | - From: i8x2, u8x2 | - /// A 32-bit vector with 2 `i16` lanes. - ); --impl_u!([u16; 2]: u16x2, m16x2 | u16 | test_v32 | x0, x1 | -+impl_u!([u16; 2]: u16x2, m16x2 | u16, u8 | test_v32 | x0, x1 | - From: u8x2 | - /// A 32-bit vector with 2 `u16` lanes. - ); --impl_m!([m16; 2]: m16x2 | i16 | test_v32 | x0, x1 | -+impl_m!([m16; 2]: m16x2 | i16, u8 | test_v32 | x0, x1 | - From: m8x2, m32x2, m64x2, m128x2 | - /// A 32-bit vector mask with 2 `m16` lanes. - ); -diff --git a/third_party/rust/packed_simd/src/v512.rs b/third_party/rust/packed_simd/src/v512.rs ---- a/third_party/rust/packed_simd/src/v512.rs -+++ b/third_party/rust/packed_simd/src/v512.rs -@@ -1,99 +1,99 @@ - //! 512-bit wide vector types --#![rustfmt::skip] -+#[rustfmt::skip] - - use crate::*; - --impl_i!([i8; 64]: i8x64, m8x64 | i8 | test_v512 | -+impl_i!([i8; 64]: i8x64, m8x64 | i8, u64 | test_v512 | - x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, - x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31, - x32, x33, x34, x35, x36, x37, x38, x39, x40, x41, x42, x43, x44, x45, x46, x47, - x48, x49, x50, x51, x52, x53, x54, x55, x56, x57, x58, x59, x60, x61, x62, x63 | - From: | - /// A 512-bit vector with 64 `i8` lanes. - ); --impl_u!([u8; 64]: u8x64, m8x64 | u8 | test_v512 | -+impl_u!([u8; 64]: u8x64, m8x64 | u8, u64 | test_v512 | - x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, - x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31, - x32, x33, x34, x35, x36, x37, x38, x39, x40, x41, x42, x43, x44, x45, x46, x47, - x48, x49, x50, x51, x52, x53, x54, x55, x56, x57, x58, x59, x60, x61, x62, x63 | - From: | - /// A 512-bit vector with 64 `u8` lanes. - ); --impl_m!([m8; 64]: m8x64 | i8 | test_v512 | -+impl_m!([m8; 64]: m8x64 | i8, u64 | test_v512 | - x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, - x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31, - x32, x33, x34, x35, x36, x37, x38, x39, x40, x41, x42, x43, x44, x45, x46, x47, - x48, x49, x50, x51, x52, x53, x54, x55, x56, x57, x58, x59, x60, x61, x62, x63 | - From: | - /// A 512-bit vector mask with 64 `m8` lanes. - ); - --impl_i!([i16; 32]: i16x32, m16x32 | i16 | test_v512 | -+impl_i!([i16; 32]: i16x32, m16x32 | i16, u32 | test_v512 | - x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, - x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31 | - From: i8x32, u8x32 | - /// A 512-bit vector with 32 `i16` lanes. - ); --impl_u!([u16; 32]: u16x32, m16x32 | u16 | test_v512 | -+impl_u!([u16; 32]: u16x32, m16x32 | u16, u32 | test_v512 | - x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, - x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31 | - From: u8x32 | - /// A 512-bit vector with 32 `u16` lanes. - ); --impl_m!([m16; 32]: m16x32 | i16 | test_v512 | -+impl_m!([m16; 32]: m16x32 | i16, u32 | test_v512 | - x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, - x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31 | - From: m8x32 | - /// A 512-bit vector mask with 32 `m16` lanes. - ); - --impl_i!([i32; 16]: i32x16, m32x16 | i32 | test_v512 | -+impl_i!([i32; 16]: i32x16, m32x16 | i32, u16 | test_v512 | - x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15 | - From: i8x16, u8x16, i16x16, u16x16 | - /// A 512-bit vector with 16 `i32` lanes. - ); --impl_u!([u32; 16]: u32x16, m32x16 | u32 | test_v512 | -+impl_u!([u32; 16]: u32x16, m32x16 | u32, u16 | test_v512 | - x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15 | - From: u8x16, u16x16 | - /// A 512-bit vector with 16 `u32` lanes. - ); - impl_f!([f32; 16]: f32x16, m32x16 | f32 | test_v512 | - x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15 | - From: i8x16, u8x16, i16x16, u16x16 | - /// A 512-bit vector with 16 `f32` lanes. - ); --impl_m!([m32; 16]: m32x16 | i32 | test_v512 | -+impl_m!([m32; 16]: m32x16 | i32, u16 | test_v512 | - x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15 | - From: m8x16, m16x16 | - /// A 512-bit vector mask with 16 `m32` lanes. - ); - --impl_i!([i64; 8]: i64x8, m64x8 | i64 | test_v512 | x0, x1, x2, x3, x4, x5, x6, x7 | -+impl_i!([i64; 8]: i64x8, m64x8 | i64, u8 | test_v512 | x0, x1, x2, x3, x4, x5, x6, x7 | - From: i8x8, u8x8, i16x8, u16x8, i32x8, u32x8 | - /// A 512-bit vector with 8 `i64` lanes. - ); --impl_u!([u64; 8]: u64x8, m64x8 | u64 | test_v512 | x0, x1, x2, x3, x4, x5, x6, x7 | -+impl_u!([u64; 8]: u64x8, m64x8 | u64, u8 | test_v512 | x0, x1, x2, x3, x4, x5, x6, x7 | - From: u8x8, u16x8, u32x8 | - /// A 512-bit vector with 8 `u64` lanes. - ); - impl_f!([f64; 8]: f64x8, m64x8 | f64 | test_v512 | x0, x1, x2, x3, x4, x5, x6, x7 | - From: i8x8, u8x8, i16x8, u16x8, i32x8, u32x8, f32x8 | - /// A 512-bit vector with 8 `f64` lanes. - ); --impl_m!([m64; 8]: m64x8 | i64 | test_v512 | x0, x1, x2, x3, x4, x5, x6, x7 | -+impl_m!([m64; 8]: m64x8 | i64, u8 | test_v512 | x0, x1, x2, x3, x4, x5, x6, x7 | - From: m8x8, m16x8, m32x8 | - /// A 512-bit vector mask with 8 `m64` lanes. - ); - --impl_i!([i128; 4]: i128x4, m128x4 | i128 | test_v512 | x0, x1, x2, x3 | -+impl_i!([i128; 4]: i128x4, m128x4 | i128, u8 | test_v512 | x0, x1, x2, x3 | - From: i8x4, u8x4, i16x4, u16x4, i32x4, u32x4, i64x4, u64x4 | - /// A 512-bit vector with 4 `i128` lanes. - ); --impl_u!([u128; 4]: u128x4, m128x4 | u128 | test_v512 | x0, x1, x2, x3 | -+impl_u!([u128; 4]: u128x4, m128x4 | u128, u8 | test_v512 | x0, x1, x2, x3 | - From: u8x4, u16x4, u32x4, u64x4 | - /// A 512-bit vector with 4 `u128` lanes. - ); --impl_m!([m128; 4]: m128x4 | i128 | test_v512 | x0, x1, x2, x3 | -+impl_m!([m128; 4]: m128x4 | i128, u8 | test_v512 | x0, x1, x2, x3 | - From: m8x4, m16x4, m32x4, m64x4 | - /// A 512-bit vector mask with 4 `m128` lanes. - ); -diff --git a/third_party/rust/packed_simd/src/v64.rs b/third_party/rust/packed_simd/src/v64.rs ---- a/third_party/rust/packed_simd/src/v64.rs -+++ b/third_party/rust/packed_simd/src/v64.rs -@@ -1,66 +1,66 @@ - //! 64-bit wide vector types --#![rustfmt::skip] -+#[rustfmt::skip] - - use super::*; - --impl_i!([i8; 8]: i8x8, m8x8 | i8 | test_v64 | x0, x1, x2, x3, x4, x5, x6, x7 | -+impl_i!([i8; 8]: i8x8, m8x8 | i8, u8 | test_v64 | x0, x1, x2, x3, x4, x5, x6, x7 | - From: | - /// A 64-bit vector with 8 `i8` lanes. - ); --impl_u!([u8; 8]: u8x8, m8x8 | u8 | test_v64 | x0, x1, x2, x3, x4, x5, x6, x7 | -+impl_u!([u8; 8]: u8x8, m8x8 | u8, u8 | test_v64 | x0, x1, x2, x3, x4, x5, x6, x7 | - From: | - /// A 64-bit vector with 8 `u8` lanes. - ); --impl_m!([m8; 8]: m8x8 | i8 | test_v64 | x0, x1, x2, x3, x4, x5, x6, x7 | -+impl_m!([m8; 8]: m8x8 | i8, u8 | test_v64 | x0, x1, x2, x3, x4, x5, x6, x7 | - From: m16x8, m32x8 | - /// A 64-bit vector mask with 8 `m8` lanes. - ); - --impl_i!([i16; 4]: i16x4, m16x4 | i16 | test_v64 | x0, x1, x2, x3 | -+impl_i!([i16; 4]: i16x4, m16x4 | i16, u8 | test_v64 | x0, x1, x2, x3 | - From: i8x4, u8x4 | - /// A 64-bit vector with 4 `i16` lanes. - ); --impl_u!([u16; 4]: u16x4, m16x4 | u16 | test_v64 | x0, x1, x2, x3 | -+impl_u!([u16; 4]: u16x4, m16x4 | u16, u8 | test_v64 | x0, x1, x2, x3 | - From: u8x4 | - /// A 64-bit vector with 4 `u16` lanes. - ); --impl_m!([m16; 4]: m16x4 | i16 | test_v64 | x0, x1, x2, x3 | -+impl_m!([m16; 4]: m16x4 | i16, u8 | test_v64 | x0, x1, x2, x3 | - From: m8x4, m32x4, m64x4 | - /// A 64-bit vector mask with 4 `m16` lanes. - ); - --impl_i!([i32; 2]: i32x2, m32x2 | i32 | test_v64 | x0, x1 | -+impl_i!([i32; 2]: i32x2, m32x2 | i32, u8 | test_v64 | x0, x1 | - From: i8x2, u8x2, i16x2, u16x2 | - /// A 64-bit vector with 2 `i32` lanes. - ); --impl_u!([u32; 2]: u32x2, m32x2 | u32 | test_v64 | x0, x1 | -+impl_u!([u32; 2]: u32x2, m32x2 | u32, u8 | test_v64 | x0, x1 | - From: u8x2, u16x2 | - /// A 64-bit vector with 2 `u32` lanes. - ); --impl_m!([m32; 2]: m32x2 | i32 | test_v64 | x0, x1 | -+impl_m!([m32; 2]: m32x2 | i32, u8 | test_v64 | x0, x1 | - From: m8x2, m16x2, m64x2, m128x2 | - /// A 64-bit vector mask with 2 `m32` lanes. - ); - impl_f!([f32; 2]: f32x2, m32x2 | f32 | test_v64 | x0, x1 | - From: i8x2, u8x2, i16x2, u16x2 | - /// A 64-bit vector with 2 `f32` lanes. - ); - - /* --impl_i!([i64; 1]: i64x1, m64x1 | i64 | test_v64 | x0 | -+impl_i!([i64; 1]: i64x1, m64x1 | i64, u8 | test_v64 | x0 | - From: /*i8x1, u8x1, i16x1, u16x1, i32x1, u32x1*/ | // FIXME: primitive to vector conversion - /// A 64-bit vector with 1 `i64` lanes. - ); --impl_u!([u64; 1]: u64x1, m64x1 | u64 | test_v64 | x0 | -+impl_u!([u64; 1]: u64x1, m64x1 | u64, u8 | test_v64 | x0 | - From: /*u8x1, u16x1, u32x1*/ | // FIXME: primitive to vector conversion - /// A 64-bit vector with 1 `u64` lanes. - ); --impl_m!([m64; 1]: m64x1 | i64 | test_v64 | x0 | -+impl_m!([m64; 1]: m64x1 | i64, u8 | test_v64 | x0 | - From: /*m8x1, m16x1, m32x1, */ m128x1 | // FIXME: unary small vector types - /// A 64-bit vector mask with 1 `m64` lanes. - ); - impl_f!([f64; 1]: f64x1, m64x1 | f64 | test_v64 | x0 | - From: /*i8x1, u8x1, i16x1, u16x1, i32x1, u32x1, f32x1*/ | // FIXME: unary small vector types - /// A 64-bit vector with 1 `f64` lanes. - ); - */ -diff --git a/third_party/rust/packed_simd/src/vPtr.rs b/third_party/rust/packed_simd/src/vPtr.rs ---- a/third_party/rust/packed_simd/src/vPtr.rs -+++ b/third_party/rust/packed_simd/src/vPtr.rs -@@ -1,10 +1,10 @@ - //! Vectors of pointers --#![rustfmt::skip] -+#[rustfmt::skip] - - use crate::*; - - impl_const_p!( - [*const T; 2]: cptrx2, msizex2, usizex2, isizex2 | test_v128 | x0, x1 | From: | - /// A vector with 2 `*const T` lanes - ); - -diff --git a/third_party/rust/packed_simd/src/vSize.rs b/third_party/rust/packed_simd/src/vSize.rs ---- a/third_party/rust/packed_simd/src/vSize.rs -+++ b/third_party/rust/packed_simd/src/vSize.rs -@@ -1,53 +1,53 @@ - //! Vectors with pointer-sized elements - - use crate::codegen::pointer_sized_int::{isize_, usize_}; - use crate::*; - --impl_i!([isize; 2]: isizex2, msizex2 | isize_ | test_v128 | -+impl_i!([isize; 2]: isizex2, msizex2 | isize_, u8 | test_v128 | - x0, x1| - From: | - /// A vector with 2 `isize` lanes. - ); - --impl_u!([usize; 2]: usizex2, msizex2 | usize_ | test_v128 | -+impl_u!([usize; 2]: usizex2, msizex2 | usize_, u8 | test_v128 | - x0, x1| - From: | - /// A vector with 2 `usize` lanes. - ); --impl_m!([msize; 2]: msizex2 | isize_ | test_v128 | -+impl_m!([msize; 2]: msizex2 | isize_, u8 | test_v128 | - x0, x1 | - From: | - /// A vector mask with 2 `msize` lanes. - ); - --impl_i!([isize; 4]: isizex4, msizex4 | isize_ | test_v256 | -+impl_i!([isize; 4]: isizex4, msizex4 | isize_, u8 | test_v256 | - x0, x1, x2, x3 | - From: | - /// A vector with 4 `isize` lanes. - ); --impl_u!([usize; 4]: usizex4, msizex4 | usize_ | test_v256 | -+impl_u!([usize; 4]: usizex4, msizex4 | usize_, u8 | test_v256 | - x0, x1, x2, x3| - From: | - /// A vector with 4 `usize` lanes. - ); --impl_m!([msize; 4]: msizex4 | isize_ | test_v256 | -+impl_m!([msize; 4]: msizex4 | isize_, u8 | test_v256 | - x0, x1, x2, x3 | - From: | - /// A vector mask with 4 `msize` lanes. - ); - --impl_i!([isize; 8]: isizex8, msizex8 | isize_ | test_v512 | -+impl_i!([isize; 8]: isizex8, msizex8 | isize_, u8 | test_v512 | - x0, x1, x2, x3, x4, x5, x6, x7 | - From: | -- /// A vector with 4 `isize` lanes. -+ /// A vector with 8 `isize` lanes. - ); --impl_u!([usize; 8]: usizex8, msizex8 | usize_ | test_v512 | -+impl_u!([usize; 8]: usizex8, msizex8 | usize_, u8 | test_v512 | - x0, x1, x2, x3, x4, x5, x6, x7 | - From: | - /// A vector with 8 `usize` lanes. - ); --impl_m!([msize; 8]: msizex8 | isize_ | test_v512 | -+impl_m!([msize; 8]: msizex8 | isize_, u8 | test_v512 | - x0, x1, x2, x3, x4, x5, x6, x7 | - From: | - /// A vector mask with 8 `msize` lanes. - ); -diff --git a/third_party/rust/packed_simd/tests/endianness.rs b/third_party/rust/packed_simd/tests/endianness.rs ---- a/third_party/rust/packed_simd/tests/endianness.rs -+++ b/third_party/rust/packed_simd/tests/endianness.rs -@@ -12,51 +12,51 @@ fn endian_indexing() { - assert_eq!(v.extract(1), 1); - assert_eq!(v.extract(2), 2); - assert_eq!(v.extract(3), 3); - } - - #[cfg_attr(not(target_arch = "wasm32"), test)] - #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)] - fn endian_bitcasts() { -- #[cfg_attr(rustfmt, rustfmt_skip)] -+ #[rustfmt::skip] - let x = i8x16::new( - 0, 1, 2, 3, 4, 5, 6, 7, - 8, 9, 10, 11, 12, 13, 14, 15, - ); - let t: i16x8 = unsafe { mem::transmute(x) }; - let e: i16x8 = if cfg!(target_endian = "little") { - i16x8::new(256, 770, 1284, 1798, 2312, 2826, 3340, 3854) - } else { - i16x8::new(1, 515, 1029, 1543, 2057, 2571, 3085, 3599) - }; - assert_eq!(t, e); - } - - #[cfg_attr(not(target_arch = "wasm32"), test)] - #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)] - fn endian_casts() { -- #[cfg_attr(rustfmt, rustfmt_skip)] -+ #[rustfmt::skip] - let x = i8x16::new( - 0, 1, 2, 3, 4, 5, 6, 7, - 8, 9, 10, 11, 12, 13, 14, 15, - ); - let t: i16x16 = x.into(); // simd_cast -- #[cfg_attr(rustfmt, rustfmt_skip)] -+ #[rustfmt::skip] - let e = i16x16::new( - 0, 1, 2, 3, 4, 5, 6, 7, - 8, 9, 10, 11, 12, 13, 14, 15, - ); - assert_eq!(t, e); - } - - #[cfg_attr(not(target_arch = "wasm32"), test)] - #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)] - fn endian_load_and_stores() { -- #[cfg_attr(rustfmt, rustfmt_skip)] -+ #[rustfmt::skip] - let x = i8x16::new( - 0, 1, 2, 3, 4, 5, 6, 7, - 8, 9, 10, 11, 12, 13, 14, 15, - ); - let mut y: [i16; 8] = [0; 8]; - x.write_to_slice_unaligned(unsafe { - slice::from_raw_parts_mut(&mut y as *mut _ as *mut i8, 16) - }); -@@ -77,56 +77,61 @@ fn endian_load_and_stores() { - #[cfg_attr(not(target_arch = "wasm32"), test)] - #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)] - fn endian_array_union() { - union A { - data: [f32; 4], - vec: f32x4, - } - let x: [f32; 4] = unsafe { A { vec: f32x4::new(0., 1., 2., 3.) }.data }; -- assert_eq!(x[0], 0_f32); -- assert_eq!(x[1], 1_f32); -- assert_eq!(x[2], 2_f32); -- assert_eq!(x[3], 3_f32); -+ // As all of these are integer values within the mantissa^1 range, it -+ // would be very unusual for them to actually fail to compare. -+ #[allow(clippy::float_cmp)] -+ { -+ assert_eq!(x[0], 0_f32); -+ assert_eq!(x[1], 1_f32); -+ assert_eq!(x[2], 2_f32); -+ assert_eq!(x[3], 3_f32); -+ } - let y: f32x4 = unsafe { A { data: [3., 2., 1., 0.] }.vec }; - assert_eq!(y, f32x4::new(3., 2., 1., 0.)); - - union B { - data: [i8; 16], - vec: i8x16, - } -- #[cfg_attr(rustfmt, rustfmt_skip)] -+ #[rustfmt::skip] - let x = i8x16::new( - 0, 1, 2, 3, 4, 5, 6, 7, - 8, 9, 10, 11, 12, 13, 14, 15, - ); - let x: [i8; 16] = unsafe { B { vec: x }.data }; - -- for i in 0..16 { -- assert_eq!(x[i], i as i8); -+ for (i, v) in x.iter().enumerate() { -+ assert_eq!(i as i8, *v); - } - -- #[cfg_attr(rustfmt, rustfmt_skip)] -+ #[rustfmt::skip] - let y = [ - 15, 14, 13, 12, 11, 19, 9, 8, - 7, 6, 5, 4, 3, 2, 1, 0 - ]; -- #[cfg_attr(rustfmt, rustfmt_skip)] -+ #[rustfmt::skip] - let e = i8x16::new( - 15, 14, 13, 12, 11, 19, 9, 8, - 7, 6, 5, 4, 3, 2, 1, 0 - ); - let z = unsafe { B { data: y }.vec }; - assert_eq!(z, e); - - union C { - data: [i16; 8], - vec: i8x16, - } -- #[cfg_attr(rustfmt, rustfmt_skip)] -+ #[rustfmt::skip] - let x = i8x16::new( - 0, 1, 2, 3, 4, 5, 6, 7, - 8, 9, 10, 11, 12, 13, 14, 15, - ); - let x: [i16; 8] = unsafe { C { vec: x }.data }; - - let e: [i16; 8] = if cfg!(target_endian = "little") { - [256, 770, 1284, 1798, 2312, 2826, 3340, 3854] -@@ -140,31 +145,36 @@ fn endian_array_union() { - #[cfg_attr(target_arch = "wasm32", wasm_bindgen_test)] - fn endian_tuple_access() { - type F32x4T = (f32, f32, f32, f32); - union A { - data: F32x4T, - vec: f32x4, - } - let x: F32x4T = unsafe { A { vec: f32x4::new(0., 1., 2., 3.) }.data }; -- assert_eq!(x.0, 0_f32); -- assert_eq!(x.1, 1_f32); -- assert_eq!(x.2, 2_f32); -- assert_eq!(x.3, 3_f32); -+ // As all of these are integer values within the mantissa^1 range, it -+ // would be very unusual for them to actually fail to compare. -+ #[allow(clippy::float_cmp)] -+ { -+ assert_eq!(x.0, 0_f32); -+ assert_eq!(x.1, 1_f32); -+ assert_eq!(x.2, 2_f32); -+ assert_eq!(x.3, 3_f32); -+ } - let y: f32x4 = unsafe { A { data: (3., 2., 1., 0.) }.vec }; - assert_eq!(y, f32x4::new(3., 2., 1., 0.)); - -- #[cfg_attr(rustfmt, rustfmt_skip)] -+ #[rustfmt::skip] - type I8x16T = (i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8); - union B { - data: I8x16T, - vec: i8x16, - } - -- #[cfg_attr(rustfmt, rustfmt_skip)] -+ #[rustfmt::skip] - let x = i8x16::new( - 0, 1, 2, 3, 4, 5, 6, 7, - 8, 9, 10, 11, 12, 13, 14, 15, - ); - let x: I8x16T = unsafe { B { vec: x }.data }; - - assert_eq!(x.0, 0); - assert_eq!(x.1, 1); -@@ -178,37 +188,37 @@ fn endian_tuple_access() { - assert_eq!(x.9, 9); - assert_eq!(x.10, 10); - assert_eq!(x.11, 11); - assert_eq!(x.12, 12); - assert_eq!(x.13, 13); - assert_eq!(x.14, 14); - assert_eq!(x.15, 15); - -- #[cfg_attr(rustfmt, rustfmt_skip)] -+ #[rustfmt::skip] - let y = ( - 15, 14, 13, 12, 11, 10, 9, 8, - 7, 6, 5, 4, 3, 2, 1, 0 - ); - let z: i8x16 = unsafe { B { data: y }.vec }; -- #[cfg_attr(rustfmt, rustfmt_skip)] -+ #[rustfmt::skip] - let e = i8x16::new( - 15, 14, 13, 12, 11, 10, 9, 8, - 7, 6, 5, 4, 3, 2, 1, 0 - ); - assert_eq!(e, z); - -- #[cfg_attr(rustfmt, rustfmt_skip)] -+ #[rustfmt::skip] - type I16x8T = (i16, i16, i16, i16, i16, i16, i16, i16); - union C { - data: I16x8T, - vec: i8x16, - } - -- #[cfg_attr(rustfmt, rustfmt_skip)] -+ #[rustfmt::skip] - let x = i8x16::new( - 0, 1, 2, 3, 4, 5, 6, 7, - 8, 9, 10, 11, 12, 13, 14, 15, - ); - let x: I16x8T = unsafe { C { vec: x }.data }; - - let e: [i16; 8] = if cfg!(target_endian = "little") { - [256, 770, 1284, 1798, 2312, 2826, 3340, 3854] -@@ -219,28 +229,28 @@ fn endian_tuple_access() { - assert_eq!(x.1, e[1]); - assert_eq!(x.2, e[2]); - assert_eq!(x.3, e[3]); - assert_eq!(x.4, e[4]); - assert_eq!(x.5, e[5]); - assert_eq!(x.6, e[6]); - assert_eq!(x.7, e[7]); - -- #[cfg_attr(rustfmt, rustfmt_skip)] -+ #[rustfmt::skip] - #[repr(C)] - #[derive(Copy ,Clone)] - pub struct Tup(pub i8, pub i8, pub i16, pub i8, pub i8, pub i16, - pub i8, pub i8, pub i16, pub i8, pub i8, pub i16); - - union D { - data: Tup, - vec: i8x16, - } - -- #[cfg_attr(rustfmt, rustfmt_skip)] -+ #[rustfmt::skip] - let x = i8x16::new( - 0, 1, 2, 3, 4, 5, 6, 7, - 8, 9, 10, 11, 12, 13, 14, 15, - ); - let x: Tup = unsafe { D { vec: x }.data }; - - let e: [i16; 12] = if cfg!(target_endian = "little") { - [0, 1, 770, 4, 5, 1798, 8, 9, 2826, 12, 13, 3854] - diff --git a/thunderbird-91.4.1-python-setuptools-60.0.4.patch b/thunderbird-91.4.1-python-setuptools-60.0.4.patch deleted file mode 100644 index 817fa8f..0000000 --- a/thunderbird-91.4.1-python-setuptools-60.0.4.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- thunderbird-91.4.1/mach.orig 2021-12-23 10:55:38.758897708 +0100 -+++ thunderbird-91.4.1/mach 2021-12-23 10:55:46.712045948 +0100 -@@ -124,6 +124,7 @@ - - import os - import sys -+import setuptools - - def load_mach(dir_path, mach_path): - if sys.version_info < (3, 5): diff --git a/thunderbird-91.5.1-libwayland-1.20.0.patch b/thunderbird-91.5.1-libwayland-1.20.0.patch deleted file mode 100644 index bcd5e25..0000000 --- a/thunderbird-91.5.1-libwayland-1.20.0.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Kevin Daudt -Date: Sun, 12 Dec 2021 13:38:48 +0000 -Subject: [PATCH] Bug 1745560 - Add missing stub for wl_proxy_marshal_flags, - r=stransky - -Firefox fails to build against wayland 1.20 because this symbol is missing - -Differential Revision: https://phabricator.services.mozilla.com/D133583 ---- - widget/gtk/mozwayland/mozwayland.c | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/widget/gtk/mozwayland/mozwayland.c b/widget/gtk/mozwayland/mozwayland.c -index 7a448e6321e2..1a86468b4f3d 100644 ---- a/widget/gtk/mozwayland/mozwayland.c -+++ b/widget/gtk/mozwayland/mozwayland.c -@@ -200,3 +200,10 @@ MOZ_EXPORT int wl_list_empty(const struct wl_list* list) { return -1; } - - MOZ_EXPORT void wl_list_insert_list(struct wl_list* list, - struct wl_list* other) {} -+ -+MOZ_EXPORT struct wl_proxy* wl_proxy_marshal_flags( -+ struct wl_proxy* proxy, uint32_t opcode, -+ const struct wl_interface* interface, uint32_t version, uint32_t flags, -+ ...) { -+ return NULL; -+} diff --git a/thunderbird.spec b/thunderbird.spec index 2c2a658..3440624 100644 --- a/thunderbird.spec +++ b/thunderbird.spec @@ -8,7 +8,8 @@ #%define source_dir comm-esr%(echo %version | cut -d. -f1) Name: thunderbird -Version: 127.0 +Epoch: 1 +Version: 115.13.0 Release: 1mamba Summary: Mozilla Thunderbird email, RSS, and newsgroup client Group: Graphical Desktop/Applications/Internet @@ -23,15 +24,14 @@ Source3: mozilla-thunderbird128x128.png Source4: thunderbird-script Source5: thunderbird-autoupdate Source6: thunderbird-distribution.ini -Patch14: thunderbird-78.8.1-rust-1.48.patch -Patch15: thunderbird-78.8.1-fix-passing-system-bzip2-ldflags.patch -Patch16: thunderbird-91.4.1-python-setuptools-60.0.4.patch -Patch17: thunderbird-91.5.1-libwayland-1.20.0.patch -Patch18: thunderbird-102.3.2-cbindgen-0.24.patch -Patch19: thunderbird-115.5.0-icu-74.1.patch +Patch0: thunderbird-115.5.0-icu-74.1.patch +Patch1: thunderbird-115.13.0-fix-libc++-18-ignore-tuple-harder.patch +Patch2: thunderbird-115.13.0-llvm-18-variable-does-not-need-to-be-mutable.patch +Patch3: thunderbird-115.13.0-rustc-18-1.patch +Patch4: thunderbird-115.13.0-rustc-18-2.patch License: GPL,MPL 1.1,LGPL ## AUTOBUILDREQ-BEGIN -BuildRequires: xulrunner-devel +BuildRequires: firefox-devel BuildRequires: glibc-devel BuildRequires: libX11-devel BuildRequires: libXcomposite-devel @@ -42,12 +42,14 @@ BuildRequires: libXfixes-devel BuildRequires: libXi-devel BuildRequires: libXrandr-devel BuildRequires: libXrender-devel +BuildRequires: libXtst-devel BuildRequires: libalsa-devel BuildRequires: libat-spi2-core-devel BuildRequires: libbotan2-devel BuildRequires: libbzip2-devel BuildRequires: libcairo-devel BuildRequires: libdbus-devel +BuildRequires: libdbus-glib-devel BuildRequires: libevent-devel BuildRequires: libffi-devel BuildRequires: libfontconfig-devel @@ -58,7 +60,6 @@ BuildRequires: libglib-devel BuildRequires: libgtk3-devel BuildRequires: libharfbuzz-devel BuildRequires: libicu-devel -BuildRequires: libjson-c-devel BuildRequires: libnspr-devel BuildRequires: libnss-devel BuildRequires: libpango-devel @@ -85,7 +86,6 @@ BuildRequires: libxcb-util-devel BuildRequires: libXft-devel BuildRequires: libXinerama-devel BuildRequires: libxml2-devel -#BuildRequires: perl-Gtk2 BuildRequires: pkgconfig BuildRequires: unzip BuildRequires: xorg-proto-devel @@ -204,8 +204,9 @@ This package contains the %{2} language support files for Thunderbird.\ #% debug_package %prep -%setup -q -D -T -:<< ___EOF +%setup -q +#-D -T +#:<< ___EOF # Don't clean build at the end #% global __spec_rmbuild_cmd /bin/true @@ -213,9 +214,12 @@ This package contains the %{2} language support files for Thunderbird.\ %global __provides_exclude_from ^%{_libdir}/thunderbird/.*$ %global __requires_exclude ^(libxul\\.so.*|libldap.*\\.so.*|libldif.*\\.so.*|libmoz.*\\.so.*|libprldap.*\\.so.*|librnp\\.so.*)$ -#%patch16 -p1 -#%patch18 -p1 -b .cbindgen-0.24 -%patch 19 -p1 -b .icu-74.1 +%define _default_patch_fuzz 2 +%patch 0 -p1 -b .icu-74.1 +%patch 1 -p1 -b .fix-libc++-18-ignore-tuple-harder +%patch 2 -p1 -b .llvm-18-variable-does-not-need-to-be-mutable +%patch 3 -p1 -b .rustc-18-1 +%patch 4 -p1 -b .rustc-18-2 rm -f .mozconfig cat << EOF > .mozconfig @@ -229,10 +233,10 @@ ac_add_options --enable-hardening ac_add_options --enable-optimize # https://bugzilla.mozilla.org/show_bug.cgi?id=1521249 ac_add_options --enable-rust-simd -## https://bugzilla.mozilla.org/show_bug.cgi?id=1423822 -#%ifarch %{ix86} x86_64 -#ac_add_options --disable-elf-hack -#%endif +# https://bugzilla.mozilla.org/show_bug.cgi?id=1423822 +%ifarch %{ix86} x86_64 +ac_add_options --disable-elf-hack +%endif # Branding ac_add_options --enable-official-branding @@ -244,7 +248,6 @@ ac_add_options --with-system-zlib ac_add_options --with-system-bz2 ac_add_options --with-system-icu ac_add_options --with-system-jpeg -ac_add_options --with-system-jsonc # does not have APNG support #ac_add_options --with-system-png ac_add_options --with-system-libvpx @@ -260,9 +263,12 @@ ac_add_options --without-wasm-sandboxed-libraries # Features ac_add_options --enable-alsa +#ac_add_options --enable-openpgp +#ac_add_options --enable-calendar ac_add_options --disable-jack ac_add_options --disable-crashreporter ac_add_options --disable-updater +#ac_add_options --disable-tests %ifarch %{ix86} ac_add_options --disable-debug-symbols %endif @@ -272,6 +278,13 @@ ac_add_options --with-unsigned-addon-scopes=app,system ac_add_options --allow-addon-sideload EOF +# Fix build with rust: +# error: the listed checksum of `third_party/rust/bindgen/ir/item.rs` has changed: +sed -e 's|73114a5c28472e77082ad259113ffafb418ed602c1741f26da3e10278b0bf93e|a88d6cc10ec1322b53a8f4c782b5133135ace0fdfcf03d1624b768788e17be0f|' \ + -i third_party/rust/mp4parse/.cargo-checksum.json +sed -e 's|880c982df0843cbdff38b9f9c3829a2d863a224e4de2260c41c3ac69e9148ad4|239b3e4d20498f69ed5f94481ed932340bd58cb485b26c35b09517f249d20d11|' \ + -i third_party/rust/bindgen/.cargo-checksum.json + #%if %enable_debug_info #echo "export CFLAGS="-gstabs+"" >> .mozconfig #echo "export CXXFLAGS="-gstabs+"" >> .mozconfig @@ -288,7 +301,7 @@ export PYTHON=%{__python3} export CXXFLAGS="$(echo | gcc -Wp,-v -x c++ - -fsyntax-only 2>&1| grep "^ %{_libdir}"|grep "c++"|while read line; do echo -n "-I$line "; done)" %ifarch aarch64 %{ix86} -export LDFLAGS="-Wl,--no-keep-memory" +export LDFLAGS="-Wl,--no-keep-memory -Wl,--reduce-memory-overheads" export RUSTFLAGS="-Cdebuginfo=0" %endif @@ -425,6 +438,10 @@ fi %exclude %{_libdir}/thunderbird/distribution/extensions/langpack-*@thunderbird.mozilla.org.xpi %changelog +* Sun Jul 28 2024 Silvan Calarco 115.13.0-1mamba +- update to 115.13.0 +- roll back to stable supported release (epoch bump) + * Thu Jun 13 2024 Automatic Build System 127.0-1mamba - automatic version update by autodist