From 92f47016bc9c925bc8e882f13c9175d09ef529db Mon Sep 17 00:00:00 2001 From: Silvan Calarco Date: Fri, 5 Jan 2024 17:00:28 +0100 Subject: [PATCH] enabled usb redirection (--enable-usb-redir) [release 1.7.0-3mamba;Mon May 12 2014] --- README.md | 5 + qemu-0.8.0-dyngen.patch | 18 + qemu-0.8.0-gcc4_ppc.patch | 49 ++ qemu-0.8.0-gcc4_x86.patch | 874 ++++++++++++++++++++++++++++++++++ qemu-0.8.0-ldscript_ppc.patch | 120 +++++ qemu-0.8.1-build.patch | 39 ++ qemu-1.4.1-texinfo-5.patch | 28 ++ qemu-1.7.0-virtfs-ftbfs.patch | 20 + qemu-initscript | 115 +++++ qemu.spec | 412 ++++++++++++++++ 10 files changed, 1680 insertions(+) create mode 100644 qemu-0.8.0-dyngen.patch create mode 100644 qemu-0.8.0-gcc4_ppc.patch create mode 100644 qemu-0.8.0-gcc4_x86.patch create mode 100644 qemu-0.8.0-ldscript_ppc.patch create mode 100644 qemu-0.8.1-build.patch create mode 100644 qemu-1.4.1-texinfo-5.patch create mode 100644 qemu-1.7.0-virtfs-ftbfs.patch create mode 100644 qemu-initscript create mode 100644 qemu.spec diff --git a/README.md b/README.md index cb741ca..7bc7a2f 100644 --- a/README.md +++ b/README.md @@ -1,2 +1,7 @@ # qemu +QEMU is a generic and open source processor emulator which achieves a good emulation speed by using dynamic translation. +QEMU has two operating modes: + - Full system emulation. In this mode, QEMU emulates a full system (for example a PC or a PowerMac), including a processor and various peripherials. It can be used to launch different Operating Systems without rebooting the PC or to debug system code. + - User mode emulation (Linux host only). In this mode, QEMU can launch Linux processes compiled for one CPU on another CPU. + diff --git a/qemu-0.8.0-dyngen.patch b/qemu-0.8.0-dyngen.patch new file mode 100644 index 0000000..89f03f4 --- /dev/null +++ b/qemu-0.8.0-dyngen.patch @@ -0,0 +1,18 @@ +--- dyngen.c.orig 2005-04-30 11:59:05.000000000 +0100 ++++ dyngen.c 2005-04-30 12:00:11.000000000 +0100 +@@ -1396,11 +1395,13 @@ void gen_code(const char *name, host_ulo + #elif defined(HOST_PPC) + { + uint8_t *p; ++ uint32_t insn; + p = (void *)(p_end - 4); + if (p == p_start) + error("empty code for %s", name); +- if (get32((uint32_t *)p) != 0x4e800020) +- error("blr expected at the end of %s", name); ++ insn = get32((uint32_t *)p); ++ if (insn != 0x4e800020 && (insn & 0xfc000002) != 0x48000000) ++ error("blr or b expected at the end of %s", name); + copy_size = p - p_start; + } + #elif defined(HOST_S390) diff --git a/qemu-0.8.0-gcc4_ppc.patch b/qemu-0.8.0-gcc4_ppc.patch new file mode 100644 index 0000000..6dc71dd --- /dev/null +++ b/qemu-0.8.0-gcc4_ppc.patch @@ -0,0 +1,49 @@ +--- dyngen.c.orig 2005-09-11 01:11:34.117968136 +0200 ++++ dyngen.c 2005-09-11 01:14:16.128338816 +0200 +@@ -1996,6 +1996,9 @@ + int retpos; + int exit_addrs[MAX_EXITS]; + #endif ++#if defined(HOST_PPC) ++ uint8_t *blr_addr = NULL; ++#endif + + /* Compute exact size excluding prologue and epilogue instructions. + * Increment start_offset to skip epilogue instructions, then compute +@@ -2020,9 +2023,23 @@ + if (p == p_start) + error("empty code for %s", name); + insn = get32((uint32_t *)p); +- if (insn != 0x4e800020 && (insn & 0xfc000002) != 0x48000000) +- error("blr or b expected at the end of %s", name); +- copy_size = p - p_start; ++ if (get32((uint32_t *)p) == 0x4e800020) { ++ copy_size = p - p_start; /* blr at end */ ++ } else { ++ /* Find the blr and note its address so that we ++ can emit code to rewrite it to a branch. */ ++ do { ++ p -= 4; ++ ++ if (get32((uint32_t *)p) == 0x4e800020) { ++ blr_addr = p; ++ copy_size = p_end - p_start; ++ break; ++ } ++ } while (p > p_start); ++ if (p == p_start) ++ error("blr expected in the end of %s", name); ++ } + } + #elif defined(HOST_S390) + { +@@ -2635,6 +2652,9 @@ + #else + #error unsupport object format + #endif ++ if (blr_addr) ++ fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = 0x48000000 | %d;\n", ++ blr_addr - p_start, p_end - blr_addr); + } + #elif defined(HOST_S390) + { diff --git a/qemu-0.8.0-gcc4_x86.patch b/qemu-0.8.0-gcc4_x86.patch new file mode 100644 index 0000000..2fc53d4 --- /dev/null +++ b/qemu-0.8.0-gcc4_x86.patch @@ -0,0 +1,874 @@ +--- dyngen-exec.h 24 Apr 2005 18:01:56 -0000 1.25 ++++ dyngen-exec.h 11 May 2005 20:38:33 -0000 +@@ -155,7 +155,12 @@ extern int printf(const char *, ...); + #endif + + /* force GCC to generate only one epilog at the end of the function */ ++#if defined(__i386__) || defined(__x86_64__) ++/* Also add 4 bytes of padding so that we can replace the ret with a jmp. */ ++#define FORCE_RET() asm volatile ("nop;nop;nop;nop"); ++#else + #define FORCE_RET() asm volatile (""); ++#endif + + #ifndef OPPROTO + #define OPPROTO +@@ -205,12 +210,19 @@ extern int __op_jmp0, __op_jmp1, __op_jm + #endif + + #ifdef __i386__ +-#define EXIT_TB() asm volatile ("ret") +-#define GOTO_LABEL_PARAM(n) asm volatile ("jmp " ASM_NAME(__op_gen_label) #n) ++/* Dyngen will replace hlt instructions with a ret instruction. Inserting a ++ ret directly would confuse dyngen. */ ++#define EXIT_TB() asm volatile ("hlt") ++/* Dyngen will replace cli with 0x9e (jmp). ++ We generate the offset manually. */ ++#define GOTO_LABEL_PARAM(n) \ ++ asm volatile ("cli;.long " ASM_NAME(__op_gen_label) #n " - 1f;1:") + #endif + #ifdef __x86_64__ +-#define EXIT_TB() asm volatile ("ret") +-#define GOTO_LABEL_PARAM(n) asm volatile ("jmp " ASM_NAME(__op_gen_label) #n) ++/* The same as i386. */ ++#define EXIT_TB() asm volatile ("hlt") ++#define GOTO_LABEL_PARAM(n) \ ++ asm volatile ("cli;.long " ASM_NAME(__op_gen_label) #n " - 1f;1:") + #endif + #ifdef __powerpc__ + #define EXIT_TB() asm volatile ("blr") +--- dyngen.c 27 Apr 2005 19:55:58 -0000 1.40 ++++ dyngen.c 11 May 2005 20:38:33 -0000 +@@ -32,6 +32,8 @@ + + #include "config-host.h" + ++//#define DEBUG_OP ++ + /* NOTE: we test CONFIG_WIN32 instead of _WIN32 to enabled cross + compilation */ + #if defined(CONFIG_WIN32) +@@ -1343,6 +1345,639 @@ int arm_emit_ldr_info(const char *name, + #endif + + ++#if defined(HOST_I386) || defined(HOST_X86_64) ++ ++/* This byte is the first byte of an instruction. */ ++#define FLAG_INSN (1 << 0) ++/* This byte has been processed as part of an instruction. */ ++#define FLAG_SCANNED (1 << 1) ++/* This instruction is a return instruction. Gcc cometimes generates prefix ++ bytes, so may be more than one byte long. */ ++#define FLAG_RET (1 << 2) ++/* This is either the target of a jump, or the preceeding instruction uses ++ a pc-relative offset. */ ++#define FLAG_TARGET (1 << 3) ++/* This is a magic instruction that needs fixing up. */ ++#define FLAG_EXIT (1 << 4) ++#define MAX_EXITS 5 ++ ++static void ++bad_opcode(const char *name, uint32_t op) ++{ ++ error("Unsupported opcode %0*x in %s", (op > 0xff) ? 4 : 2, op, name); ++} ++ ++/* Mark len bytes as scanned, Returns insn_size + len. Reports an error ++ if these bytes have already been scanned. */ ++static int ++eat_bytes(const char *name, char *flags, int insn, int insn_size, int len) ++{ ++ while (len > 0) { ++ /* This should never occur in sane code. */ ++ if (flags[insn + insn_size] & FLAG_SCANNED) ++ error ("Overlapping instructions in %s", name); ++ flags[insn + insn_size] |= FLAG_SCANNED; ++ insn_size++; ++ len--; ++ } ++ return insn_size; ++} ++ ++static void ++trace_i386_insn (const char *name, uint8_t *start_p, char *flags, int insn, ++ int len) ++{ ++ uint8_t *ptr; ++ uint8_t op; ++ int modrm; ++ int is_prefix; ++ int op_size; ++ int addr_size; ++ int insn_size; ++ int is_ret; ++ int is_condjmp; ++ int is_jmp; ++ int is_exit; ++ int is_pcrel; ++ int immed; ++ int seen_rexw; ++ int32_t disp; ++ ++ ptr = start_p + insn; ++ /* nonzero if this insn has a ModR/M byte. */ ++ modrm = 1; ++ /* The size of the immediate value in this instruction. */ ++ immed = 0; ++ /* The operand size. */ ++ op_size = 4; ++ /* The address size */ ++ addr_size = 4; ++ /* The total length of this instruction. */ ++ insn_size = 0; ++ is_prefix = 1; ++ is_ret = 0; ++ is_condjmp = 0; ++ is_jmp = 0; ++ is_exit = 0; ++ seen_rexw = 0; ++ is_pcrel = 0; ++ ++ while (is_prefix) { ++ op = ptr[insn_size]; ++ insn_size = eat_bytes(name, flags, insn, insn_size, 1); ++ is_prefix = 0; ++ switch (op >> 4) { ++ case 0: ++ case 1: ++ case 2: ++ case 3: ++ if (op == 0x0f) { ++ /* two-byte opcode. */ ++ op = ptr[insn_size]; ++ insn_size = eat_bytes(name, flags, insn, insn_size, 1); ++ switch (op >> 4) { ++ case 0: ++ if ((op & 0xf) > 3) ++ modrm = 0; ++ break; ++ case 1: /* vector move or prefetch */ ++ case 2: /* various moves and vector compares. */ ++ case 4: /* cmov */ ++ case 5: /* vector instructions */ ++ case 6: ++ case 13: ++ case 14: ++ case 15: ++ break; ++ case 7: /* mmx */ ++ if (op & 0x77) /* emms */ ++ modrm = 0; ++ break; ++ case 3: /* wrmsr, rdtsc, rdmsr, rdpmc, sysenter, sysexit */ ++ modrm = 0; ++ break; ++ case 8: /* long conditional jump */ ++ is_condjmp = 1; ++ immed = op_size; ++ modrm = 0; ++ break; ++ case 9: /* setcc */ ++ break; ++ case 10: ++ switch (op & 0x7) { ++ case 0: /* push fs/gs */ ++ case 1: /* pop fs/gs */ ++ case 2: /* cpuid/rsm */ ++ modrm = 0; ++ break; ++ case 4: /* shld/shrd immediate */ ++ immed = 1; ++ break; ++ default: /* Normal instructions with a ModR/M byte. */ ++ break; ++ } ++ break; ++ case 11: ++ switch (op & 0xf) { ++ case 10: /* bt, bts, btr, btc */ ++ immed = 1; ++ break; ++ default: ++ /* cmpxchg, lss, btr, lfs, lgs, movzx, btc, bsf, bsr ++ undefined, and movsx */ ++ break; ++ } ++ break; ++ case 12: ++ if (op & 8) { ++ /* bswap */ ++ modrm = 0; ++ } else { ++ switch (op & 0x7) { ++ case 2: ++ case 4: ++ case 5: ++ case 6: ++ immed = 1; ++ break; ++ default: ++ break; ++ } ++ } ++ break; ++ } ++ } else if ((op & 0x07) <= 0x3) { ++ /* General arithmentic ax. */ ++ } else if ((op & 0x07) <= 0x5) { ++ /* General arithmetic ax, immediate. */ ++ if (op & 0x01) ++ immed = op_size; ++ else ++ immed = 1; ++ modrm = 0; ++ } else if ((op & 0x23) == 0x22) { ++ /* Segment prefix. */ ++ is_prefix = 1; ++ } else { ++ /* Segment register push/pop or DAA/AAA/DAS/AAS. */ ++ modrm = 0; ++ } ++ break; ++ ++#if defined(HOST_X86_64) ++ case 4: /* rex prefix. */ ++ is_prefix = 1; ++ /* The address/operand size is actually 64-bit, but the immediate ++ values in the instruction are still 32-bit. */ ++ op_size = 4; ++ addr_size = 4; ++ if (op & 8) ++ seen_rexw = 1; ++ break; ++#else ++ case 4: /* inc/dec register. */ ++#endif ++ case 5: /* push/pop general register. */ ++ modrm = 0; ++ break; ++ ++ case 6: ++ switch (op & 0x0f) { ++ case 0: /* pusha */ ++ case 1: /* popa */ ++ modrm = 0; ++ break; ++ case 2: /* bound */ ++ case 3: /* arpl */ ++ break; ++ case 4: /* FS */ ++ case 5: /* GS */ ++ is_prefix = 1; ++ break; ++ case 6: /* opcode size prefix. */ ++ op_size = 2; ++ is_prefix = 1; ++ break; ++ case 7: /* Address size prefix. */ ++ addr_size = 2; ++ is_prefix = 1; ++ break; ++ case 8: /* push immediate */ ++ case 10: /* pop immediate */ ++ immed = op_size; ++ modrm = 0; ++ break; ++ case 9: /* imul immediate */ ++ case 11: /* imul immediate */ ++ immed = op_size; ++ break; ++ case 12: /* insb */ ++ case 13: /* insw */ ++ case 14: /* outsb */ ++ case 15: /* outsw */ ++ modrm = 0; ++ break; ++ } ++ break; ++ ++ case 7: /* Short conditional jump. */ ++ is_condjmp = 1; ++ immed = 1; ++ modrm = 0; ++ break; ++ ++ case 8: ++ if ((op & 0xf) <= 3) { ++ /* arithmetic immediate. */ ++ if ((op & 3) == 1) ++ immed = op_size; ++ else ++ immed = 1; ++ } ++ /* else test, xchg, mov, lea or pop general. */ ++ break; ++ ++ case 9: ++ /* Various single-byte opcodes with no modrm byte. */ ++ modrm = 0; ++ if (op == 10) { ++ /* Call */ ++ immed = 4; ++ } ++ break; ++ ++ case 10: ++ switch ((op & 0xe) >> 1) { ++ case 0: /* mov absoliute immediate. */ ++ case 1: ++ if (seen_rexw) ++ immed = 8; ++ else ++ immed = addr_size; ++ break; ++ case 4: /* test immediate. */ ++ if (op & 1) ++ immed = op_size; ++ else ++ immed = 1; ++ break; ++ default: /* Various string ops. */ ++ break; ++ } ++ modrm = 0; ++ break; ++ ++ case 11: /* move immediate to register */ ++ if (op & 8) { ++ if (seen_rexw) ++ immed = 8; ++ else ++ immed = op_size; ++ } else { ++ immed = 1; ++ } ++ modrm = 0; ++ break; ++ ++ case 12: ++ switch (op & 0xf) { ++ case 0: /* shift immediate */ ++ case 1: ++ immed = 1; ++ break; ++ case 2: /* ret immediate */ ++ immed = 2; ++ modrm = 0; ++ bad_opcode(name, op); ++ break; ++ case 3: /* ret */ ++ modrm = 0; ++ is_ret = 1; ++ case 4: /* les */ ++ case 5: /* lds */ ++ break; ++ case 6: /* mov immediate byte */ ++ immed = 1; ++ break; ++ case 7: /* mov immediate */ ++ immed = op_size; ++ break; ++ case 8: /* enter */ ++ /* TODO: Is this right? */ ++ immed = 3; ++ modrm = 0; ++ break; ++ case 10: /* retf immediate */ ++ immed = 2; ++ modrm = 0; ++ bad_opcode(name, op); ++ break; ++ case 13: /* int */ ++ immed = 1; ++ modrm = 0; ++ break; ++ case 11: /* retf */ ++ case 15: /* iret */ ++ modrm = 0; ++ bad_opcode(name, op); ++ break; ++ default: /* leave, int3 or into */ ++ modrm = 0; ++ break; ++ } ++ break; ++ ++ case 13: ++ if ((op & 0xf) >= 8) { ++ /* Coprocessor escape. For our purposes this is just a normal ++ instruction with a ModR/M byte. */ ++ } else if ((op & 0xf) >= 4) { ++ /* AAM, AAD or XLAT */ ++ modrm = 0; ++ } ++ /* else shift instruction */ ++ break; ++ ++ case 14: ++ switch ((op & 0xc) >> 2) { ++ case 0: /* loop or jcxz */ ++ is_condjmp = 1; ++ immed = 1; ++ break; ++ case 1: /* in/out immed */ ++ immed = 1; ++ break; ++ case 2: /* call or jmp */ ++ switch (op & 3) { ++ case 0: /* call */ ++ immed = op_size; ++ break; ++ case 1: /* long jump */ ++ immed = 4; ++ is_jmp = 1; ++ break; ++ case 2: /* far jmp */ ++ bad_opcode(name, op); ++ break; ++ case 3: /* short jmp */ ++ immed = 1; ++ is_jmp = 1; ++ break; ++ } ++ break; ++ case 3: /* in/out register */ ++ break; ++ } ++ modrm = 0; ++ break; ++ ++ case 15: ++ switch ((op & 0xe) >> 1) { ++ case 0: ++ case 1: ++ is_prefix = 1; ++ break; ++ case 2: ++ case 4: ++ case 5: ++ case 6: ++ modrm = 0; ++ /* Some privileged insns are used as markers. */ ++ switch (op) { ++ case 0xf4: /* hlt: Exit translation block. */ ++ is_exit = 1; ++ break; ++ case 0xfa: /* cli: Jump to label. */ ++ is_exit = 1; ++ immed = 4; ++ break; ++ case 0xfb: /* sti: TB patch jump. */ ++ /* Mark the insn for patching, but continue sscanning. */ ++ flags[insn] |= FLAG_EXIT; ++ immed = 4; ++ break; ++ } ++ break; ++ case 3: /* unary grp3 */ ++ if ((ptr[insn_size] & 0x38) == 0) { ++ if (op == 0xf7) ++ immed = op_size; ++ else ++ immed = 1; /* test immediate */ ++ } ++ break; ++ case 7: /* inc/dec grp4/5 */ ++ /* TODO: This includes indirect jumps. We should fail if we ++ encounter one of these. */ ++ break; ++ } ++ break; ++ } ++ } ++ ++ if (modrm) { ++ if (addr_size != 4) ++ error("16-bit addressing mode used in %s", name); ++ ++ disp = 0; ++ modrm = ptr[insn_size]; ++ insn_size = eat_bytes(name, flags, insn, insn_size, 1); ++ modrm &= 0xc7; ++ switch ((modrm & 0xc0) >> 6) { ++ case 0: ++ if (modrm == 5) ++ disp = 4; ++ break; ++ case 1: ++ disp = 1; ++ break; ++ case 2: ++ disp = 4; ++ break; ++ } ++ if ((modrm & 0xc0) != 0xc0 && (modrm & 0x7) == 4) { ++ /* SIB byte */ ++ if (modrm == 4 && (ptr[insn_size] & 0x7) == 5) { ++ disp = 4; ++ is_pcrel = 1; ++ } ++ insn_size = eat_bytes(name, flags, insn, insn_size, 1); ++ } ++ insn_size = eat_bytes(name, flags, insn, insn_size, disp); ++ } ++ insn_size = eat_bytes(name, flags, insn, insn_size, immed); ++ if (is_condjmp || is_jmp) { ++ if (immed == 1) { ++ disp = (int8_t)*(ptr + insn_size - 1); ++ } else { ++ disp = (((int32_t)*(ptr + insn_size - 1)) << 24) ++ | (((int32_t)*(ptr + insn_size - 2)) << 16) ++ | (((int32_t)*(ptr + insn_size - 3)) << 8) ++ | *(ptr + insn_size - 4); ++ } ++ disp += insn_size; ++ /* Jumps to external symbols point to the address of the offset ++ before relocation. */ ++ /* ??? These are probably a tailcall. We could fix them up by ++ replacing them with jmp to EOB + call, but it's easier to just ++ prevent the compiler generating them. */ ++ if (disp == 1) ++ error("Unconditional jump (sibcall?) in %s", name); ++ disp += insn; ++ if (disp < 0 || disp > len) ++ error("Jump outside instruction in %s", name); ++ ++ if ((flags[disp] & (FLAG_INSN | FLAG_SCANNED)) == FLAG_SCANNED) ++ error("Overlapping instructions in %s", name); ++ ++ flags[disp] |= (FLAG_INSN | FLAG_TARGET); ++ is_pcrel = 1; ++ } ++ if (is_pcrel) { ++ /* Mark the following insn as a jump target. This will stop ++ this instruction being moved. */ ++ flags[insn + insn_size] |= FLAG_TARGET; ++ } ++ if (is_ret) ++ flags[insn] |= FLAG_RET; ++ ++ if (is_exit) ++ flags[insn] |= FLAG_EXIT; ++ ++ if (!(is_jmp || is_ret || is_exit)) ++ flags[insn + insn_size] |= FLAG_INSN; ++} ++ ++/* Scan a function body. Returns the position of the return sequence. ++ Sets *patch_bytes to the number of bytes that need to be copied from that ++ location. If no patching is required (ie. the return is the last insn) ++ *patch_bytes will be set to -1. *plen is the number of code bytes to copy. ++ */ ++static int trace_i386_op(const char * name, uint8_t *start_p, int *plen, ++ int *patch_bytes, int *exit_addrs) ++{ ++ char *flags; ++ int more; ++ int insn; ++ int retpos; ++ int bytes; ++ int num_exits; ++ int len; ++ int last_insn; ++ ++ len = *plen; ++ flags = malloc(len + 1); ++ memset(flags, 0, len + 1); ++ flags[0] |= FLAG_INSN; ++ more = 1; ++ while (more) { ++ more = 0; ++ for (insn = 0; insn < len; insn++) { ++ if ((flags[insn] & (FLAG_INSN | FLAG_SCANNED)) == FLAG_INSN) { ++ trace_i386_insn(name, start_p, flags, insn, len); ++ more = 1; ++ } ++ } ++ } ++ ++ /* Strip any unused code at the end of the function. */ ++ while (len > 0 && flags[len - 1] == 0) ++ len--; ++ ++ retpos = -1; ++ num_exits = 0; ++ last_insn = 0; ++ for (insn = 0; insn < len; insn++) { ++ if (flags[insn] & FLAG_RET) { ++ /* ??? In theory it should be possible to handle multiple return ++ points. In practice it's not worth the effort. */ ++ if (retpos != -1) ++ error("Multiple return instructions in %s", name); ++ retpos = insn; ++ } ++ if (flags[insn] & FLAG_EXIT) { ++ if (num_exits == MAX_EXITS) ++ error("Too many block exits in %s", name); ++ exit_addrs[num_exits] = insn; ++ num_exits++; ++ } ++ if (flags[insn] & FLAG_INSN) ++ last_insn = insn; ++ } ++ ++ exit_addrs[num_exits] = -1; ++ if (retpos == -1) { ++ if (num_exits == 0) { ++ error ("No return instruction found in %s", name); ++ } else { ++ retpos = len; ++ last_insn = len; ++ } ++ } ++ ++ /* If the return instruction is the last instruction we can just ++ remove it. */ ++ if (retpos == last_insn) ++ *patch_bytes = -1; ++ else ++ *patch_bytes = 0; ++ ++ /* Back up over any nop instructions. */ ++ while (retpos > 0 ++ && (flags[retpos] & FLAG_TARGET) == 0 ++ && (flags[retpos - 1] & FLAG_INSN) != 0 ++ && start_p[retpos - 1] == 0x90) { ++ retpos--; ++ } ++ ++ if (*patch_bytes == -1) { ++ *plen = retpos; ++ free (flags); ++ return retpos; ++ } ++ *plen = len; ++ ++ /* The ret is in the middle of the function. Find four more bytes that ++ so the ret can be replaced by a jmp. */ ++ /* ??? Use a short jump where possible. */ ++ bytes = 4; ++ insn = retpos + 1; ++ /* We can clobber everything up to the next jump target. */ ++ while (insn < len && bytes > 0 && (flags[insn] & FLAG_TARGET) == 0) { ++ insn++; ++ bytes--; ++ } ++ if (bytes > 0) { ++ /* ???: Strip out nop blocks. */ ++ /* We can't do the replacement without clobbering anything important. ++ Copy preceeding instructions(s) to give us some space. */ ++ while (retpos > 0) { ++ /* If this byte is the target of a jmp we can't move it. */ ++ if (flags[retpos] & FLAG_TARGET) ++ break; ++ ++ (*patch_bytes)++; ++ bytes--; ++ retpos--; ++ ++ /* Break out of the loop if we have enough space and this is either ++ the first byte of an instruction or a pad byte. */ ++ if ((flags[retpos] & (FLAG_INSN | FLAG_SCANNED)) != FLAG_SCANNED ++ && bytes <= 0) { ++ break; ++ } ++ } ++ } ++ ++ if (bytes > 0) ++ error("Unable to replace ret with jmp in %s\n", name); ++ ++ free(flags); ++ return retpos; ++} ++ ++#endif ++ + #define MAX_ARGS 3 + + /* generate op code */ +@@ -1356,6 +1991,11 @@ void gen_code(const char *name, host_ulo + uint8_t args_present[MAX_ARGS]; + const char *sym_name, *p; + EXE_RELOC *rel; ++#if defined(HOST_I386) || defined(HOST_X86_64) ++ int patch_bytes; ++ int retpos; ++ int exit_addrs[MAX_EXITS]; ++#endif + + /* Compute exact size excluding prologue and epilogue instructions. + * Increment start_offset to skip epilogue instructions, then compute +@@ -1366,33 +2006,12 @@ void gen_code(const char *name, host_ulo + p_end = p_start + size; + start_offset = offset; + #if defined(HOST_I386) || defined(HOST_X86_64) +-#ifdef CONFIG_FORMAT_COFF +- { +- uint8_t *p; +- p = p_end - 1; +- if (p == p_start) +- error("empty code for %s", name); +- while (*p != 0xc3) { +- p--; +- if (p <= p_start) +- error("ret or jmp expected at the end of %s", name); +- } +- copy_size = p - p_start; +- } +-#else + { + int len; + len = p_end - p_start; +- if (len == 0) +- error("empty code for %s", name); +- if (p_end[-1] == 0xc3) { +- len--; +- } else { +- error("ret or jmp expected at the end of %s", name); +- } ++ retpos = trace_i386_op(name, p_start, &len, &patch_bytes, exit_addrs); + copy_size = len; + } +-#endif + #elif defined(HOST_PPC) + { + uint8_t *p; +@@ -1559,6 +2178,13 @@ void gen_code(const char *name, host_ulo + } + + if (gen_switch == 2) { ++#if defined(HOST_I386) || defined(HOST_X86_64) ++ if (patch_bytes != -1) ++ copy_size += patch_bytes; ++#ifdef DEBUG_OP ++ copy_size += 2; ++#endif ++#endif + fprintf(outfile, "DEF(%s, %d, %d)\n", name + 3, nb_args, copy_size); + } else if (gen_switch == 1) { + +@@ -1761,7 +2387,43 @@ void gen_code(const char *name, host_ulo + #error unsupport object format + #endif + } ++ } ++ /* Replace the marker instructions with the actual opcodes. */ ++ for (i = 0; exit_addrs[i] != -1; i++) { ++ int op; ++ switch (p_start[exit_addrs[i]]) ++ { ++ case 0xf4: op = 0xc3; break; /* hlt -> ret */ ++ case 0xfa: op = 0xe9; break; /* cli -> jmp */ ++ case 0xfb: op = 0xe9; break; /* sti -> jmp */ ++ default: error("Internal error"); ++ } ++ fprintf(outfile, ++ " *(uint8_t *)(gen_code_ptr + %d) = 0x%x;\n", ++ exit_addrs[i], op); ++ } ++ /* Fix up the return instruction. */ ++ if (patch_bytes != -1) { ++ if (patch_bytes) { ++ fprintf(outfile, " memcpy(gen_code_ptr + %d," ++ "gen_code_ptr + %d, %d);\n", ++ copy_size, retpos, patch_bytes); ++ } ++ fprintf(outfile, ++ " *(uint8_t *)(gen_code_ptr + %d) = 0xe9;\n", ++ retpos); ++ fprintf(outfile, ++ " *(uint32_t *)(gen_code_ptr + %d) = 0x%x;\n", ++ retpos + 1, copy_size - (retpos + 5)); ++ ++ copy_size += patch_bytes; + } ++#ifdef DEBUG_OP ++ fprintf(outfile, ++ " *(uint16_t *)(gen_code_ptr + %d) = 0x9090;\n", ++ copy_size); ++ copy_size += 2; ++#endif + } + #elif defined(HOST_X86_64) + { +@@ -1793,6 +2455,42 @@ void gen_code(const char *name, host_ulo + } + } + } ++ /* Replace the marker instructions with the actual opcodes. */ ++ for (i = 0; exit_addrs[i] != -1; i++) { ++ int op; ++ switch (p_start[exit_addrs[i]]) ++ { ++ case 0xf4: op = 0xc3; break; /* hlt -> ret */ ++ case 0xfa: op = 0xe9; break; /* cli -> jmp */ ++ case 0xfb: op = 0xe9; break; /* sti -> jmp */ ++ default: error("Internal error"); ++ } ++ fprintf(outfile, ++ " *(uint8_t *)(gen_code_ptr + %d) = 0x%x;\n", ++ exit_addrs[i], op); ++ } ++ /* Fix up the return instruction. */ ++ if (patch_bytes != -1) { ++ if (patch_bytes) { ++ fprintf(outfile, " memcpy(gen_code_ptr + %d," ++ "gen_code_ptr + %d, %d);\n", ++ copy_size, retpos, patch_bytes); ++ } ++ fprintf(outfile, ++ " *(uint8_t *)(gen_code_ptr + %d) = 0xe9;\n", ++ retpos); ++ fprintf(outfile, ++ " *(uint32_t *)(gen_code_ptr + %d) = 0x%x;\n", ++ retpos + 1, copy_size - (retpos + 5)); ++ ++ copy_size += patch_bytes; ++ } ++#ifdef DEBUG_OP ++ fprintf(outfile, ++ " *(uint16_t *)(gen_code_ptr + %d) = 0x9090;\n", ++ copy_size); ++ copy_size += 2; ++#endif + } + #elif defined(HOST_PPC) + { + +--- target-ppc/exec.h 13 Mar 2005 17:01:22 -0000 1.10 ++++ target-ppc/exec.h 11 May 2005 20:38:35 -0000 +@@ -33,11 +33,7 @@ register uint32_t T2 asm(AREG3); + #define FT1 (env->ft1) + #define FT2 (env->ft2) + +-#if defined (DEBUG_OP) +-#define RETURN() __asm__ __volatile__("nop"); +-#else +-#define RETURN() __asm__ __volatile__(""); +-#endif ++#define RETURN() FORCE_RET() + + #include "cpu.h" + #include "exec-all.h" +--- exec-all.h.orig 2005-09-04 19:11:31.000000000 +0200 ++++ exec-all.h 2005-09-11 01:10:01.525044400 +0200 +@@ -338,14 +338,15 @@ + + #elif defined(__i386__) && defined(USE_DIRECT_JUMP) + +-/* we patch the jump instruction directly */ ++/* we patch the jump instruction directly. Use sti in place of the actual ++ jmp instruction so that dyngen can patch in the correct result. */ + #define GOTO_TB(opname, tbparam, n)\ + do {\ + asm volatile (".section .data\n"\ + ASM_OP_LABEL_NAME(n, opname) ":\n"\ + ".long 1f\n"\ + ASM_PREVIOUS_SECTION \ +- "jmp " ASM_NAME(__op_jmp) #n "\n"\ ++ "sti;.long " ASM_NAME(__op_jmp) #n " - 1f\n"\ + "1:\n");\ + } while (0) + diff --git a/qemu-0.8.0-ldscript_ppc.patch b/qemu-0.8.0-ldscript_ppc.patch new file mode 100644 index 0000000..5cccfdf --- /dev/null +++ b/qemu-0.8.0-ldscript_ppc.patch @@ -0,0 +1,120 @@ +diff -u -F'^f' qemu-0.8.0/alpha.ld qemu-0.8.0/alpha.ld +--- qemu-0.8.0.backup/alpha.ld 2005-12-19 23:51:53.000000000 +0100 ++++ qemu-0.8.0/alpha.ld 2006-03-10 17:38:21.000000000 +0100 +@@ -6,7 +6,7 @@ + SECTIONS + { + /* Read-only sections, merged into text segment: */ +- . = 0x60000000 + SIZEOF_HEADERS; ++ . = 0x60000000 + 65536; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } +diff -u -F'^f' qemu-0.8.0/arm.ld qemu-0.8.0/arm.ld +--- qemu-0.8.0.backup/arm.ld 2005-12-19 23:51:53.000000000 +0100 ++++ qemu-0.8.0/arm.ld 2006-03-10 17:38:21.000000000 +0100 +@@ -6,7 +6,7 @@ + SECTIONS + { + /* Read-only sections, merged into text segment: */ +- . = 0x60000000 + SIZEOF_HEADERS; ++ . = 0x60000000 + 65536; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } +diff -u -F'^f' qemu-0.8.0/i386.ld qemu-0.8.0/i386.ld +--- qemu-0.8.0.backup/i386.ld 2005-12-19 23:51:53.000000000 +0100 ++++ qemu-0.8.0/i386.ld 2006-03-10 17:38:21.000000000 +0100 +@@ -8,7 +8,7 @@ + SECTIONS + { + /* Read-only sections, merged into text segment: */ +- . = 0x60000000 + SIZEOF_HEADERS; ++ . = 0x60000000 + 65536; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } +diff -u -F'^f' qemu-0.8.0/i386-vl.ld qemu-0.8.0/i386-vl.ld +--- qemu-0.8.0.backup/i386-vl.ld 2005-12-19 23:51:53.000000000 +0100 ++++ qemu-0.8.0/i386-vl.ld 2006-03-10 17:38:21.000000000 +0100 +@@ -8,7 +8,7 @@ + SECTIONS + { + /* Read-only sections, merged into text segment: */ +- . = 0xa8000000 + SIZEOF_HEADERS; ++ . = 0xa8000000 + 65536; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } +diff -u -F'^f' qemu-0.8.0/ia64.ld qemu-0.8.0/ia64.ld +--- qemu-0.8.0.backup/ia64.ld 2005-12-19 23:51:53.000000000 +0100 ++++ qemu-0.8.0/ia64.ld 2006-03-10 17:38:21.000000000 +0100 +@@ -9,7 +9,7 @@ + SECTIONS + { + /* Read-only sections, merged into text segment: */ +- PROVIDE (__executable_start = 0x60000000); . = 0x60000000 + SIZEOF_HEADERS; ++ PROVIDE (__executable_start = 0x60000000); . = 0x60000000 + 65536; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } +diff -u -F'^f' qemu-0.8.0/m68k.ld qemu-0.8.0/m68k.ld +--- qemu-0.8.0.backup/m68k.ld 2005-12-19 23:51:53.000000000 +0100 ++++ qemu-0.8.0/m68k.ld 2006-03-10 17:38:21.000000000 +0100 +@@ -9,7 +9,7 @@ + SECTIONS + { + /* Read-only sections, merged into text segment: */ +- . = 0x60000000 + SIZEOF_HEADERS; ++ . = 0x60000000 + 65536; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } +diff -u -F'^f' qemu-0.8.0/ppc.ld qemu-0.8.0/ppc.ld +--- qemu-0.8.0.backup/ppc.ld 2005-12-19 23:51:53.000000000 +0100 ++++ qemu-0.8.0/ppc.ld 2006-03-10 17:38:21.000000000 +0100 +@@ -8,7 +8,7 @@ + SECTIONS + { + /* Read-only sections, merged into text segment: */ +- . = 0x60000000 + SIZEOF_HEADERS; ++ . = 0x60000000 + 65536; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } +diff -u -F'^f' qemu-0.8.0/s390.ld qemu-0.8.0/s390.ld +--- qemu-0.8.0.backup/s390.ld 2005-12-19 23:51:53.000000000 +0100 ++++ qemu-0.8.0/s390.ld 2006-03-10 17:38:21.000000000 +0100 +@@ -8,7 +8,7 @@ + SECTIONS + { + /* Read-only sections, merged into text segment: */ +- . = 0x60000000 + SIZEOF_HEADERS; ++ . = 0x60000000 + 65536; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } +diff -u -F'^f' qemu-0.8.0/sparc.ld qemu-0.8.0/sparc.ld +--- qemu-0.8.0.backup/sparc.ld 2005-12-19 23:51:53.000000000 +0100 ++++ qemu-0.8.0/sparc.ld 2006-03-10 17:38:21.000000000 +0100 +@@ -6,7 +6,7 @@ + SECTIONS + { + /* Read-only sections, merged into text segment: */ +- . = 0x60000000 + SIZEOF_HEADERS; ++ . = 0x60000000 + 65536; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } +diff -u -F'^f' qemu-0.8.0/x86_64.ld qemu-0.8.0/x86_64.ld +--- qemu-0.8.0.backup/x86_64.ld 2005-12-19 23:51:53.000000000 +0100 ++++ qemu-0.8.0/x86_64.ld 2006-03-10 17:38:21.000000000 +0100 +@@ -6,7 +6,7 @@ + SECTIONS + { + /* Read-only sections, merged into text segment: */ +- . = 0x60000000 + SIZEOF_HEADERS; ++ . = 0x60000000 + 65536; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } diff --git a/qemu-0.8.1-build.patch b/qemu-0.8.1-build.patch new file mode 100644 index 0000000..0275b49 --- /dev/null +++ b/qemu-0.8.1-build.patch @@ -0,0 +1,39 @@ +-- qemu-0.8.1/Makefile.orig 2006-06-17 22:00:03.000000000 +0900 ++++ qemu-0.8.1/Makefile 2006-06-17 22:00:40.000000000 +0900 +@@ -1,6 +1,6 @@ + include config-host.mak + +-CFLAGS=-Wall -O2 -g -fno-strict-aliasing -I. ++CFLAGS=$(RPM_OPT_FLAGS) -O2 -g -fno-strict-aliasing -I. + ifdef CONFIG_DARWIN + CFLAGS+= -mdynamic-no-pic + endif +--- qemu-0.8.1/Makefile.target.orig 2006-06-17 21:36:49.000000000 +0900 ++++ qemu-0.8.1/Makefile.target 2006-06-17 21:39:31.000000000 +0900 +@@ -17,7 +17,7 @@ + VPATH+=:$(SRC_PATH)/linux-user + DEFINES+=-I$(SRC_PATH)/linux-user -I$(SRC_PATH)/linux-user/$(TARGET_ARCH) + endif +-CFLAGS=-Wall -O2 -g -fno-strict-aliasing ++CFLAGS=$(RPM_OPT_FLAGS) -Wall -fno-strict-aliasing + #CFLAGS+=-Werror + LDFLAGS=-g + LIBS= +@@ -119,7 +119,7 @@ + ifeq ($(ARCH),alpha) + # -msmall-data is not used because we want two-instruction relocations + # for the constant constructions +-OP_CFLAGS=-Wall -O2 -g ++OP_CFLAGS=$(RPM_OPT_FLAGS) -Wall + # Ensure there's only a single GP + CFLAGS += -msmall-data + LDFLAGS+=-Wl,-T,$(SRC_PATH)/alpha.ld +@@ -492,7 +492,7 @@ + + install: all + ifneq ($(PROGS),) +- $(INSTALL) -m 755 -s $(PROGS) "$(DESTDIR)$(bindir)" ++ $(INSTALL) -m 755 $(PROGS) "$(DESTDIR)$(bindir)" + endif + + ifneq ($(wildcard .depend),) diff --git a/qemu-1.4.1-texinfo-5.patch b/qemu-1.4.1-texinfo-5.patch new file mode 100644 index 0000000..c82a369 --- /dev/null +++ b/qemu-1.4.1-texinfo-5.patch @@ -0,0 +1,28 @@ +--- qemu-1.4.1/qemu-options.hx.orig 2013-05-08 15:18:06.824805369 +0200 ++++ qemu-1.4.1/qemu-options.hx 2013-05-08 15:19:01.540111255 +0200 +@@ -1518,18 +1518,13 @@ + devices. + + Syntax for specifying a sheepdog device +-@table @list +-``sheepdog:'' +- +-``sheepdog::'' +- +-``sheepdog::'' +- +-``sheepdog:::'' +- +-``sheepdog::::'' +- +-``sheepdog::::'' ++@table @code ++@item sheepdog: ++@item sheepdog:: ++@item sheepdog:: ++@item sheepdog::: ++@item sheepdog:::: ++@item sheepdog:::: + @end table + + Example diff --git a/qemu-1.7.0-virtfs-ftbfs.patch b/qemu-1.7.0-virtfs-ftbfs.patch new file mode 100644 index 0000000..8aae577 --- /dev/null +++ b/qemu-1.7.0-virtfs-ftbfs.patch @@ -0,0 +1,20 @@ +diff --git a/fsdev/virtfs-proxy-helper.c b/fsdev/virtfs-proxy-helper.c +index 713a7b2..c10a085 100644 +--- a/fsdev/virtfs-proxy-helper.c ++++ b/fsdev/virtfs-proxy-helper.c +@@ -12,7 +12,6 @@ + #include + #include + #include +-#include + #include + #include + #include +@@ -23,6 +22,7 @@ + #include "qemu-common.h" + #include "qemu/sockets.h" + #include "qemu/xattr.h" ++#include + #include "virtio-9p-marshal.h" + #include "hw/9pfs/virtio-9p-proxy.h" + #include "fsdev/virtio-9p-marshal.h" \ No newline at end of file diff --git a/qemu-initscript b/qemu-initscript new file mode 100644 index 0000000..0dae287 --- /dev/null +++ b/qemu-initscript @@ -0,0 +1,115 @@ +#!/bin/sh +# +# Init file for configuring Qemu non-native binary formats +# +# Written by Dag Wieers +# +# chkconfig: 2345 35 98 +# description: Qemu non-native binary formats + +. /etc/rc.d/init.d/functions + +RETVAL=0 +prog="qemu" + +start() { + cpu="$(uname -m)" + case "$cpu" in + i386|i486|i586|i686|i86pc|BePC) + cpu="i386";; + "Power Macintosh"|ppc|ppc64) + cpu="ppc";; + armv4l|armv5l) + cpu="arm";; + esac + echo -n $"Registering non-native binary handler for Qemu" + ( /sbin/modprobe binfmt_misc && + mount -t binfmt_misc none /proc/sys/fs/binfmt_misc ) &>/dev/null + if [ "$cpu" != "i386" -a "$cpu" != "x86_64" ]; then + echo ':i386:M::\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x03\x00:\xff\xff\xff\xff\xff\xfe\xfe\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfb\xff\xff\xff:/usr/bin/qemu-i386:' >/proc/sys/fs/binfmt_misc/register + echo ':i486:M::\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x06\x00:\xff\xff\xff\xff\xff\xfe\xfe\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfb\xff\xff\xff:/usr/bin/qemu-i386:' >/proc/sys/fs/binfmt_misc/register + fi + if [ "$cpu" != "x86_64" ]; then + echo ':x86_64:M::\x7fELF\x02\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x3e\x00:\xff\xff\xff\xff\xff\xfe\xfe\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfb\xff\xff\xff:/usr/bin/qemu-x86_64:' >/proc/sys/fs/binfmt_misc/register + fi + if [ "$cpu" != "arm" ]; then + echo ':arm:M::\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x28\x00:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff\xff:/usr/bin/qemu-arm:' >/proc/sys/fs/binfmt_misc/register + echo ':armeb:M::\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x28:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff:/usr/bin/qemu-armeb:' > /proc/sys/fs/binfmt_misc/register + fi + if [ "$cpu" != "ppc" ]; then + echo ':ppc:M::\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x14:\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfb\xff\xff\xff:/usr/bin/qemu-ppc:' >/proc/sys/fs/binfmt_misc/register + fi + if [ "$cpu" != "sparc" ]; then + echo ':sparc:M::\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x02:\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfb\xff\xff\xff:$QEMU/qemu-sparc:' >/proc/sys/fs/binfmt_misc/register + fi + if [ $cpu != "m68k" ] ; then +# echo 'Please check cpu value and header information for m68k!' + echo ':m68k:M::\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x04:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff:/usr/bin/qemu-m68k:' > /proc/sys/fs/binfmt_misc/register + fi + if [ $cpu != "mips" ] ; then + # FIXME: We could use the other endianness on a MIPS host. + echo ':mips:M::\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x08:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff:/usr/bin/qemu-mips:' > /proc/sys/fs/binfmt_misc/register + echo ':mipsel:M::\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x08\x00:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff\xff:/usr/bin/qemu-mipsel:' > /proc/sys/fs/binfmt_misc/register + echo ':mipsn32:M::\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x08:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff:/usr/bin/qemu-mipsn32:' > /proc/sys/fs/binfmt_misc/register + echo ':mipsn32el:M::\x7fELF\x01\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x08\x00:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff\xff:/usr/bin/qemu-mipsn32el:' > /proc/sys/fs/binfmt_misc/register + echo ':mips64:M::\x7fELF\x02\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x08:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff:/usr/bin/qemu-mips64:' > /proc/sys/fs/binfmt_misc/register + echo ':mips64el:M::\x7fELF\x02\x01\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x08\x00:\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff\xff:/usr/bin/qemu-mips64el:' > /proc/sys/fs/binfmt_misc/register + fi + echo_success + echo +} + +stop() { + echo -n $"Unregistering non-native binary handler for Qemu" + for cpu in i386 i486 x86_64 ppc arm armeb sparc m68k mips mipsel mipsn32 mipsn32el mips64 mips64el; do + if [ -r "/proc/sys/fs/binfmt_misc/qemu-$cpu" ]; then + echo "-1" >/proc/sys/fs/binfmt_misc/qemu-$cpu + fi + if [ -r "/proc/sys/fs/binfmt_misc/$cpu" ]; then + echo "-1" >/proc/sys/fs/binfmt_misc/$cpu + fi + done + echo_success + echo +} + +restart() { + stop + start +} + +status() { + if ls /proc/sys/fs/binfmt_misc/qemu-* &>/dev/null; then + echo $"Qemu non-native binary format handlers registered." + return 0 + else + echo $"Qemu non-native binary format handlers not registered." + return 1 + fi +} + +case "$1" in + start) + start + ;; + stop) + stop + ;; + restart|reload) + restart + ;; + condrestart) + if status &>/dev/null; then + restart + fi + ;; + status) + status + RETVAL=$? + ;; + *) + echo $"Usage: $prog {start|stop|restart|condrestart|status}" + RETVAL=1 +esac + +exit $RETVAL diff --git a/qemu.spec b/qemu.spec new file mode 100644 index 0000000..f6fea99 --- /dev/null +++ b/qemu.spec @@ -0,0 +1,412 @@ +Name: qemu +Version: 1.7.0 +Release: 3mamba +Summary: A generic and open source processor emulator +Group: Applications/Emulators +Vendor: openmamba +Distribution: openmamba +Packager: Silvan Calarco +URL: http://qemu.org +Source: http://wiki.qemu.org/download/qemu-%{version}.tar.bz2 +Source1: %{name}-initscript +Patch0: %{name}-0.8.1-build.patch +Patch1: %{name}-0.8.0-dyngen.patch +Patch2: %{name}-0.8.0-gcc4_x86.patch +Patch3: %{name}-0.8.0-gcc4_ppc.patch +Patch4: %{name}-0.8.0-ldscript_ppc.patch +Patch5: qemu-1.4.1-texinfo-5.patch +Patch6: qemu-1.7.0-virtfs-ftbfs.patch +License: GPL, LGPL +## AUTOBUILDREQ-BEGIN +BuildRequires: glibc-devel +BuildRequires: libaio-devel +BuildRequires: libalsa-devel +BuildRequires: libatk-devel +BuildRequires: libbluetooth-devel +BuildRequires: libcairo-devel +BuildRequires: libcap-devel +BuildRequires: libcap-ng-devel +BuildRequires: libcares-devel +BuildRequires: libcurl-devel +BuildRequires: libfontconfig-devel +BuildRequires: libfreetype-devel +BuildRequires: libgcrypt-devel +BuildRequires: libgdk-pixbuf-devel +BuildRequires: libGL-devel +BuildRequires: libglib-devel +BuildRequires: libgnutls-devel +BuildRequires: libgpg-error-devel +BuildRequires: libgss-devel +BuildRequires: libgtk2-devel +BuildRequires: libidn-devel +BuildRequires: libjpeg-devel +BuildRequires: libncurses-devel +BuildRequires: libnspr-devel +BuildRequires: libnss-devel +BuildRequires: libopenldap-devel +BuildRequires: libopenssl-devel +BuildRequires: libpango-devel +BuildRequires: libpixman-devel +BuildRequires: libpng-devel +BuildRequires: librtmp-devel +BuildRequires: libsasl-devel +%if "%{stage1}" != "1" +BuildRequires: libSDL-devel +%endif +BuildRequires: libssh2-devel +BuildRequires: libusbx-devel +BuildRequires: libuuid-devel +BuildRequires: libvte0-devel +BuildRequires: libX11-devel +BuildRequires: libxen-devel +BuildRequires: libXext-devel +BuildRequires: libz-devel +## AUTOBUILDREQ-END +BuildRequires: libxen-devel >= 4.2.2 +BuildRequires: libadplug-devel >= 1.5.1 +BuildRequires: libglib-static >= 2.34.1-2mamba +BuildRequires: libspice-devel +BuildRequires: spice-protocol-devel +BuildRequires: libusbredir-devel +#% if "%{_build_cpu}" != "ppc" +#BuildRequires: gcc34 +#% endif +Conflicts: kvm +BuildRoot: %{_tmppath}/%{name}-%{version}-root + +%description +QEMU is a generic and open source processor emulator which achieves a good emulation speed by using dynamic translation. +QEMU has two operating modes: + - Full system emulation. In this mode, QEMU emulates a full system (for example a PC or a PowerMac), including a processor and various peripherials. It can be used to launch different Operating Systems without rebooting the PC or to debug system code. + - User mode emulation (Linux host only). In this mode, QEMU can launch Linux processes compiled for one CPU on another CPU. + +%package -n libcacard +Group: System/Libraries +Summary: QEMU virtual smart card emulator library + +%description -n libcacard +QEMU virtual smart card emulator library. + +%package -n libcacard-devel +Group: Development/Libraries +Summary: Development files for libcacard +Requires: libcacard = %{?epoch:%epoch:}%{version}-%{release} +Requires: pkg-config + +%description -n libcacard-devel +This package contains libraries and header files for developing applications that use %{name}. + +%package static +Summary: Static QEMU user mode emulators +Group: Applications/Emulators +Requires: %{name} = %{?epoch:%epoch:}%{version}-%{release} + +%description static +QEMU is a generic and open source processor emulator which achieves a good emulation speed by using dynamic translation. +This package contains static user mode emulators. In this mode, QEMU can launch Linux processes compiled for one CPU on another CPU. + +%prep +%setup -q -D -T +:<< ___EOF +#%if "%{_build_cpu}" == "ppc" +#%patch0 -p1 +#%patch1 +#%patch2 +#%patch3 +#%patch4 -p1 +#%endif +#%patch5 -p1 +%patch6 -p1 + +%build +:<< ___EOF +# static build for usermode emulation targets only +# used by cross platform installation tools like makedist +./configure \ + --sysconfdir=%{_sysconfdir} \ + --prefix=%{_prefix} \ + --cc=%{_build}-gcc \ + --host-cc=%{_host}-gcc \ + --cpu=%{_host_cpu} \ + --static \ + --disable-sdl \ + --disable-curl \ + --disable-bluez \ + --disable-system \ + --disable-smartcard-nss \ + --disable-strip \ + --disable-libssh2 \ + --enable-linux-user + +# --disable-usb-redir \ +# --disable-vde \ + +%make +mkdir static +find *-linux-user -name qemu-\* -exec mv {} static/ \; + +make clean +___EOF + +# dynamic build +./configure \ + --sysconfdir=%{_sysconfdir} \ + --prefix=%{_prefix} \ + --libdir=%{_libdir} \ + --libexecdir=%{_libexecdir} \ + --cc=%{_build}-gcc \ + --host-cc=%{_host}-gcc \ + --cpu=%{_host_cpu} \ +%if "%{_build_cpu}" == "ppc" + --disable-gcc-check \ +#% else +# --cc=%{_target_platform}-gcc34 \ +%endif + --audio-drv-list=alsa \ + --enable-spice \ + --enable-usb-redir + +%make + +%install +[ "%{buildroot}" != / ] && rm -rf "%{buildroot}" +%makeinstall + +install -D -m 755 %{S:1} \ + %{buildroot}%{_initrddir}/%{name} + +cd static +for f in *; do +# disable stripping static binaries by installing without -x +install -m644 $f %{buildroot}%{_bindir}/$f.static +done +cd .. + +%find_lang %{name} + +%clean +[ "%{buildroot}" != / ] && rm -rf "%{buildroot}" + +%post +# new install +if [ $1 -eq 1 ]; then + systemctl -q enable %{name} || true + systemctl -q daemon-reload + systemctl start %{name} +fi +: + +%preun +# erase +if [ $1 -eq 0 ]; then + systemctl stop %{name} + systemctl -q disable %{name} +fi +: + +%postun +# upgrade +if [ $1 -eq 1 ]; then + systemctl -q daemon-reload + /sbin/chkconfig %{name} + [ $? -eq 0 ] && service %{name} restart +fi +: + +%post -n libcacard +/sbin/ldconfig +: + +%postun -n libcacard +/sbin/ldconfig +: + +%files -f %{name}.lang +%defattr(-,root,root) +%dir %{_sysconfdir}/qemu +%config %{_sysconfdir}/qemu/target-x86_64.conf +%{_initrddir}/%{name} +%{_bindir}/%{name}* +%{_bindir}/vscclient +%exclude %{_bindir}/%{name}*.static +%{_bindir}/virtfs-proxy-helper +%{_libexecdir}/qemu-bridge-helper +%{_datadir}/%{name} +%{_docdir}/%{name} +%{_mandir}/man1/%{name}* +%{_mandir}/man1/virtfs-proxy-helper.1.gz +%{_mandir}/man8/%{name}-nbd.8.gz +%doc COPYING COPYING.LIB + +%files -n libcacard +%defattr(-,root,root) +%{_libdir}/libcacard.so.* + +%files -n libcacard-devel +%defattr(-,root,root) +%dir %{_includedir}/cacard +%{_includedir}/cacard/*.h +%{_libdir}/libcacard.a +%{_libdir}/libcacard.la +%{_libdir}/libcacard.so +%{_libdir}/pkgconfig/libcacard.pc +%doc LICENSE README + +%files static +%defattr(-,root,root) +%attr(0755,root,root) %{_bindir}/%{name}*.static + +%changelog +* Mon May 12 2014 Silvan Calarco 1.7.0-3mamba +- enabled usb redirection (--enable-usb-redir) + +* Sun May 11 2014 Silvan Calarco 1.7.0-2mamba +- rebuilt with --enable-spice for libvirt support + +* Thu Nov 28 2013 Automatic Build System 1.7.0-1mamba +- automatic version update by autodist + +* Fri Aug 16 2013 Automatic Build System 1.6.0-1mamba +- automatic version update by autodist + +* Thu Aug 01 2013 Silvan Calarco 1.5.2-2mamba +- rebuilt to fix usermode binaries crash + +* Sat Jul 27 2013 Automatic Build System 1.5.2-1mamba +- automatic version update by autodist + +* Thu May 30 2013 Silvan Calarco 1.4.2-1mamba +- update to 1.4.2 + +* Thu May 09 2013 Automatic Build System 1.4.1-1mamba +- automatic version update by autodist + +* Mon Feb 18 2013 Automatic Build System 1.4.0-1mamba +- automatic version update by autodist + +* Tue Jan 29 2013 Automatic Build System 1.3.1-1mamba +- automatic version update by autodist + +* Tue Dec 04 2012 Automatic Build System 1.3.0-1mamba +- automatic version update by autodist + +* Tue Nov 27 2012 Silvan Calarco 1.2.1-2mamba +- rebuiilt with libxen 4.1.2 + +* Tue Nov 20 2012 Automatic Build System 1.2.1-1mamba +- update to 1.2.1 + +* Fri Oct 19 2012 Silvan Calarco 1.2.0-2mamba +- rebuilt after fixing glib static libraries by removing dconf/systemtap support +- don't strip static qemu-*.static binaries to make them work again + +* Tue Sep 11 2012 Automatic Build System 1.2.0-1mamba +- update to 1.2.0 + +* Tue Jul 17 2012 Automatic Build System 1.1.1-1mamba +- automatic version update by autodist + +* Sat Jul 07 2012 Automatic Build System 1.1.0-1mamba +- update to 1.1.0 + +* Sun Apr 15 2012 Automatic Build System 1.0.1-1mamba +- automatic version update by autodist + +* Fri Apr 06 2012 Silvan Calarco 0.15.1-2mamba +- initscript: fix cpu detection under x86_64 and don't configure qemu to do emulation for x86 binfmt + +* Wed Oct 26 2011 Automatic Build System 0.15.1-1mamba +- update to 0.15.1 + +* Sat May 07 2011 Automatic Build System 0.14.1-1mamba +- automatic update by autodist + +* Thu Feb 17 2011 Automatic Build System 0.14.0-1mamba +- automatic update by autodist + +* Sat Nov 06 2010 Silvan Calarco 0.13.0-1mamba +- update to 0.13.0 + +* Tue Sep 14 2010 Silvan Calarco 0.12.5-5mamba +- added conflict with kvm + +* Wed Aug 11 2010 Silvan Calarco 0.12.5-4mamba +- initscript updated with support for more archs: x86_64, m64k, mips + +* Sun Aug 01 2010 Silvan Calarco 0.12.5-3mamba +- initscript: mount binfmt_misc before registering entries + +* Tue Jul 27 2010 Silvan Calarco 0.12.5-2mamba +- qemu-arm binary mask previous fix was incorrect (?); refixing + +* Fri Jul 23 2010 Automatic Build System 0.12.5-1mamba +- automatic update to 0.12.5 by autodist + +* Wed Jul 14 2010 Silvan Calarco 0.12.4-4mamba +- initscript: fixed binfmt_misc mask for arm platform + +* Thu Jun 17 2010 Silvan Calarco 0.12.4-3mamba +- initscript: remove check for /usr/qemu-* existence to register non native binary handlers + +* Thu Jun 17 2010 Silvan Calarco 0.12.4-2mamba +- rebuilt with gcc 4.5 (dropped use of legacy gcc 3.4) +- added static package with statically built user mode emulators (qemu-*.static) + +* Wed May 05 2010 Automatic Build System 0.12.4-1mamba +- automatic update to 0.12.4 by autodist + +* Sun Feb 28 2010 Automatic Build System 0.12.3-1mamba +- automatic update to 0.12.3 by autodist + +* Sat Jan 16 2010 Automatic Build System 0.12.2-1mamba +- automatic update to 0.12.2 by autodist + +* Tue Jan 05 2010 Automatic Build System 0.12.1-1mamba +- automatic update to 0.12.1 by autodist + +* Wed Sep 30 2009 Automatic Build System 0.11.0-1mamba +- automatic update by autodist + +* Sun Jul 19 2009 Automatic Build System 0.10.6-1mamba +- automatic update by autodist + +* Fri May 22 2009 Automatic Build System 0.10.5-1mamba +- automatic update to 0.10.5 by autodist + +* Wed May 13 2009 Automatic Build System 0.10.4-1mamba +- automatic update to 0.10.4 by autodist + +* Sat May 02 2009 Automatic Build System 0.10.3-1mamba +- automatic update to 0.10.3 by autodist + +* Wed Apr 08 2009 Silvan Calarco 0.10.2-1mamba +- automatic update to 0.10.2 by autodist + +* Sun Mar 22 2009 Silvan Calarco 0.10.1-1mamba +- automatic update to 0.10.1 by autodist + +* Sun Mar 08 2009 Silvan Calarco 0.10.0-1mamba +- update to 0.10.0 + +* Wed Jun 04 2008 Silvan Calarco 0.9.1-1mamba +- update to 0.9.1 + +* Sat Mar 10 2007 Silvan Calarco 0.9.0-1qilnx +- update to version 0.9.0 by autospec +- removed requirement for gcc34 + +* Mon Jun 26 2006 Stefano Cotta Ramusino 0.8.1-1qilnx +- update to version 0.8.1 by autospec +- added initscript for user emulation + +* Fri Mar 10 2006 Stefano Cotta Ramusino 0.8.0-3qilnx +- fixed for ppc build + +* Sat Jan 28 2006 Stefano Cotta Ramusino 0.8.0-2qilnx +- added ALSA audio driver support + +* Fri Jan 20 2006 Stefano Cotta Ramusino 0.8.0-1qilnx +- update to version 0.8.0 by autospec + +* Thu Aug 18 2005 Stefano Cotta Ramusino 0.7.1-1qilnx +- package created by autospec