87 lines
3.2 KiB
Diff
87 lines
3.2 KiB
Diff
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From 32f519d32ca9ca0f84e81953c8d9ddefdb7771d3 Mon Sep 17 00:00:00 2001
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From: Alex Deucher <alexdeucher@gmail.com>
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Date: Sun, 13 Feb 2011 18:38:23 -0500
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Subject: [PATCH] drm/radeon/kms: hopefully fix pll issues for real (v3)
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The problematic boards have a recommended reference divider
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to be used when spread spectrum is enabled on the laptop panel.
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Enable the use of the recommended reference divider along with
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the new pll algo.
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v2: testing options
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v3: When using the fixed reference divider with
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LVDS, prefer min m to max p and use fractional feedback dividers.
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Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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Cc: stable@kernel.org
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---
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drivers/gpu/drm/radeon/atombios_crtc.c | 22 ++++++++--------------
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1 files changed, 8 insertions(+), 14 deletions(-)
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diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
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index 1bf6122..3127a28 100644
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--- a/drivers/gpu/drm/radeon/atombios_crtc.c
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+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
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@@ -538,7 +538,6 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
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pll->flags |= RADEON_PLL_PREFER_HIGH_FB_DIV;
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else
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pll->flags |= RADEON_PLL_PREFER_LOW_REF_DIV;
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-
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}
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list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
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@@ -555,29 +554,28 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
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dp_clock = dig_connector->dp_clock;
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}
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}
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-/* this might work properly with the new pll algo */
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-#if 0 /* doesn't work properly on some laptops */
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+
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/* use recommended ref_div for ss */
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if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
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+ pll->flags |= RADEON_PLL_PREFER_MINM_OVER_MAXP;
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if (ss_enabled) {
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if (ss->refdiv) {
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pll->flags |= RADEON_PLL_USE_REF_DIV;
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pll->reference_div = ss->refdiv;
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+ if (ASIC_IS_AVIVO(rdev))
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+ pll->flags |= RADEON_PLL_USE_FRAC_FB_DIV;
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}
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}
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}
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-#endif
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+
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if (ASIC_IS_AVIVO(rdev)) {
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/* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */
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if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1)
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adjusted_clock = mode->clock * 2;
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if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT))
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pll->flags |= RADEON_PLL_PREFER_CLOSEST_LOWER;
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- /* rv515 needs more testing with this option */
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- if (rdev->family != CHIP_RV515) {
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- if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))
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- pll->flags |= RADEON_PLL_IS_LCD;
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- }
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+ if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))
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+ pll->flags |= RADEON_PLL_IS_LCD;
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} else {
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if (encoder->encoder_type != DRM_MODE_ENCODER_DAC)
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pll->flags |= RADEON_PLL_NO_ODD_POST_DIV;
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@@ -957,11 +955,7 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode
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/* adjust pixel clock as needed */
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adjusted_clock = atombios_adjust_pll(crtc, mode, pll, ss_enabled, &ss);
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- /* rv515 seems happier with the old algo */
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- if (rdev->family == CHIP_RV515)
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- radeon_compute_pll_legacy(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div,
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- &ref_div, &post_div);
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- else if (ASIC_IS_AVIVO(rdev))
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+ if (ASIC_IS_AVIVO(rdev))
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radeon_compute_pll_avivo(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div,
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&ref_div, &post_div);
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else
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--
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1.7.1.1
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