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A code generator for the Verilog-AMS language https://sourceforge.net/projects/mot-adms/
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README.md

adms

ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile C code for the API of spice simulators. Based on transformations specified in XML language, ADMS transforms Verilog-AMS code into other target languages.