A code generator for the Verilog-AMS language
https://sourceforge.net/projects/mot-adms/
Silvan Calarco
b2b541acb2
add -DBUILD_SHARED_LIBS=OFF because not working well yet (see CMakeLists.txt) [release 2.3.6-2mamba;Sun Dec 10 2017] |
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adms.spec | ||
README.md |
adms
ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile C code for the API of spice simulators. Based on transformations specified in XML language, ADMS transforms Verilog-AMS code into other target languages.